JPH1146052A - Package structure and method of integrated circuit device - Google Patents

Package structure and method of integrated circuit device

Info

Publication number
JPH1146052A
JPH1146052A JP20168497A JP20168497A JPH1146052A JP H1146052 A JPH1146052 A JP H1146052A JP 20168497 A JP20168497 A JP 20168497A JP 20168497 A JP20168497 A JP 20168497A JP H1146052 A JPH1146052 A JP H1146052A
Authority
JP
Japan
Prior art keywords
pwb
lock pin
terminal
hole
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20168497A
Other languages
Japanese (ja)
Inventor
Kazunari Tamaoki
一成 玉置
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Gunma Ltd
Original Assignee
NEC Gunma Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Gunma Ltd filed Critical NEC Gunma Ltd
Priority to JP20168497A priority Critical patent/JPH1146052A/en
Publication of JPH1146052A publication Critical patent/JPH1146052A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/325Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor

Abstract

PROBLEM TO BE SOLVED: To provide an IC which is quick disconnectable with respect to a PWB(printed wiring board), eliminating the soldering for packaging on the PWB. SOLUTION: A lock pin 2 is inserted into a fitting hole 3, made in a PWB 5 to plunge a substrate 21 onto the PWB 5, for making a terminal 1 abut against a pad 4 on the PWB 5 to bring about a compressed state. In such a constitution, the diameter of the fitting hole 3 is nearly equivalent to that of the lock pin 2 but smaller than that of an expanding part 22, which is once made smaller due to the elastic deformation, when the lock pin 2 is inserted into the fitting hole 3 but returns to a larger state, when thrusting through the backside of the PWB 5, so that the lock pin 2 does not come out of the fitting hole 3, thereby enabling the terminal 1 to fix an IC 20 to the PWB 5 in the compressed state.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、集積回路装置並び
にその実装構造及び方法に関し、特にプリント基板に実
装する集積回路装置並びにその実装構造及び方法に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device and its mounting structure and method, and more particularly to an integrated circuit device mounted on a printed circuit board and its mounting structure and method.

【0002】[0002]

【従来の技術】従来、半導体集積回路装置(以下ICと
いう)をプリント基板(以下PWBという)に実装する
構造は、ICの形状により様々のものがあり、例えば特
開平4−25062号公報や特開昭62−15884号
公報に開示されたものがある。
2. Description of the Related Art Conventionally, there are various structures for mounting a semiconductor integrated circuit device (hereinafter referred to as an IC) on a printed circuit board (hereinafter referred to as a PWB), depending on the shape of the IC. There is one disclosed in Japanese Unexamined Patent Publication No. Sho 62-15884.

【0003】図3〜図5は従来のICの実装構造を示す
断面図である。図3はPGA(Pin Grid Ar
ray)のIC10をPWB5に実装した構造を示す断
面図である。IC10の下面に植設された複数のピン1
3がPWB5に設けられたスルーホール14に挿入さ
れ、さらにピン13とスルーホール14とは半田6によ
り接合されている。図4はQFP(Quad Flat
Package)のIC11をPWB5に実装した構
造を示す断面図で、IC11の周辺に設けられたリード
15がPWB5に設けられたパッド4に載せられ、互い
に半田6により接合されている。
FIGS. 3 to 5 are cross-sectional views showing a conventional IC mounting structure. FIG. 3 shows PGA (Pin Grid Ar).
3 is a cross-sectional view showing a structure in which the IC 10 of FIG. Plural pins 1 implanted on the lower surface of IC 10
3 is inserted into a through hole 14 provided in the PWB 5, and the pin 13 and the through hole 14 are joined by solder 6. FIG. 4 shows a QFP (Quad Flat).
FIG. 2 is a cross-sectional view showing a structure in which a package (IC) 11 is mounted on a PWB 5. Leads 15 provided around the IC 11 are mounted on pads 4 provided on the PWB 5 and joined to each other by solder 6.

【0004】図5に示すIC12は、周辺に設けたリー
ド17の先端を折り曲げてばね部18を形成している。
リード17のばね部18をPWB5のスルーホール14
に挿入し、ばね部18がスルーホール14の内壁を押し
つけることによりリード17がスルーホール14から抜
け出てしまうのを防止し、半田を用いないでIC12を
実装している。
[0005] The IC 12 shown in FIG. 5 has a spring portion 18 formed by bending the tip of a lead 17 provided on the periphery.
Connect the spring portion 18 of the lead 17 to the through hole 14 of the PWB 5
Then, the spring 17 presses the inner wall of the through hole 14 to prevent the lead 17 from coming out of the through hole 14, and the IC 12 is mounted without using solder.

【0005】これらのほかにも従来のICの実装構造と
してICの下面に配列した金属ボールをPWBのパッド
に載せ、互いに半田接続するBGAの接続構造がある。
In addition to the above, there is a BGA connection structure in which metal balls arranged on the lower surface of the IC are mounted on PWB pads and soldered to each other as a conventional IC mounting structure.

【0006】[0006]

【発明が解決しようとする課題】第1の問題点は、図3
及び図4に示す従来のICの実装構造では、ICの交換
や修理が必要になった場合のPWBからのICの取り外
しが非常に困難なことでおる。
The first problem is that FIG.
In addition, in the conventional mounting structure of the IC shown in FIG. 4, it is very difficult to remove the IC from the PWB when the IC needs to be replaced or repaired.

【0007】その理由は、ICをPWBに接合している
半田を溶かす必要があるからである。
[0007] The reason is that it is necessary to melt the solder connecting the IC to the PWB.

【0008】第2の問題点は、図3及び図4に示す従来
のICの実装構造では、ICをPWBから取り外す場合
にPWBや周辺の部品に悪影響を与えてしまうことが多
い。
A second problem is that in the conventional IC mounting structure shown in FIGS. 3 and 4, when the IC is removed from the PWB, the PWB and peripheral components are often adversely affected.

【0009】その理由は、ICをPWBから取り外す際
は、半田を溶かすのに加熱しなければならずPWB及び
周辺の部品に熱ストレスを加えてしまうからである。例
えばBGAの接続構造では、ICとPWBとの間隙内ま
でも加熱しなければならず、PWB等に加わる悪影響も
大きい。
The reason is that when the IC is removed from the PWB, the solder must be heated to melt the solder, and thermal stress is applied to the PWB and peripheral components. For example, in a BGA connection structure, it is necessary to heat even the gap between the IC and the PWB, which has a great adverse effect on the PWB and the like.

【0010】第3の問題点は、図5に示す従来のICの
実装構造では、ICの製造費用が高くなってしまうこと
である。
A third problem is that the conventional IC mounting structure shown in FIG. 5 increases the manufacturing cost of the IC.

【0011】その理由は、IC12の全てのリード17
にばね部18を形成しなければならないからである。
The reason is that all the leads 17 of the IC 12
This is because the spring portion 18 must be formed at the bottom.

【0012】本発明の目的は、PWBへの実装に半田付
けが不要で、PWBに対する脱着が容易であるICを提
供することにある。
An object of the present invention is to provide an IC that does not require soldering for mounting on a PWB and that can be easily attached to and detached from the PWB.

【0013】[0013]

【課題を解決するための手段】本発明のIC(図1の2
0)は、基板(図1の21)上に設けられ先端に細くな
るように弾性変形可能な膨大部(図1の22)を有した
ロックピン(図1の2)と、前記基板上に設けられた端
子(図1の1)とを備え、望ましくは、前記端子は、弾
性により圧縮されうるものとする。
The IC of the present invention (2 in FIG. 1)
0) is a lock pin (2 in FIG. 1) provided on a substrate (21 in FIG. 1) and having an enlarged portion (22 in FIG. 1) that can be elastically deformed so as to be thin at the tip, and And a terminal (1 in FIG. 1) provided. Preferably, the terminal can be compressed by elasticity.

【0014】本発明のICのPWBへの実装方法は、前
記ロックピン(図2の2)をPWB(図2の5)に設け
られた穴(図2の3)に差し込んで前記基板を前記PW
Bに向けて押しつけ、前記端子(図2の1)を前記PW
B上のパッド(図2の4)に圧接させると共に前記膨大
部(図2の22)を前記穴から突き抜けさせることを特
徴とする。
In the method of mounting an IC on a PWB according to the present invention, the lock pin (2 in FIG. 2) is inserted into a hole (3 in FIG. 2) provided in a PWB (5 in FIG. 2), and the substrate is mounted on the PWB. PW
B and press the terminal (1 in FIG. 2) to the PW
It is characterized in that it is pressed against the pad (4 in FIG. 2) on B and the enlarged part (22 in FIG. 2) penetrates through the hole.

【0015】本発明のICのPWBへの実装構造は、前
記ロックピン(図2の2)がPWB(図2の5)に設け
られた穴(図2の3)に挿入して前記膨大部(図2の2
2)が前記穴を突き抜け、前記端子(図2の1)が前記
PWB上のパッド(図2の4)に圧接していることを特
徴とする。
According to the mounting structure of the IC of the present invention on a PWB, the lock pin (2 in FIG. 2) is inserted into a hole (3 in FIG. 2) provided in the PWB (5 in FIG. 2). (2 in FIG. 2)
2) penetrates the hole, and the terminal (1 in FIG. 2) is in pressure contact with a pad (4 in FIG. 2) on the PWB.

【0016】[0016]

【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して説明する。
Next, embodiments of the present invention will be described with reference to the drawings.

【0017】図1は本発明の実施の形態のIC20の側
面図である。IC20の基板21の下面の4隅にはロッ
クピン2が植設され、さらに基板21の下面のほぼ全面
にわたって端子1がマトリックス状に配設されている。
FIG. 1 is a side view of an IC 20 according to an embodiment of the present invention. Lock pins 2 are planted at four corners on the lower surface of the substrate 21 of the IC 20, and the terminals 1 are arranged in a matrix over substantially the entire lower surface of the substrate 21.

【0018】ロックピン2は、先端部に膨大部22を有
し、膨大部22を除けばほぼ円筒状で、弾性のある金属
などからなる。膨大部22は、ほぼ球面の一部をなし、
ロックピン2の軸方向に複数のスリットを設ける等によ
り外表面が押されれば直径が小さくなるように弾性変形
する。
The lock pin 2 has an enlarged portion 22 at the tip end, and is substantially cylindrical except for the enlarged portion 22, and is made of an elastic metal or the like. The enlarged part 22 forms a part of a substantially spherical surface,
If the outer surface is pressed by providing a plurality of slits in the axial direction of the lock pin 2, the lock pin 2 is elastically deformed so as to have a smaller diameter.

【0019】端子1は、外周が先端面を有する円筒形で
コイルばねを内蔵し、先端面が押されると弾性により圧
縮する。また端子1は、金属からなり基板21に設けら
れた電子回路に接続されている。
The terminal 1 has a built-in coil spring having a cylindrical outer periphery having a distal end surface, and is compressed by elasticity when the distal end surface is pressed. The terminal 1 is made of metal and is connected to an electronic circuit provided on the substrate 21.

【0020】図2は、図1のIC20をPWB5に実装
した状態を示す側断面図である。PWB5に設けた取り
付け穴3にロックピン2を差し込み、基板21をPWB
5に押しつけ、端子1をPWB5上のパッド4に圧接さ
せ、圧縮された状態にする。取り付け穴3の直径は、ロ
ックピン2とほぼおなじで膨大部22の直径よりは小さ
い。ロックピン2を取り付け穴3に差し込んだ時に膨大
部22は、弾性変形により一旦細くなるが、PWB5の
裏面に突き抜けると膨大部22は太い状態に戻りロック
ピン2が取り付け穴3から抜けないようにロックし、端
子1が圧縮された状態でIC20をPWB5に固定す
る。
FIG. 2 is a side sectional view showing a state where the IC 20 of FIG. 1 is mounted on the PWB 5. The lock pin 2 is inserted into the mounting hole 3 provided in the PWB 5, and the board 21 is
5, the terminal 1 is pressed against the pad 4 on the PWB 5 to make it in a compressed state. The diameter of the mounting hole 3 is substantially the same as that of the lock pin 2 and smaller than the diameter of the enlarged portion 22. When the lock pin 2 is inserted into the mounting hole 3, the enlarged portion 22 becomes thinner due to elastic deformation. Locking is performed, and the IC 20 is fixed to the PWB 5 with the terminal 1 compressed.

【0021】このような膨大部22によりロックピン2
が取り付け穴3にロックされた状態では、端子1はパッ
ド4に圧接し、パッド4を介してPWB5に設けられた
回路に電気的に接続される。
The lock pin 2 is formed by such an enlarged portion 22.
When the terminal 1 is locked in the mounting hole 3, the terminal 1 is pressed against the pad 4 and is electrically connected to a circuit provided in the PWB 5 via the pad 4.

【0022】IC20をPWB5から取り外すときは、
基板21をつかみ膨大部22の弾性力に抗して膨大部2
2を細く変形させてロックピン2を取り付け穴3から引
き抜く。
When removing the IC 20 from the PWB 5,
Grasping the substrate 21 and expanding the elastic part 2 against the elastic force of the expanding part 22
2 is thinly deformed and the lock pin 2 is pulled out from the mounting hole 3.

【0023】なお、ロックピン2を基板21の回路に接
続しておき、取り付け穴3をPWB5の回路に接続され
たスルーホールとしておくことにより、ロックピン2を
介して基板21とPWB5との回路を電気的に接続する
ようにすることもできる。
The lock pin 2 is connected to the circuit of the board 21 and the mounting hole 3 is formed as a through-hole connected to the circuit of the PWB 5, so that the circuit between the board 21 and the PWB 5 May be electrically connected.

【0024】また、ロックピン2は、上述のような形状
に限られず、例えば一対の並立する細い板ばねの先端部
を外側へ湾曲させたようなものでもよい。
Further, the lock pin 2 is not limited to the above-described shape, but may be, for example, a pair of thin flat plate springs whose distal ends are curved outward.

【0025】端子1も上述のようなものに限られず、例
えば折り曲げた細い板ばねをPWB5に固着し、その先
端が弾性により撓むようにしたものや、コイルばねをそ
のままPWB5に固着したものや、導電性のあるゴムを
PWB5に固着したものでもよい。さらに、ばねやゴム
のように特に弾性が大きいものでなくても半田バンプ等
のように少しの弾性または塑性を有するものをPWB5
に固着し、PWB5上のパッドに圧接するようにしても
よい(半田バンプを溶かすことなく)。ただし半田バン
プのような柔軟性の小さいものを端子とした場合は、基
板の下面及びPWB5の上面の平面度並びに半田バンプ
の高さを高精度に出しておく必要がある。
The terminal 1 is not limited to the one described above. For example, a terminal in which a bent thin plate spring is fixed to the PWB 5 and its tip is elastically bent, a terminal in which the coil spring is fixed to the PWB 5 as it is, Rubber having a property may be fixed to PWB5. Further, even if the elasticity or plasticity is not particularly large, such as a spring or rubber, a material having a little elasticity or plasticity, such as a solder bump, may be used as PWB5.
And may be pressed against the pad on the PWB 5 (without melting the solder bumps). However, when a terminal having low flexibility such as a solder bump is used as the terminal, it is necessary to accurately determine the flatness of the lower surface of the substrate and the upper surface of the PWB 5 and the height of the solder bump.

【0026】また、ロックピンは、ICの基板の下面の
4隅に4本設ける場合に限られず、5本以上又は3本以
下のロックピンをIC上の適宜な位置に設けてもよい。
The number of lock pins is not limited to four at four corners on the lower surface of the IC substrate, and five or more or three or less lock pins may be provided at appropriate positions on the IC.

【0027】[0027]

【発明の効果】第1の効果は、ICのPWBに対する取
り付け、取り外しが容易で、ICの交換が必要となった
場合のICの脱着の工数を大幅に減少させることができ
る。
The first effect is that the IC can be easily attached to and detached from the PWB, and the number of steps for attaching and detaching the IC when the IC needs to be replaced can be greatly reduced.

【0028】その理由は、ICの端子をPWBのパッド
に圧接させた状態をロックピンをPWBの穴に挿入する
ことで保持し、ICの実装に半田を用いてなく、半田を
溶かす必要がないからである。
The reason is that the state in which the terminal of the IC is pressed against the pad of the PWB is held by inserting the lock pin into the hole of the PWB, so that solder is not used for mounting the IC and there is no need to melt the solder. Because.

【0029】第2の効果は、ICの製造に図5に示すI
C12のように多くの費用を必要としないことである。
The second advantage is that the IC shown in FIG.
It does not require much cost as C12.

【0030】その理由は、IC12のように全てのリー
ドにばね部を設ける必要がなく、ロックピンのみに弾性
変形する膨大部を設けるだけですむからである。端子と
しては、半田バンプを用いることもできるし、端子に弾
性を持たせるとしても圧縮さえできればよいので板ばね
や導電性ゴムを用いることができ、端子は非常に安く製
造できる。
The reason is that it is not necessary to provide springs on all the leads as in the case of the IC 12, and it is only necessary to provide an enormous portion which is elastically deformed only on the lock pin. As the terminals, solder bumps can be used, and even if the terminals have elasticity, they only need to be compressed, so that leaf springs or conductive rubber can be used, and the terminals can be manufactured at very low cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の形態のIC20の側面図であ
る。
FIG. 1 is a side view of an IC 20 according to an embodiment of the present invention.

【図2】図1に示すIC20のPWB5への実装構造を
示す側断面図である。
FIG. 2 is a side sectional view showing a mounting structure of the IC 20 shown in FIG. 1 on a PWB 5;

【図3】従来のIC10のPWB5への実装構造を示す
側断面図である。
FIG. 3 is a side sectional view showing a mounting structure of a conventional IC 10 on a PWB 5.

【図4】従来の他のIC11のPWB5への実装構造を
示す側断面図である。
FIG. 4 is a side sectional view showing a mounting structure of another conventional IC 11 on a PWB 5;

【図5】従来のさらに他のIC12のPWB5への実装
構造を示す側断面図である。
FIG. 5 is a side sectional view showing a conventional mounting structure of still another IC 12 on a PWB 5;

【符号の説明】[Explanation of symbols]

1 端子 2 ロックピン 3 穴 4 パッド 5 PWB 6 半田 10 IC 11 IC 12 IC 13 ピン 14 スルーホール 15 リード 17 リード 18 ばね部 20 IC 21 基板 22 膨大部 DESCRIPTION OF SYMBOLS 1 Terminal 2 Lock pin 3 Hole 4 Pad 5 PWB 6 Solder 10 IC 11 IC 12 IC 13 Pin 14 Through hole 15 Lead 17 Lead 18 Spring part 20 IC 21 Substrate 22 Enlarged part

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 基板上に設けられ先端に細くなるように
弾性変形可能な膨大部を有したロックピンと、前記基板
上に設けられた端子とを含むことを特徴とする集積回路
装置。
1. An integrated circuit device, comprising: a lock pin provided on a substrate and having a bulging portion capable of being elastically deformed so as to be thin at a tip, and a terminal provided on the substrate.
【請求項2】 前記端子は、弾性により圧縮されうるこ
とを特徴とする請求項1記載の集積回路装置。
2. The integrated circuit device according to claim 1, wherein said terminals can be compressed by elasticity.
【請求項3】 前記ロックピンをプリント基板に設けら
れた穴に差し込んで前記基板を前記プリント基板に向け
て押しつけ、前記端子を前記プリント基板上のパッドに
圧接させると共に前記膨大部を前記穴から突き抜けさせ
ることを特徴とする請求項1又は2記載の集積回路装置
をプリント基板に実装する方法。
3. Inserting the lock pin into a hole provided in a printed circuit board, pressing the board toward the printed circuit board, pressing the terminal against a pad on the printed circuit board, and moving the enlarged portion from the hole. 3. The method for mounting an integrated circuit device on a printed circuit board according to claim 1, wherein the integrated circuit device is penetrated.
【請求項4】 前記ロックピンがプリント基板に設けら
れた穴に挿入して前記膨大部が前記穴を突き抜け、前記
端子が前記プリント基板上のパッドに圧接していること
を特徴とする請求項1又は2記載の集積回路装置のプリ
ント基板への実装構造。
4. The device according to claim 1, wherein said lock pin is inserted into a hole provided in a printed circuit board, said enlarged portion penetrates said hole, and said terminal is pressed against a pad on said printed circuit board. 3. A mounting structure of the integrated circuit device according to 1 or 2 on a printed circuit board.
JP20168497A 1997-07-28 1997-07-28 Package structure and method of integrated circuit device Pending JPH1146052A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20168497A JPH1146052A (en) 1997-07-28 1997-07-28 Package structure and method of integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20168497A JPH1146052A (en) 1997-07-28 1997-07-28 Package structure and method of integrated circuit device

Publications (1)

Publication Number Publication Date
JPH1146052A true JPH1146052A (en) 1999-02-16

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP20168497A Pending JPH1146052A (en) 1997-07-28 1997-07-28 Package structure and method of integrated circuit device

Country Status (1)

Country Link
JP (1) JPH1146052A (en)

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