JPH1141946A - Inverter equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the overcurrent protection function fully workable when an arm of the switching element of an inverter is short-circuited through restricting the increase in the bias current of a DC reactor by bypassing the part of a charging current of a snubber capacitor of the inverter, when an inverter having DC reactor shifts from a reflux mode to a power mode. SOLUTION: In an inverter equipment, in which a return diode 3 is connected in parallel to a DC reactor 2 for restricting a current rise rate between a DC voltage source 1 and an inverter 7 and a snubber circuit 4, is connected in parallel with the return diode 3, an LC series circuit 14 of a capacitor 15 and a reactor 16 is connected in parallel to the DC reactor 2, and the LAC parallel circuit 14 functions as a bias current increase which restricts circuit of the DC reactor 2. By doing this, the inverter overcurrent protection circuit 13 can be operated reliably.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter device in which a high-power switching element such as a GTO (gate turn-off) thyristor is connected in a bridge type to convert a rated DC voltage into an AC voltage and supply the converted DC voltage to a load.

[0002]

2. Description of the Related Art A high-power inverter device used in a reactive power compensator installed in a substation generally has a circuit configuration as shown in FIG. The inverter device shown in FIG. 3 converts the rated DC voltage of the DC voltage source 1 into an AC voltage by the inverter 7 and supplies the converted DC voltage to the load 11, and suppresses the current increase rate of the inverter protection means between the inverter 7 and the DC voltage source 1. DC reactor 2 is connected, and inverter 7
Is provided with an inverter overcurrent protection circuit 13 for protecting the inverter 7 from overcurrent when the arm is short-circuited.

[0003] Inverter 7, in the first to fourth bridge circuit of the switching elements 8 _{1-8 4} such GTO thyristors, the first and second switching elements 8 _1, 8 ₂ of the series circuit and the third to 4 switching elements 8 ₃ and 8 ₄ are connected in parallel, and the connection point of the first and second switching elements 8 ₁ and 8 ₂ and the third and fourth switching elements 8
_3, the load 11 is connected between the 8 _fourth connection point. Each switching element 8 _{1-8 4} each to the return diode 9, ...
There are anti-parallel connected, the switching elements 8 _{1-8 4} snubber capacitor 10 to each of, ... are connected in parallel. Incidentally, it referred hereinafter each switching element 8 in the case of not identifying each switching element 8 _{1-8 4.}

A return diode 3 is connected to the DC reactor 2 in parallel, and a snubber circuit 4 which is a series circuit of a capacitor 5 and a resistor 6 is connected in parallel to the return diode 3. The inverter overcurrent protection circuit 13 is connected to the inverter 7
The current detector 12 detects a short-circuit current at the time of arm short-circuit due to the failure of any of the switching elements, and forcibly turns off other normal switching elements to protect them. The DC reactor 2 limits the upper limit of the current flowing to the other normal switching elements when the arm is short-circuited, so that the other normal switching elements are surely turned off.

The above-described inverter device operates by controlling the on / off of each switching element 8 of the inverter 7 to repeat the freewheel mode and the powering mode. During this operation, a bias current corresponding to a load current is returned to the DC reactor 2 through the return diode 3. Here, when the inverter 7 shifts from the freewheel mode to the powering mode, the inverter current I _{INV is} the sum of the load current and the charging current of the snubber capacitor 10 charged in the freewheel mode, as shown by the current waveform A in FIG. Flows. The hatched portion of the current waveform A in FIG. 2 is the charging current of the snubber capacitor, and the inverter current I _INV exceeds the DC reactor bias current by the amount of the charging current, and is indicated by the solid line voltage waveform D of FIG. Spike-like voltage V
_L occurs. The peak value of voltage _VL is proportional to the rate of increase of the inverter current I _INV beyond the DC reactor bias current.

When a spike-shaped voltage _VL is generated at both ends of the DC reactor 2, the current I flowing through the DC reactor 2
_L increases from the steady value as shown by the solid line current waveform E in FIG. At this time, the inverter current I _INV passes through the DC reactor 2 and the snubber circuit 4, and charges the capacitor 5 of the snubber circuit 4 with the current I _DS shown by the current waveform B of FIG. When the charging current of the snubber capacitor 10 of the inverter 7 decreases, the charging current of the capacitor 5 of the snubber circuit 4 discharges through the DC reactor 2 and the bias current of the DC reactor 2 increases, while the DC reactor 2 and its return current increase. The bias current decreases due to loss such as heat generation of the diode 3, and the bias current becomes constant when the current increase and the current decrease are balanced.

In the above-described inverter operation, if a part of the switching element 8 of the inverter 7 fails and causes an arm short circuit, the inverter overcurrent protection circuit 13 operates. For example, the first switching element ₈₁ of the inverter 7 is turned on, the second switching element ₈₂ is the cause of the second arm short switching element ₈₂ has failed at the time of power running mode off, in this case the short-circuit current is forcibly turned off the first switching element ₈₁ by detecting the inverter overcurrent protection circuit 13 protects the first switching element ₈₁ normal.

[0008]

By the way, in an initial stage in which an arbitrary switching element 8 of the inverter 7 fails and an arm short circuit occurs, a bias current flowing back to the DC reactor 2 and the return capacitor 3 causes a short circuit current to the inverter 7. However, as the bias current increases, it becomes more difficult to forcibly turn off the switching element 8 by the inverter overcurrent protection circuit 13. In other words, the inverter overcurrent protection circuit 13 is designed to forcibly turn off the switching element 8 by forcibly cutting off the gate signal of the switching element 8 such as a GTO thyristor. If the switching element 8 is forcibly turned off while the above current is flowing, the switching element 8 may be broken,
This may occur in the inverter device of FIG. 3 due to the increase in the bias current, and the inverter overcurrent protection circuit 13 may not function normally.

An object of the present invention is to provide an inverter device in which the inverter overcurrent protection circuit functions normally when the arm of the inverter is short-circuited.

[0010]

According to the present invention, a series circuit of a pair of switching elements and a series circuit of another pair of switching elements are connected in parallel, and a load is connected between the switching element connection points of each series circuit. In addition, an inverter in which a snubber capacitor and a return diode for switching element are connected in parallel to each of the switching elements, a rated DC voltage source connected to the DC side of the inverter, and an inverter connected between the DC voltage source and the inverter. A DC reactor for suppressing a current rise rate, a reflux diode for the DC reactor connected in parallel to the DC reactor, a snubber circuit connected in parallel to the reflux diode for the DC reactor,
In an inverter device including an inverter overcurrent protection circuit that detects a short-circuit current at the time of arm short-circuit due to an arbitrary switching element failure of the inverter and turns off another normal switching element, the DC reactor includes:
The above object is achieved by connecting the LC series circuit of the capacitor and the reactor in parallel.

Here, the LC series circuit newly connected in parallel to the DC reactor has a bias flowing through the DC reactor by bypassing a part of the charging current of the snubber capacitor of the inverter when the inverter shifts from the reflux mode to the powering mode. It is used as a DC reactor bias current increase suppression circuit that suppresses an increase in current. In this LC series circuit, the bias current of the DC reactor when shifting from the reflux mode to the powering mode of the inverter is suppressed, and the function of the inverter overcurrent protection circuit attached to the inverter is stably exhibited.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment in which the present invention is applied to the inverter device of FIG. 3 is shown in FIG. 1. The inverter device of FIG. 1 includes a DC reactor 2 in which a capacitor 15 and an LC series circuit 14 of a reactor 16 are connected. It is characterized by being connected in parallel, and the same or corresponding parts as those of FIG. 3 of FIG.

The LC series circuit 14 controls the return of the inverter 7
Flow to DC reactor 2 when shifting from power mode to power running mode.
The increase of the bias current is suppressed as follows. That is,
ON / OFF control of each switching element 8 of the inverter 7
In the operation of repeating the recirculation mode and the powering mode,
The DC reactor 2 is negatively connected through its return diode 3.
The bias current corresponding to the load current returns, and in this state the inverter
When the motor 7 shifts from the recirculation mode to the powering mode,
Load current and charging current of snubber capacitor 10 in barter 7
Inverter current I_INVFlows. At this time,
The charging current of the capacitor 10 is a snubber for a DC reactor.
The current I of the current waveform B shown in FIG. _DSAnd LC series
The current I of the current waveform C shown in FIG._LCDivert to
You. This shunt of the snubber capacitor charging current directly
The voltage at both ends of the flow reactor 2 is indicated by a chain voltage waveform D 'in FIG.
Spike-like voltage V with a low peak value suppressed
_LOccurs. The capacitor 15 of the LC series circuit 14 is
The charging of the snubber capacitor 10 of the inverter 7 ends.
Is discharged through the DC reactor 2.

The effect of suppressing the peak value of the spike voltage _VL by the LC series circuit 14 is determined by the current value bypassing the LC series circuit 14, and it is sufficient that this peak value can be suppressed to about half of the conventional value. Further, the peak value suppression of such spike voltage V _L, the increase in current I _L flowing through the DC reactor 2 is suppressed as shown in chain line current waveform E 'of FIG. 2, the DC reactor second bias current The increase is halved compared to the conventional model. As a result, when the inverter overcurrent protection circuit 13 detects the short-circuit current and forcibly turns off the normal switching element 8, the bias current of the DC reactor 2 is suppressed to be small, so that the switching element 8 is forcibly turned off. It becomes possible.

[0015]

According to the present invention, when the LC series circuit connected in parallel with the DC reactor on the DC side of the inverter shifts from the reflux mode to the powering mode of the inverter, a part of the charging current of the snubber capacitor for the switching element of the inverter is changed. , The increase in the bias current flowing back to the DC capacitor is suppressed, and the inverter overcurrent protection circuit functions more reliably when the arm is short-circuited due to the failure of the switching element of the inverter. Reliability is improved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an inverter device showing one embodiment of the present invention.

FIG. 2 is a diagram showing current and voltage waveforms at respective parts of the circuit when the present invention and a conventional inverter device shift from a freewheeling mode to a powering mode.

FIG. 3 is a circuit diagram of a conventional inverter device having a DC reactor specification.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 DC voltage source 2 DC reactor 3 Reflux diode 4 Snubber circuit 7 Inverter 8 Switching element 9 Reflux diode 10 Snubber capacitor 11 Load 13 Inverter overcurrent protection circuit 14 LC series circuit 15 Capacitor 16 Reactor

Claims (1)

[Claims] 1. A series circuit of a pair of switching elements and a series circuit of another pair of switching elements are connected in parallel, a load is connected between switching element connection points of each series circuit, and each of the switching elements is connected to each other. An inverter in which a snubber capacitor and a return diode for a switching element are connected in parallel; a rated DC voltage source connected to the DC side of the inverter; and a DC reactor for suppressing a current rise rate connected between the DC voltage source and the inverter. A DC reactor return diode connected in parallel to the DC reactor, a snubber circuit connected in parallel to the DC reactor return diode, and a short-circuit current when an arm short-circuit occurs due to a failure of any switching element of the inverter. Inverter overcurrent that turns off other normal switching elements In the inverter device provided with a protection circuit, said DC reactor, the capacitor and the reactor LC
An inverter device in which a series circuit is connected in parallel to suppress an increase in a bias current flowing in a DC reactor when the inverter shifts from a reflux mode to a powering mode in the LC series circuit.