JPH11341855A - Phase sensor - Google Patents

Phase sensor

Info

Publication number
JPH11341855A
JPH11341855A JP10142996A JP14299698A JPH11341855A JP H11341855 A JPH11341855 A JP H11341855A JP 10142996 A JP10142996 A JP 10142996A JP 14299698 A JP14299698 A JP 14299698A JP H11341855 A JPH11341855 A JP H11341855A
Authority
JP
Japan
Prior art keywords
phase
output
calculator
outputs
allowable range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10142996A
Other languages
Japanese (ja)
Other versions
JP3403069B2 (en
Inventor
真一 ▲高▼野
Shinichi Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Heavy Industries Ltd
Original Assignee
Mitsubishi Heavy Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Heavy Industries Ltd filed Critical Mitsubishi Heavy Industries Ltd
Priority to JP14299698A priority Critical patent/JP3403069B2/en
Publication of JPH11341855A publication Critical patent/JPH11341855A/en
Application granted granted Critical
Publication of JP3403069B2 publication Critical patent/JP3403069B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Feedback Control In General (AREA)
  • Control Of Electric Motors In General (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a phase sensor excluding the possibility whereby it outputs an erroneous phase, even when a plurality of phase computers output simultaneously improper values. SOLUTION: A phase sensor has a phase-tolerance computer 5 for computing the phase tolerance of a following period based on the outputs of an estimation- phase computer 2 and a phase-difference computer 4. Heren, there is further provided a tolerance determining means 6, which determines whether the output of phase computers 8, 8 lies within the range of the output of the phase- tolerance computer 5 or not, after determining that the outputs of the plurality of phase computers 8, 8 are identical with each other.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は位相検出器に係り、
特に車両駆動用同期式交流電動機の位相を検出する位相
検出器に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase detector,
In particular, the present invention relates to a phase detector for detecting a phase of a synchronous AC motor for driving a vehicle.

【0002】[0002]

【従来の技術】従来より同期式交流電動機で駆動される
車両では、電動機の制御にインバータが使用され、図2
のような構成で制御が行なわれている。図2では電動機
11が指令値9にしたがって動作するよう制御装置10
が3相交流を発生し制御を行なうが、出力する3相交流
の位相を決定するために電動機11の位相を検出する必
要がある。この位相を検出するために位相検出器12が
電動機11に付設され、その位相検出信号を制御装置1
0に取込むように構成されている。
2. Description of the Related Art Conventionally, in a vehicle driven by a synchronous AC motor, an inverter is used for controlling the motor.
The control is performed by the following configuration. In FIG. 2, the control device 10 controls the motor 11 to operate in accordance with the command value 9.
Generates and controls three-phase AC, but it is necessary to detect the phase of the motor 11 in order to determine the phase of the three-phase AC to be output. In order to detect this phase, a phase detector 12 is attached to the electric motor 11, and the phase detection signal is sent to the control device 1
0 is configured.

【0003】図3に前記システムに用いられる従来の位
相検出器の構成を示す。図3において、従来の位相検出
器12は、検出手段7が検出する電動機11の位相信号
から、一定時間毎に一対の位相演算器8、8が位相を演
算し、判定手段13で2つの演算結果が等しいかどうか
判定を行なう。また、1周期前の位相検出器出力を記憶
する記憶手段1の出力と現在の位相検出器出力の差を演
算する位相差演算器4を有し、この位相差演算器4の出
力と現在の位相演算器出力から推定位相演算器2が次の
周期の推定位相を出力する。
FIG. 3 shows a configuration of a conventional phase detector used in the system. In FIG. 3, a conventional phase detector 12 is configured such that a pair of phase calculators 8, 8 calculates a phase at predetermined time intervals from a phase signal of the electric motor 11 detected by the detection means 7, Determine if the results are equal. Further, there is provided a phase difference calculator 4 for calculating a difference between the output of the storage means 1 for storing the output of the phase detector one cycle before and the current phase detector output. The estimated phase calculator 2 outputs the estimated phase of the next cycle from the output of the phase calculator.

【0004】選択器3は判定手段13の出力に基き、2
つの位相演算器8、8の出力が等しければ位相演算器8
の出力を、等しくなければ推定位相演算器2の出力を位
相検出器12の出力とする。
[0004] The selector 3 is based on the output of the judgment means 13,
If the outputs of the two phase calculators 8 are equal, the phase calculator 8
If the outputs are not equal, the output of the estimated phase calculator 2 is used as the output of the phase detector 12.

【0005】[0005]

【発明が解決しようとする課題】前記従来技術における
位相演算器8は、ノイズなどの外的要因で誤った演算結
果を出力することがあり、従来の技術では上記の通り2
つあるいはそれ以上の位相演算器8の出力を取り込んで
比較することで位相検出器出力から誤りを取り除いてい
る。ところが車両に搭載して使用する場合、ノイズなど
の面で悪環境にさらされることが多く、特に検出手段7
の出力にノイズが重畳されることにより位相演算器8の
出力が2つとも誤った値となり、この場合図3に示す従
来技術では、2つの位相演算器8、8の出力が等しけれ
ば位相演算器8の出力を位相検出器12の出力とするた
めに、誤った位相を出力してしまう可能性があった。
The phase calculator 8 in the prior art sometimes outputs an incorrect calculation result due to external factors such as noise.
Errors are removed from the output of the phase detector by taking in and comparing the outputs of one or more phase calculators 8. However, when used in a vehicle, it is often exposed to an adverse environment such as noise.
Is superimposed on the output, the output of both phase calculators 8 becomes an erroneous value. In this case, in the prior art shown in FIG. 3, if the outputs of the two phase calculators 8 and 8 are equal, the phase calculation is performed. In order to use the output of the detector 8 as the output of the phase detector 12, there is a possibility that an incorrect phase is output.

【0006】本発明はかかる従来技術の課題に鑑み、2
つの位相演算器の出力が等しい場合においても誤った位
相を出力してしまう可能性を排除する位相検出器を提供
することを目的とする。
The present invention has been made in view of the problems of the prior art, and
An object of the present invention is to provide a phase detector that eliminates the possibility of outputting an incorrect phase even when the outputs of two phase calculators are equal.

【0007】[0007]

【課題を解決するための手段】請求項1記載の発明は、
図1に示すように、検出手段7が検出する位相信号か
ら、一定時間毎に複数の位相演算器8,8が夫々位相を
演算し、該複数の位相演算器8,8の出力が等しければ
該位相演算器8の出力を、等しくなければ推定位相演算
器2の出力を、夫々位相検出器の出力とする位相検出器
において、次の周期の位相の許容範囲を演算する位相許
容範囲演算器5と、前記複数の位相演算器8の出力が等
しいかどうか判定する第1の判定手段13と、前記位相
演算器8の出力が位相許容範囲演算器5の出力の範囲に
入っているかどうかを判定する第2の判定手段6とを具
え、前記第1の判定手段13で複数の位相演算器8,8
の出力が等しいと判定した後、第2の判定手段6で位相
演算器8の出力が位相許容範囲演算器5の出力の範囲に
入っている場合に該位相演算器8の出力を、入っていな
い場合は推定位相演算器2の出力を位相検出器の出力と
することを特徴とするものである。
According to the first aspect of the present invention,
As shown in FIG. 1, from a phase signal detected by the detecting means 7, a plurality of phase calculators 8 and 8 respectively calculate the phases at regular intervals, and if the outputs of the plurality of phase calculators 8 and 8 are equal. A phase allowable range calculator for calculating the allowable range of the phase in the next cycle in a phase detector in which the output of the phase calculator 8 is not equal and the output of the estimated phase calculator 2 is the output of the phase detector. 5, a first determining means 13 for determining whether or not the outputs of the plurality of phase calculators 8 are equal, and determining whether or not the output of the phase calculator 8 is within the range of the output of the phase allowable range calculator 5. A second determining means 6 for determining a plurality of phase calculators 8, 8 in the first determining means 13;
Are determined to be equal to each other, if the output of the phase calculator 8 is within the range of the output of the phase allowable range calculator 5 by the second determination means 6, the output of the phase calculator 8 is included. When there is no output, the output of the estimated phase calculator 2 is used as the output of the phase detector.

【0008】尚、前記位相許容範囲演算器5は、請求項
2記載のように、1周期前の位相検出器出力と現在の位
相検出器出力の差を演算する位相差演算器4の出力と、
前記推定位相演算器2の出力とから次の周期の位相の許
容範囲を演算する位相許容範囲演算器であるのが好まし
い。
The phase allowable range calculator 5 calculates the difference between the output of the phase detector one cycle before and the output of the current phase detector, and ,
It is preferable to use a phase allowable range calculator for calculating the allowable range of the phase in the next cycle from the output of the estimated phase calculator 2.

【0009】[0009]

【発明の実施の形態】以下、本発明を図に示した実施例
を用いて詳細に説明する。但し、この実施例に記載され
る構成部品の寸法、形状、その相対配置などは特に特定
的な記載がない限り、この発明の範囲をそれのみに限定
する趣旨ではなく単なる説明例に過ぎない。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to an embodiment shown in the drawings. However, unless otherwise specified, dimensions, shapes, relative arrangements, and the like of the components described in this embodiment are not intended to limit the scope of the invention, but are merely illustrative examples.

【0010】図1は本発明を同期式3相交流電動機に実
施した場合の位相検出器の実施形態の構成をあらわして
いる。本発明の実施形態に係る位相検出器は、検出手段
7が検出して出力される電動機の位相信号から、一定時
間毎に位相演算器8、8が位相を演算し、判定手段13
で2つの演算結果が等しいかどうか判定を行なう。
FIG. 1 shows a configuration of an embodiment of a phase detector when the present invention is applied to a synchronous three-phase AC motor. In the phase detector according to the embodiment of the present invention, the phase calculators 8 and 8 calculate the phase at predetermined time intervals from the phase signal of the electric motor detected and output by the detection means 7, and the determination means 13
Is used to determine whether the two operation results are equal.

【0011】また、1周期前(T−1)の位相検出器出
力を記憶する記憶手段1の出力と現在の位相検出器出力
の差を演算する位相差演算器4を有し、この位相差演算
器4の出力と現在の位相演算器出力から推定位相演算器
2が次の周期の推定位相を出力する。さらに、推定位相
演算器2の出力と位相差演算器4の出力から次の周期の
位相の許容範囲を演算する位相許容範囲演算器5を有
し、位相演算器8の出力が位相許容範囲演算器5の出力
の範囲に入っているかどうかを許容範囲判定手段6が判
定する。
Further, there is provided a phase difference calculator 4 for calculating a difference between the output of the storage means 1 for storing the output of the phase detector one cycle before (T-1) and the current output of the phase detector. The estimated phase calculator 2 outputs the estimated phase of the next cycle from the output of the calculator 4 and the current output of the phase calculator. Further, there is provided a phase allowable range calculator 5 for calculating the allowable range of the phase in the next cycle from the output of the estimated phase calculator 2 and the output of the phase difference calculator 4, and the output of the phase calculator 8 calculates the phase allowable range. The allowable range determining means 6 determines whether the output is within the range of the output of the vessel 5.

【0012】選択器3は判定手段13と許容範囲判定手
段6の出力をアンドゲート19に入力させ、2つの演算
器8,8の出力が等しく、かつその出力が位相許容範囲
演算器5の出力の範囲に入っている場合にのみ演算器8
の出力を位相検出器の出力とし、それ以外の場合は推定
位相演算器2の出力を位相検出器の出力とする。
The selector 3 inputs the outputs of the judging means 13 and the allowable range judging means 6 to the AND gate 19, the outputs of the two arithmetic units 8, 8 are equal, and the output is the output of the phase allowable range arithmetic unit 5. Arithmetic unit 8 only when it is within the range
Is the output of the phase detector, otherwise the output of the estimated phase calculator 2 is the output of the phase detector.

【0013】以下図1に開示された位相検出器の動作
を、図4、図5に従って説明する。図4(A)は一方の
位相演算器8出力波形、図4(B)は他方の位相演算器
8出力波形、図5(A)は従来技術における選択器3に
より出力される位相検出器の出力波形、図5(B)は本
発明の実施形態の位相許容範囲演算器5の出力波形、図
5(C)は本発明の実施形態の位相検出器の出力波形を
示す。
The operation of the phase detector disclosed in FIG. 1 will be described below with reference to FIGS. 4 (A) shows the output waveform of one phase calculator 8, FIG. 4 (B) shows the output waveform of the other phase calculator 8, and FIG. 5 (A) shows the phase detector output from selector 3 in the prior art. FIG. 5B shows an output waveform of the phase allowable range calculator 5 of the embodiment of the present invention, and FIG. 5C shows an output waveform of the phase detector of the embodiment of the present invention.

【0014】2つの位相演算器8,8の出力は電動機が
正転している場合には図4(A)および(B)のように
なり、0〜360度の間の値を繰り返し出力する。これ
らの出力にはノイズなどによる〜のような不適切な
値が含まれている。従来の技術では、二つの出力値が一
致しない場合は位相検出器の出力は推定値による補正が
行なわれ、図5(A)のようになる。図4(A)の、
のように片方の出力のみが不適切である場合には推定
値による補正が行なわれるが、図4(A)の及び図4
(B)ののように同時に不適切な値が出力された場合
には図3に示す従来技術では、2つの位相演算器8、8
の出力が等しければ位相演算器8の出力を位相検出器の
出力としている為に、補正が行なわれず、図5(A)
のように位相検出器の出力にも不適切な値が含まれてし
まう。
The outputs of the two phase calculators 8 and 8 are as shown in FIGS. 4A and 4B when the motor is rotating forward, and repeatedly output a value between 0 and 360 degrees. . These outputs include inappropriate values such as due to noise. In the related art, when the two output values do not match, the output of the phase detector is corrected by the estimated value, as shown in FIG. In FIG. 4A,
When only one of the outputs is inappropriate as in (1), correction based on the estimated value is performed.
In the case where inappropriate values are output at the same time as in (B), in the prior art shown in FIG.
Are equal, the output of the phase calculator 8 is used as the output of the phase detector.
As described above, an inappropriate value is included in the output of the phase detector.

【0015】そこで本発明の実施形態では更に、位相演
算器8の出力が許容範囲にあるかどうかの判定を許容範
囲判定手段6にて行なう。位相許容範囲演算器5の出力
は図5(B)のようにハッチングで示す演算された許容
範囲が設定されている。
Therefore, in the embodiment of the present invention, it is further determined by the allowable range determining means 6 whether or not the output of the phase calculator 8 is within the allowable range. The calculated allowable range indicated by hatching is set for the output of the phase allowable range calculator 5 as shown in FIG.

【0016】従って、図4(A)の及び図4(B)の
のように同時に不適切な値が出力された場合には2つ
の位相演算器8、8の出力が等しい場合であっても、位
相演算器8の出力が許容範囲を外れているときには補正
が行なわれ、結果として位相検出器の出力は図5(C)
のように不適切な値が取り除かれたものとなる。
Therefore, when inappropriate values are output at the same time as shown in FIGS. 4A and 4B, even if the outputs of the two phase calculators 8 are equal to each other. When the output of the phase calculator 8 is out of the permissible range, the correction is performed, and as a result, the output of the phase detector becomes as shown in FIG.
Inappropriate values are removed as in

【0017】[0017]

【発明の効果】以上記載のごとく本発明によりば、複数
の位相演算器8、8の出力が等しく、具体的には同時に
不適切な値が出力された場合にも位相演算器8の出力が
許容範囲にあるかどうかの判定を許容範囲判定手段6に
て行なうために、誤った位相を出力してしまう可能性を
排除することが出来る。
As described above, according to the present invention, the outputs of the plurality of phase calculators 8 are equal, and more specifically, the output of the phase calculator 8 is output even when inappropriate values are output simultaneously. Since it is determined by the allowable range determining means 6 whether or not the phase is within the allowable range, the possibility of outputting an incorrect phase can be eliminated.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明を同期式3相交流電動機に実施した場
合の位相検出器の実施形態の構成図を示す。
FIG. 1 shows a configuration diagram of an embodiment of a phase detector when the present invention is applied to a synchronous three-phase AC motor.

【図2】 本発明が適用される車両用の同期式交流電動
機の制御構成図である。
FIG. 2 is a control configuration diagram of a synchronous AC motor for a vehicle to which the present invention is applied.

【図3】 同期式3相交流電動機に実施した場合の位相
検出器の従来技術の構成図を示す。
FIG. 3 shows a configuration diagram of a related art of a phase detector when applied to a synchronous three-phase AC motor.

【図4】 図4及び図5は、図1及び図3の位相検出器
の動作を示すグラフ図で、(A)は一方の位相演算器出
力波形、(B)は他方の位相演算器出力波形を夫々示
す。
FIGS. 4 and 5 are graphs showing the operation of the phase detector of FIGS. 1 and 3, wherein (A) is the output waveform of one phase calculator and (B) is the output of the other phase calculator. Each waveform is shown.

【図5】 (A)は従来技術における選択器3により出
力される位相検出器の出力波形、(B)は本発明の実施
形態の位相許容範囲演算器5の出力波形、(C)は本発
明の実施形態の位相検出器の出力波形である。
5A is an output waveform of a phase detector output by a selector 3 according to the related art, FIG. 5B is an output waveform of a phase allowable range calculator 5 according to the embodiment of the present invention, and FIG. 4 is an output waveform of the phase detector according to the embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 記憶手段 2 推定位相演算器 3 選択器 4 位相差演算器 5 位相許容範囲演算器 6 許容範囲判定手段 7 検出手段 8 位相演算器 9 指令値 10 制御装置 11 電動機 12 位相検出器 13 判定手段 REFERENCE SIGNS LIST 1 storage means 2 estimated phase calculator 3 selector 4 phase difference calculator 5 phase allowable range calculator 6 allowable range determination means 7 detection means 8 phase calculator 9 command value 10 control device 11 motor 12 phase detector 13 determination means

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 検出手段が検出する位相信号から、一定
時間毎に複数の位相演算器が夫々位相を演算し、該複数
の位相演算器の出力が等しければ該位相演算器の出力
を、等しくなければ推定位相演算器の出力を、夫々位相
検出器の出力とする位相検出器において、 次の周期の位相の許容範囲を演算する位相許容範囲演算
器と、前記複数の位相演算器の出力が等しいかどうか判
定する第1の判定手段と、前記位相演算器の出力が位相
許容範囲演算器の出力の範囲に入っているかどうかを判
定する第2の判定手段とを具え、 前記第1の判定手段で前記複数の位相演算器の出力が等
しいと判定した後、第2の判定手段で前記位相演算器の
出力が位相許容範囲演算器の出力の範囲に入っている場
合に該位相演算器の出力を、入っていない場合は推定位
相演算器の出力を、夫々位相検出器の出力とすることを
特徴とする位相検出器。
1. A plurality of phase calculators respectively calculate a phase from a phase signal detected by a detecting means at regular time intervals. If the outputs of the plurality of phase calculators are equal, the outputs of the phase calculators are equal. Otherwise, the output of the estimated phase calculator is the output of the phase detector, and the output of the plurality of phase calculators is a phase tolerance calculator that calculates the tolerance of the phase in the next cycle. First determining means for determining whether or not they are equal to each other; and second determining means for determining whether or not the output of the phase calculator is within the range of the output of the phase allowable range calculator. Means for judging that the outputs of the plurality of phase calculators are equal to each other, and when the output of the phase calculator falls within the range of the output of the phase allowable range calculator by the second determination means, Output, if not, estimated position The output of the arithmetic unit, a phase detector, characterized in that the respective outputs of the phase detector.
【請求項2】 前記位相許容範囲演算器が、1周期前の
位相検出器出力と現在の位相検出器出力の差を演算する
位相差演算器の出力と、前記推定位相演算器の出力とか
ら次の周期の位相の許容範囲を演算する位相許容範囲演
算器であることを特徴とする請求項1記載の位相検出
器。
2. The method according to claim 1, wherein the allowable range calculator calculates an output of a phase difference calculator for calculating a difference between a phase detector output one cycle before and a current phase detector output, and an output of the estimated phase calculator. 2. The phase detector according to claim 1, wherein the phase detector is a phase allowable range calculator for calculating the allowable range of the phase in the next cycle.
JP14299698A 1998-05-25 1998-05-25 Phase detector Expired - Fee Related JP3403069B2 (en)

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