JPH11330998A - Receiver for digital sound broadcasting - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a DAB receiver from having abrupt variation in sound volume due to an error of DRC data. SOLUTION: This receiver is provided with a receiving circuit 12 which receives a digital sound broadcast and circuits 13 to 17 which extract a digital audio signal and DRC data from the signal received by the receiving circuit 12. Further, the receiver is provided with a D/A converter circuit 19 which converts the extracted digital audio signal to an analog audio signal and outputs it and a circuit 18 which controls the gain of an audio signal line according to the extracted DRC data. The variation width of the gain that the extracted DRC data indicates is decided. When this variation width exceeds a prescribed value, control over the gain by the DRC data is limited.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital audio broadcasting receiver.

[0002]

2. Description of the Related Art DAB (Eur
There is digital audio broadcasting according to the Eka 147 standard), but this DAB has a function for a broadcasting station to control the gain of an audio signal line in a receiver.

[0003] This function is called DRC (Dynamic Range Control). And this DRC
In order to realize the above, the broadcast station adds control data called DRC data to original digital audio data and transmits the data.

FIG. 3 shows the structure of data transmitted by a broadcasting station. This data is composed of a plurality of frames. At the head of each frame, a header is arranged, followed by audio data, SCF, and the like. In this case, the audio data is the original linear digital audio data,
The data is compressed according to the MPEG audio layer II, and the SCF is a scale factor at the time of the data compression.

[0005] Following these data, the SCF
Error check code SCF-CRC is placed, and F-
A 2-byte area called PAD is prepared, and this area F-
DRC data is arranged in 6 bits of the PAD. In the case of mode II, for example, since the frame period is 24 ms, the DRC data is also transmitted every 24 ms.

The relationship between the DRC data and the gain of the audio signal line is as follows: DRC data gain: 000000: 0 dB (reference gain) 000001: +0.25 dB 000010: +0.50 dB 000011: +0.75 dB…. 0.25 dB step 111111: +15.75 dB.

[0007] Therefore, when, for example, "0000011" is sent as DRC data from a broadcasting station, the gain of the audio signal line of the receiver is increased by 0.75 dB, and as a result, the volume of the receiver is lower than the volume set by the user. Also 0.
It increases by 75dB. Therefore, for example, in the case of an emergency broadcast, by forcibly increasing the volume of the receiver,
It is possible to ensure that the listener can hear the emergency broadcast.

[0008]

However, the DAB does not have an error check or error correction mechanism for the F-PAD area or the DRC code.

For this reason, even if an error occurs in the received DRC data due to strong fading, multipath, or the like, the error cannot be detected or corrected. Due to an error, the volume may suddenly increase.

When the DRC data is received from a position where a large gain is indicated, the volume may suddenly become large as compared with the volume immediately before.

The present invention seeks to solve these problems.

[0012]

According to the present invention, a broadcasting station transmits a digital audio signal and adds DRC data for controlling a gain of an audio signal line of a receiver to the digital audio signal. A receiver for receiving the digital audio broadcast, a receiver for receiving the digital audio broadcast, a circuit for extracting the digital audio signal and the DRC data from the signal received by the receiver, and a receiver for receiving the digital audio broadcast. A D / A converter circuit for D / A converting a digital audio signal into an analog audio signal and outputting the analog audio signal; and a circuit for controlling a gain of an audio signal line in accordance with the extracted DRC data. The change width of the gain indicated by the data is determined, and this change width is When exceeding value is the DRC
The present invention is a digital audio broadcast receiver in which the control of the gain by data is limited. Therefore,
When the received DRC data indicates a change in gain equal to or greater than a specified value due to an error, the change in gain is limited.

[0013]

FIG. 1 shows an embodiment of a DAB receiver according to the present invention. The DAB broadcast wave signal is received by the antenna 11, and the received signal is transmitted to a front-end circuit 12 configured in a superheterodyne format.
And is converted to an intermediate frequency signal, and this intermediate frequency signal is supplied to the A / D converter circuit 13 to be converted into a digital signal.

The digital signal is supplied to a quadrature demodulation circuit 14 to demodulate the baseband I-component and Q-component signals, and these signals are supplied to an FFT circuit 15 for OFDM demodulation. The data is supplied to the Viterbi decoder circuit 16 where deinterleaving and error correction are performed, and a program (channel) is selected to select digital audio data of a target program.

Subsequently, the selected data is supplied to an audio decoder circuit 17, where decoding processing such as data expansion is performed, and digital audio data of a target program is extracted from the decoder circuit 17. And the extracted digital audio data is
The signal is supplied to a D / A converter circuit 19 through a gain control circuit 18 for DRC, and is D / A converted into left and right channel analog audio signals. These signals are supplied to speakers 22L and 22R through amplifiers 21L and 21R.

A synchronizing circuit 31 is provided for synchronizing control. The I- and Q-component signals are supplied from the quadrature demodulation circuit 14 to the synchronizing circuit 31 to form a frequency synchronizing correction signal. Front end circuit 12
And supplied to the Viterbi decoder circuit 16. A microcomputer 32 is provided for system control, and a predetermined signal is accessed between the microcomputer 32 and the synchronization circuit 31, and a predetermined signal is also accessed between the circuits 16 and 18.

Further, the microcomputer 32 includes:
As a part of the program executed by the microcomputer 32, for example, a DRC routine 100 as shown in FIG. 2 is prepared, and is executed by the microcomputer 32 every time one frame shown in FIG. 3 is received.

That is, when one frame is received,
The processing of the CPU (not shown) of the microcomputer 32 starts from step 101 of the routine 100. Next, in step 102, the DRC data and the error check code SCF-CRC are extracted from the received frame. The extracted DRC data is the latest data, which is referred to as data DNEW.

Then, the process proceeds to step 103. In step 103, the error check code SCF-CRC extracted in step 102 is used.
It is determined whether or not the received scale factor has an error.
Since it is highly likely that no error has occurred in the data DNEW, the process proceeds from step 103 to step 104.

In this case, the value of the DRC data is
Since the gain indicated by the DRC data is directly proportional to the gain as described above, if the DRC data changes and the gain changes, the change in the DRC data exceeds the allowable value. Exceeds the value ΔD corresponding to the allowable value.

In step 104, the latest DRC data DNEW extracted in step 102
And D that is stored beforehand, for example, one frame before
RC data DOLD is compared with the specified value Δ
D, that is, DNEW−DOLD ≦ ΔD
In the case of (1), since the change width of the gain due to the change of the DRC data DNEW is smaller than the allowable value, the processing is executed at step 104
To step 105, in which the latest DRC data DNEW is stored in the variable DSE for gain setting.
Set to T.

Subsequently, the process proceeds to step 106, where the value of the variable DSET (in this case,
DSET = DNEW) is the data DOL for the next frame
D, and then at step 107, the variable DSET is provided to the gain control circuit 18 so that the gain of the gain control circuit 18 is set to the variable DSET (in this case,
DSET = DNEW). Also,
The process proceeds to step 108, and this routine 100 ends.

Therefore, when the new DRC data DNEW can be normally received, and when the gain indicated by the DRC data DNEW does not give an abrupt gain change exceeding an allowable value, the audio signal line of the receiver is Is set to the gain indicated by the DRC data DNEW. That is, the DRC function operates as instructed by the broadcasting station.

However, in step 103, the error check code SCF-
When the CRC indicates an error, the DRC data DNE
Since there is a high possibility that W also has an error, the process proceeds from step 103 to step 108, and this routine 1
End 00.

Therefore, when the new DRC data DNEW is deemed to be abnormal, the gain of the audio signal line of the receiver is not changed.

In this case, in steps 105 and 1
06 is not executed, that is, the latest DRC data DNEW is not stored as data DOLD for the next frame. Therefore, at the time of the comparison in step 104, the DRC data DOLD is the DRC data of the previous frame.
It may be older DRC data instead of data.

Further, in step 104, when the comparison value between the latest DRC data DNEW and the previous DRC data DOLD is larger than the prescribed value ΔD, that is, when DNEW−DOLD> ΔD, the change in the DRC data DNEW is caused. Since the width of change of the gain is larger than the allowable value, the process proceeds to step 104.
To step 111, in which, for example, DSET = DOLD + ΔD is set, that is, the stored data DOLD
Is set to a variable DSET.

Subsequently, the process proceeds to step 106 where the value of the variable DSET (in this case,
DSET = DOLD + ΔD) is stored as data DOLD for the next frame, and then in step 107, the variable DSET is supplied to the gain control circuit 18, so that the gain of the gain control circuit 18 is set to the variable DSET (now In the case of, the gain is set to the value indicated by DSET = DOLD + ΔD). Further, the process proceeds to step 108, and this routine 100 ends.

Therefore, even if new DRC data DNEW can be received, the gain indicated by DRC data DNEW is
When an abrupt gain change exceeding the allowable value is given, the gain of the audio signal line of the receiver is increased by an allowable value from the previous gain (a value corresponding to DOLD + ΔD).
Is set to

Thus, in the above-described receiver, when the gain indicated by the received DRC data does not cause a sudden change in gain exceeding the allowable value, the gain of the audio signal line is changed to the gain indicated by the DRC data. And the DRC function is executed as instructed by the broadcasting station.

However, when the gain indicated by the received DRC data changes abruptly beyond the allowable value, the gain of the audio signal line is set to a gain that is larger than the previous gain by the allowable value. Therefore, due to strong fading, multipath, etc., the received DR
Even if an error occurs in the C data,
The volume does not increase suddenly.

For the same reason, even when the DRC data is received from a place where a large gain is indicated,
The volume does not suddenly become larger than the volume just before.

Further, even if the gain indicated by the received DRC data gives a sudden change in gain exceeding an allowable value, if the gain is repeated for each frame, this is due to an error. Instead, it is thought to be due to the instructions of the broadcasting station,
Since the gain is increased by the allowable value by the processing of step 111, the gain can be set to the gain intended by the broadcasting station as a result. Then, at that time, the volume gradually increases at a speed corresponding to the value ΔD.

In the above description, the gain control circuit 18 is provided on the digital audio signal line to control the gain.
For example, gain control can be performed in the amplifiers 21L and 21R.

In the above description, the gain increase is limited only when the gain indicated by the DRC data exceeds the allowable value in the upward direction. However, when the gain exceeds the allowable value in the downward direction, the decrease in the gain is limited. Then, it is possible to prevent the volume from suddenly decreasing due to the error of the DRC data.

Further, in the above description, when DRC data can be continuously received, in step 104, the latest DRC data DNEW is set to
It is compared with the C data DOLD, but can also be compared with the DRC data preceding by a predetermined number of frames.

In the above description, the intermediate frequency signal from the front end circuit 12 is quadrature-demodulated to obtain the I component and the Q component.
Component signals, A / D converting these signals, and then
It can be supplied to the FT circuit 15.

[0038]

According to the present invention, even if an error occurs in received DRC data due to strong fading, multipath, or the like, the error does not cause a sudden increase in volume. Also, even when the DRC data is received from a place where a large gain is indicated, the volume does not suddenly become large as compared with the volume immediately before.

[Brief description of the drawings]

FIG. 1 is a system diagram illustrating one embodiment of the present invention.

FIG. 2 is a flowchart illustrating one embodiment of the present invention.

FIG. 3 is a characteristic diagram for explaining the present invention.

[Explanation of symbols]

11: antenna, 12: front-end circuit, 13: A
/ D converter circuit, 14: orthogonal demodulation circuit, 15: FF
T circuit, 16 Viterbi decoder circuit, 17 audio decoder circuit, 18 gain control circuit, 19 D / A converter circuit, 21L and 21R amplifier, 22L and 22R speaker, 31 synchronization circuit, 32 microcomputer , 100 ... DRC routine

Claims (3)

[Claims] A receiver for receiving a digital audio broadcast which is transmitted by a broadcasting station transmitting a digital audio signal and adding DRC data for controlling a gain of an audio signal line of the receiver to the digital audio signal. , A receiving circuit for receiving the digital audio broadcast, a circuit for extracting the digital audio signal and the DRC data from the signal received by the receiving circuit, and D / A conversion of the extracted digital audio signal into an analog audio signal A D / A converter circuit for outputting the extracted DRC data, and a circuit for controlling the gain of the audio signal line in accordance with the extracted DRC data. When this variation exceeds the specified value, the DRC data Receiver for digital audio broadcasting to limit the control of the gain that. 2. The digital audio broadcasting receiver according to claim 1, wherein when the change width exceeds a prescribed value in the gain increasing direction, the control of the gain by the DRC data is limited. Digital audio broadcasting receiver. 3. The receiver for digital audio broadcasting according to claim 2, wherein when the change width exceeds a specified value in the gain increasing direction, the gain is increased by the specified value in the increasing direction. Digital audio broadcasting receiver.