JPH1131786A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit which comprises a circuit which observes a power source noise on a power source wiring formed on a semiconductor substrate. SOLUTION: On a circuit 116, a VSS observing wiring 204 and a VDD observing wiring 205 are led out of connection points VSS1 and VEE1, where a power source noise on a semiconductor substrate is to be observed and are connected to a VSS observation terminal 206 and a VDD observing terminal 207 on a surface layer 115. A measuring device 131 is connected to the VSS observation terminal 206 and the VDD observing terminal 207 to observe power source noise.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor integrated circuit having a circuit for observing power supply noise on power supply wiring formed on a semiconductor substrate.

[0002]

2. Description of the Related Art In recent years, the speed of digital processing devices such as electronic computers has been increased, and the speed of semiconductor integrated circuits used therein has been steadily increased. Accordingly, it is necessary to consider the influence of various noises that have not been a problem in the past. One of them is fluctuation of power supply voltage in a semiconductor integrated circuit, that is, power supply noise.

With the improvement of the operation speed of semiconductor integrated circuits,
The ratio of the time width of the power supply noise to the operation cycle increases. In addition, since the power supply voltage tends to be reduced in order to increase the speed and reduce the power of the semiconductor integrated circuit, the ratio of the voltage amplitude of the power supply noise to the power supply voltage also increases. further,
As the rise time of a signal is increased and the circuit density is increased, the magnitude of power supply noise itself tends to increase. If the power supply noise increases, it causes an increase in the delay time of the circuit or a malfunction, so that it is increasingly necessary to consider the influence of local power supply noise.

FIG. 3 shows a conventional method for observing power supply noise of a semiconductor integrated circuit. The semiconductor integrated circuit 116 has a multilayer structure, and includes a semiconductor substrate 111, a VSS power supply layer 112, a signal wiring layer 113, a VDD power supply layer 114, and a surface layer 1.
15 is comprised. The semiconductor substrate 111 mainly includes a semiconductor and a wiring conductor, and includes the circuit element 101 and the signal wiring 10.
2. Power supply wiring VSS, power supply wiring VDD, etc. are formed. The VSS power supply layer 112 and the VDD power supply layer 114 are generally mesh-shaped or plate-shaped, and
The power supply wiring VSS and the power supply wiring VDD on the power supply line 1 are connected at a plurality of locations to supply power. The signal wiring layer 113 is used when wiring of a portion that cannot be connected in the semiconductor substrate 111 is performed. The surface layer 115 has input / output signals for the semiconductor integrated circuit 116 and terminals for power supply connection, such as a signal input terminal 121, a VSS power supply terminal 122, and a VDD power supply terminal 123. In an actual semiconductor integrated circuit, the VSS power supply layer 112,
Some include a plurality of signal wiring layers 113 and a plurality of VDD power supply layers 114.

In FIG. 3, VSS power supply terminals 122, V
A power supply is connected to the DD power supply terminal 123, and the signal input terminal 12
When the signal 1 is switched, the output signal of the circuit element 101 is also switched. At this time, charges move through the power supply point VSS0 or the power supply point VDD0 of the power supply wiring connected to the circuit element 101, and the power supply voltage temporarily changes. This is power supply noise. Power supply noise is generated in each circuit element whose output signal or internal signal is switched, and the power supply wiring VS
S, the power is transmitted from the power supply wiring VDD to the VSS power supply terminal 122 and the VDD power supply terminal 123 via the VSS power supply layer 112 and the VDD power supply layer 114. Conventionally, VSS power supply terminal 12
The power supply noise was observed by connecting the measuring device 131 to the power supply terminal 2 and the VDD power supply terminal 123.

[0006]

SUMMARY OF THE INVENTION The VSS power supply layer 112,
Since the VDD power supply layer 114 is connected to a power supply and circuit elements, a current flows when the semiconductor integrated circuit 116 operates. This current and the VSS power supply layer 112 and the VDD power supply layer 11
Due to the impedance of 4, the waveform of the power supply noise generated in the circuit element 101 is deteriorated before being transmitted to the VSS power supply terminal 122 and the VDD power supply terminal 123. The power supply noise generated by the circuit element 101 is
2. In the VDD power supply layer 114, the power supply noise is combined with power supply noise generated in other circuit elements and transmitted to the VSS power supply terminal 122 and the VDD power supply terminal 123. For the above two reasons, the conventional observation method cannot extract and measure only the power supply noise generated in the circuit element 101.

An object of the present invention is to provide a semiconductor integrated circuit having a circuit for observing power supply noise on power supply wiring formed on a semiconductor substrate.

[0008]

To achieve the above object, the present invention provides a method for connecting a plurality of points on a power supply wiring to a plurality of observation terminals for measuring the voltage of the power supply wiring. One-to-one connection is made using observation wirings of approximately equal length.

[0009]

FIG. 1 shows an embodiment of the present invention. The basic configuration of the semiconductor integrated circuit is almost the same as FIG.
The case where power supply noise generated in the circuit element 101 is observed will be described below. The power supply observing cell 201 is arranged near the circuit element 101, and is connected to the same power supply wiring VSS and power supply wiring VDD as the circuit element 101. At this time, the feeding point V
SS0 and connection point VSS1, feeding point VDD0 and connection point VDD
D1 is provided very close to each. Power observation cell 20
1 is a cell for connecting the power supply wiring to the signal wiring,
The power supply line VSS and the power supply line VDD are formed of the same conductor. Power observation cell 201 to VSS observation wiring 20
4. The wiring is pulled out so that the wiring length and the delay time of the VDD observation wiring 205 are substantially equal to each other, and connected to the VSS observation terminal 206 and the VDD observation terminal 207 on the surface layer 115. The above mechanism is incorporated when the semiconductor integrated circuit 116 is created.

When observing power supply noise in the circuit element 101, a measuring device 131 such as an oscilloscope is connected to the VSS observation terminal 206 and the VDD observation terminal 207 to observe a voltage waveform. When a measurement is performed using a high impedance probe, no current flows through the VSS observation wiring 204 and the VDD observation wiring 205, so that waveform deterioration due to current flowing through the wiring to be observed unlike the conventional example hardly occurs. Further, by providing the power supply point VSS0 and the connection point VSS1 and the power supply point VDD0 and the connection point VDD1 very close to each other, the power supply noise of the circuit element 101 is observed almost without being combined with the power supply noise generated in other circuit elements. be able to. When the power supply noise is not observed, the VSS observation terminal 206 and the VDD observation terminal 207 are used.
Should be left open.

FIG. 2 shows a power supply noise waveform. The horizontal axis indicates time, and the vertical axis indicates a voltage obtained by subtracting VSS from VDD at the observation point. The solid line 301 is the power supply point VSS0,
A voltage waveform between the power supply points VDD0 and a broken line 302 indicate a voltage waveform observed between the VSS observation terminal 206 and the VDD observation terminal 207. Because of the impedance of the VSS observation wiring 204 and the VDD observation wiring 205,
Observation waveforms at the observation terminal 206 and the VDD observation terminal 207 are delayed by transmission time from the actual power supply noise waveform and become somewhat attenuated waveforms. By establishing the conversion method, the original power supply noise can be estimated.

In order to observe power supply noise as faithfully as possible, the following points are noted. First, the resistance, capacitance, and inductance are made as uniform as possible in order to make the transmission delay and other characteristics of the lead wires from each power supply the same. Specifically, the wiring material, length, cross-sectional area, and lead-out path are made uniform. The reason why the leading paths are aligned is to cancel out the influence of crosstalk noise and the like from other wirings at the time of measurement.

In addition, if the length of the observation wiring has a large variation, a difference occurs in the propagation time of the observed power supply noise.
Correct measurement cannot be performed. In order to correctly observe the power supply noise, it is necessary to suppress the deviation of the signal propagation time of the observation wiring to, for example, about 5% or less of the half width of the power supply noise. When the clock frequency of the semiconductor integrated circuit is 100 MHz, the operation cycle is 10 ns, and the rise time of the signal is about 1 ns, which is 1/10 of the operation cycle. Since the power supply noise also has the same rise time as the signal, the half width of the power supply noise is 1 to 2 ns. 5% of this is 50 ~
100 ps, which is equivalent to a signal propagation time of 1 to 2 mm of a normal LSI wiring. Therefore, in the case of this example, it is necessary to suppress the variation of the observation wiring length to 1 to 2 mm.

If the resistance of the lead wiring is large, the waveform amplitude is attenuated and the high frequency component of the power supply noise cannot be transmitted. Therefore, a thick and short wiring is used and the resistance is reduced. In order to be able to receive the high frequency component of the power supply noise, a probe having a small input capacitance such as a pico probe is used as the probe of the measuring device 131.

Various variations other than the embodiment shown in FIG. 1 are conceivable. In this embodiment, a power supply observation cell is used to connect the observation wiring to the power supply wiring. In this case, the lead-out from the power supply wiring can be designed in the same procedure as the layout of the general cell. However, this is not the essence of the present invention, and other means, for example, a method in which a lead wire is previously drawn from a power supply wiring at a place where power supply noise is observed may be used. In this case, a margin for the size of the power supply observation cell is not required, and the observation wiring can be drawn from the point to be observed.

[0016]

According to the present invention, power supply noise on a power supply wiring formed on a semiconductor substrate can be observed, which is extremely useful for analyzing power supply noise.

[Brief description of the drawings]

FIG. 1 is an explanatory diagram of a semiconductor integrated circuit having a power supply noise measuring circuit according to the present invention.

FIG. 2 is a waveform chart showing an example of an actual power supply noise waveform and a measured waveform according to the present invention.

FIG. 3 is an explanatory diagram showing a method for measuring power supply noise in a conventional semiconductor integrated circuit.

[Explanation of symbols]

101 circuit element, 102 signal wiring, 111 semiconductor substrate, 112 VSS power supply layer, 113 signal wiring layer, 1
14 VDD power supply layer, 115 surface layer, 116 semiconductor integrated circuit, 121 signal input terminal, 122 VSS power supply terminal, 123 VDD power supply terminal, 131 measuring device, 2
01: power supply observation cell, 204: VSS observation wiring, 2
05: VDD observation wiring, 206: VSS observation terminal,
207: VDD observation terminal, 301: solid line, 302: broken line, VDD: power supply wiring, VDD0: feeding point, VDD1 ...
Connection point, VSS: Power supply wiring, VSS0: Power supply point, VSS
1: Connection point.

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Tatsuya Saito 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo Inside the Central Research Laboratory, Hitachi, Ltd. Central Research Laboratory (72) Inventor Tetsuya Uemura 1-280 Higashi Koikebo, Kokubunji-shi, Tokyo Inside Central Research Laboratory, Hitachi, Ltd.

Claims (1)

[Claims] 1. A circuit element formed on a semiconductor substrate, a power supply line formed on the semiconductor substrate for supplying power to the circuit element, and a plurality of power supply lines for measuring a voltage of the power supply line. And a plurality of points on the power supply wiring are connected one-to-one with the observation terminals using the observation wiring, and the length of each of the observation wirings is A semiconductor integrated circuit characterized by being substantially equal.