JPH11307467A - Manufacture of silicon carbide semiconductor element - Google Patents

Manufacture of silicon carbide semiconductor element

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Publication number
JPH11307467A
JPH11307467A JP10916398A JP10916398A JPH11307467A JP H11307467 A JPH11307467 A JP H11307467A JP 10916398 A JP10916398 A JP 10916398A JP 10916398 A JP10916398 A JP 10916398A JP H11307467 A JPH11307467 A JP H11307467A
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JP
Japan
Prior art keywords
ions
implantation
implanted
impurity
impurity ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10916398A
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Japanese (ja)
Other versions
JP4029466B2 (en
Inventor
Akira Saito
明 斎藤
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Priority to JP10916398A priority Critical patent/JP4029466B2/en
Publication of JPH11307467A publication Critical patent/JPH11307467A/en
Application granted granted Critical
Publication of JP4029466B2 publication Critical patent/JP4029466B2/en
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Abstract

PROBLEM TO BE SOLVED: To ensure high activity and restrain an ill effect of high temperature treatment, by performing high temperature treatment after impurity ions and positively charged hydrogen ions are implanted in the same region. SOLUTION: In distribution of electron cloud 4 contributing to coupling gathering between a silicon atom 1 at a crystal lattice point and carbon atoms 2, a hydrogen ion 3 is implanted in the vicinity of the silicon atom 1 and the carbon atom 2. At this time, implantation condition of hydrogen ions is dosage to obtain concentration of about 10<20> -10<21> cm<-3> , because implantation of amount corresponding to the concentration of silicon atoms 1 and carbon atoms 2 is necessary. Hydrogen ions 3 are implanted in a range where the distribution of hydrogen 3 overlaps the distribution of impurity ions or includes it. After that high, temperature heat treatment is performed. As a result probability of substitution of impurity atoms and silicon atoms and diffusion can be accelerated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、炭化けい素からな
る半導体素子の製造方法、特にその不純物イオンの注入
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device made of silicon carbide, and more particularly to a method of implanting impurity ions thereof.

【0002】[0002]

【従来の技術】高周波、大電力の制御を目的として、シ
リコン(以下Siと記す)を用いた電力用半導体素子
(以下パワーデバイスと称する)では、各種の工夫によ
り高性能化が進められている。しかし、パワーデバイス
は高温や放射線等の存在下で使用されることもあり、そ
のような条件下ではSiのパワーデバイスは使用できな
いことがある。
2. Description of the Related Art For the purpose of controlling high frequency and high power, a power semiconductor device (hereinafter referred to as a power device) using silicon (hereinafter referred to as Si) has been improved in performance by various means. . However, the power device may be used in the presence of high temperature or radiation, and under such conditions, the Si power device may not be used.

【0003】また、Siのパワーデバイスより更に高性
能のものを求める声に対して、新しい材料の適用が検討
されている。本発明でとりあげる炭化けい素(以下Si
Cと記す)は広い禁制帯幅(4H型で3.26eV、6
H型で3.02eV)をもつため、高温での電気伝導度
の制御性に優れ、動作上限温度を高くできる。またSi
より約1桁高い絶縁破壊電圧をもつため、オン抵抗を低
減でき、定常状態でのパワーロスを低減できる。高耐圧
素子への適用が可能である。さらに、SiCはSiの約
2倍の電子飽和ドリフト速度をもつので、高周波大電力
制御にも適する。このようなSiCの長所を生かすこと
ができれば、パワーデバイスの飛躍的な特性向上が実現
できると考えられ、現在、MOSFETやp―nダイオ
ード等が試作されている。
Further, in response to a demand for a device having a higher performance than a Si power device, application of a new material is being studied. Silicon carbide (hereinafter referred to as Si)
The width of the forbidden band (referred to as C) is 3.26 eV for 4H type, 6
Since the H-type has 3.02 eV), the controllability of the electrical conductivity at a high temperature is excellent, and the maximum operating temperature can be increased. Also Si
Since it has a breakdown voltage that is about one order of magnitude higher, the on-resistance can be reduced, and power loss in a steady state can be reduced. It can be applied to high breakdown voltage elements. Further, since SiC has an electron saturation drift speed about twice as high as that of Si, it is also suitable for high frequency high power control. If such advantages of SiC can be exploited, it is considered that the characteristics of power devices can be dramatically improved, and MOSFETs, pn diodes, and the like are currently being prototyped.

【0004】SiCを用いてMOSFETやpnダイオ
ードのような半導体素子を製造する場合、単結晶シリコ
ンを用いた半導体製造工程と同じように、洗練された要
素技術が必要となる。すなわち、SiC基板の表面を鏡
面加工した後、SiC薄膜をエピタキシャル成長させた
り、ドナーやアクセプターをドーピングしたり、金属膜
や絶縁膜を形成する等のプロセス技術の確立が必要であ
る。
When a semiconductor device such as a MOSFET or a pn diode is manufactured using SiC, a sophisticated element technology is required as in the case of a semiconductor manufacturing process using single crystal silicon. That is, it is necessary to establish a process technology such as epitaxially growing a SiC thin film, doping a donor or an acceptor, or forming a metal film or an insulating film after mirror-finishing the surface of the SiC substrate.

【0005】最も重要なプロセス技術の一つとして、不
純物導入による選択的な不純物領域形成技術がある。そ
の方法には、熱拡散法とイオン注入法がある。Si半導
体素子で広く用いられている熱拡散法は、SiCでは不
純物の拡散係数が非常に小さいために適用が困難であ
る。そのためSiCでは主としてイオン注入が用いられ
る。選択的な不純物領域の形成のため、SiC基板表面
にフォトレジストまたは約1μm程度の厚い酸化膜(減
圧CVD法または熱酸化法を用いて形成)を部分的に形
成し、この膜をマスクとして不純物イオンを照射する方
法が用いられることもある。
One of the most important process techniques is a technique for selectively forming impurity regions by introducing impurities. The method includes a thermal diffusion method and an ion implantation method. The thermal diffusion method widely used for Si semiconductor elements is difficult to apply in SiC because the diffusion coefficient of impurities is very small. Therefore, ion implantation is mainly used in SiC. In order to selectively form an impurity region, a photoresist or a thick oxide film of about 1 μm (formed using a low pressure CVD method or a thermal oxidation method) is partially formed on the surface of the SiC substrate, and the impurity is formed using this film as a mask. A method of irradiating ions may be used.

【0006】Siでは、1000℃、30分から1時間
の熱処理によって、不純物イオンがSi中を拡散してい
くとともに、シリコンと注入された原子との間で置換が
起こり、不純物原子がSi結晶中でドナーまたはアクセ
プタとして、活性化される。しかし、SiCでは、注入
された不純物原子の活性化のために通常1500℃前後
の高温で熱処理(以下アニールと呼ぶ)がおこなわれ
る。主なアクセプタ原子としてはほう素(B)、アルミ
ニウム(Al)が、ドナー原子としては窒素(N)、燐
(P)が用いられる。SiCのイオン注入においては、
注入した不純物の活性化率を向上させるために、800
〜1000℃の高温でのイオン注入が活性化率向上に効
果があることも報告されている。
In Si, by heat treatment at 1000 ° C. for 30 minutes to 1 hour, impurity ions are diffused in Si, substitution occurs between silicon and implanted atoms, and impurity atoms are formed in the Si crystal. Activated as donor or acceptor. However, in SiC, heat treatment (hereinafter, referred to as annealing) is performed at a high temperature of about 1500 ° C. to activate the implanted impurity atoms. Boron (B) and aluminum (Al) are used as main acceptor atoms, and nitrogen (N) and phosphorus (P) are used as donor atoms. In SiC ion implantation,
In order to improve the activation rate of the implanted impurities, 800
It is also reported that ion implantation at a high temperature of 10001000 ° C. is effective in improving the activation rate.

【0007】図5は、従来のイオン注入とアニールの温
度プロセスを示す説明図であり、図の縦軸は、SiC基
板温度を、横軸は処理に要する時間を示している。不純
物イオンは、先に述べたように高温(〜1000℃)に
加熱されたSiC基板に注入される。ここで、イオン注
入に要する時間は、例えば直径50mm程度のウェハで
は数十分間であるため、ピーク温度に保たれる時間も数
十分程度である。その後室温まで冷却された後、イオン
注入時よりも高温の1500℃前後で、30分間〜1時
間程度の熱処理がアルゴン雰囲気中または真空中でおこ
なわれる。熱処理専用の炉としては、例えばタングステ
ンをヒーターに用いた2000℃まで昇温可能な炉など
が用いられる。
FIG. 5 is an explanatory view showing a conventional ion implantation and annealing temperature process. The vertical axis of the figure shows the SiC substrate temperature, and the horizontal axis shows the time required for processing. The impurity ions are implanted into the SiC substrate heated to a high temperature (up to 1000 ° C.) as described above. Here, since the time required for ion implantation is, for example, several tens of minutes for a wafer having a diameter of about 50 mm, the time for maintaining the peak temperature is also about several tens of minutes. After cooling to room temperature, a heat treatment is performed at about 1500 ° C., which is higher than that at the time of ion implantation, for about 30 minutes to 1 hour in an argon atmosphere or vacuum. As a furnace dedicated to heat treatment, for example, a furnace using tungsten as a heater and capable of raising the temperature to 2000 ° C. is used.

【0008】例えば、不純物イオンとしてほう素イオン
+ を用い、加速電圧100keV、ドーズ量3×10
15cm-2、60keV、1.5×1015cm-2、30k
eV、1×1015cm-2の3条件で連続注入した場合、
不純物イオンの分布は表面から約0.4μmまでは平坦
なピーク濃度(2×1021cm-3)となり、それより深
い領域では急激に濃度が下がり、結晶表面から0.5μ
mの深さでは、1×1017cm-3の濃度となる。
For example, boron ions B + are used as impurity ions, an acceleration voltage is 100 keV, and a dose is 3 × 10
15 cm -2 , 60 keV, 1.5 × 10 15 cm -2 , 30 k
When continuous injection is performed under three conditions of eV and 1 × 10 15 cm −2 ,
The distribution of impurity ions has a flat peak concentration (2 × 10 21 cm −3 ) up to about 0.4 μm from the surface, and the concentration drops sharply in a region deeper than that, and 0.5 μm from the crystal surface.
At a depth of m, the concentration is 1 × 10 17 cm −3 .

【0009】[0009]

【発明が解決しようとする課題】前述のように単結晶S
iCでは、注入された不純物原子が1500℃前後の高
温でもほとんど拡散せず、活性化率も低い。拡散係数が
小さいことおよび活性化率が低いことの要因としては、
シリコンの最近接の原子間距離に比較して、SiCの原
子間距離が短いこと、また、シリコンに比較してSiC
の結合が切れにくいことによると考えられる。
As described above, the single crystal S
In iC, the implanted impurity atoms hardly diffuse even at a high temperature of around 1500 ° C., and the activation rate is low. The reason for the low diffusion coefficient and low activation rate is that
The interatomic distance of SiC is shorter than the closest interatomic distance of silicon.
This is considered to be due to the fact that the bond is hard to be broken.

【0010】イオン注入された不純物の活性化率を向上
させるためには、基板の加熱による高温でのイオン注入
と、イオン注入後の高温(1500℃)かつ長時間の熱
処理が必要と考えられている。しかし、この長時間の熱
処理の結果、結晶表面からシリコン原子が蒸発していく
ため、表面の炭素原子に対する比が大きくなり、表面が
黒っぽく見える(黒色化)といった現象が報告されてい
る。さらに1500℃以上のアニールを行うと、SiC
結晶表面に[1120]方向に走る凹凸が生じ、アニー
ル温度を高くするほど大きくなることも報告されてい
る。例えば、真空中1500℃のアニールで、表面粗さ
が平均振幅で約95nmであるのに対し、1600℃の
アニールでは、約200nmになる。
In order to improve the activation rate of the ion-implanted impurities, it is considered necessary to perform high-temperature ion implantation by heating the substrate and high-temperature (1500 ° C.) and long-time heat treatment after the ion implantation. I have. However, as a result of the long-term heat treatment, silicon atoms evaporate from the crystal surface, so that the ratio of the surface to carbon atoms increases, and a phenomenon that the surface appears dark (blackening) has been reported. Further annealing at 1500 ° C. or more results in SiC
It has also been reported that irregularities running in the [1120] direction are generated on the crystal surface and become larger as the annealing temperature is increased. For example, while annealing at 1500 ° C. in vacuum has a surface roughness of about 95 nm in average amplitude, annealing at 1600 ° C. results in about 200 nm.

【0011】この凹凸は、高温領域においてはSiの蒸
気圧が高くなり表面脱離を生じることによって発生する
と考えられる。アルゴン中でも、真空中ほどではない
が、1500℃で約55nmになる。 その結果、表面
近傍の移動度が低下したり、接触抵抗の増大を招いたり
するという問題が発生する。特に、MOSFETでは、
表面近傍に誘起した層でのキャリアの輸送が重要であ
り、表面近傍の移動度は表面状態により大きな影響を受
ける。
[0011] It is considered that the irregularities are generated due to the fact that in a high temperature region, the vapor pressure of Si increases and surface desorption occurs. Even in argon, it becomes about 55 nm at 1500 ° C., though not as much as in vacuum. As a result, there arises a problem that the mobility near the surface is reduced or the contact resistance is increased. In particular, MOSFET
Carrier transport in the layer induced near the surface is important, and mobility near the surface is greatly affected by the surface state.

【0012】上記の問題点に鑑み本発明の目的は、より
低温の熱処理によって高い活性化率を確保し、高温処理
の弊害を抑えることのできる炭化けい素半導体素子の製
造方法を提供することにある。
In view of the above problems, it is an object of the present invention to provide a method of manufacturing a silicon carbide semiconductor device which can secure a high activation rate by a lower temperature heat treatment and can suppress the adverse effects of a high temperature treatment. is there.

【0013】[0013]

【課題を解決するための手段】上記の課題を解決するた
め本発明は、炭化けい素単結晶または多結晶からなる半
導体基板表面および結晶中に、不純物イオンを注入する
炭化けい素半導体素子の製造方法において、不純物イオ
ンと正に帯電した水素イオンとを同じ領域に注入した
後、高温熱処理するものとする。
SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a method of manufacturing a silicon carbide semiconductor device in which impurity ions are implanted into the surface of a semiconductor substrate made of silicon carbide single crystal or polycrystal and into the crystal. In the method, impurity ions and positively charged hydrogen ions are implanted into the same region, and then high-temperature heat treatment is performed.

【0014】そのようにすることによって、後述するよ
うに注入された不純物の活性化を促進する作用がもたら
される。その機構としては、炭化けい素結晶のシリコン
原子と炭素原子の間に集まっている結合に寄与している
電子雲の分布が、注入された水素イオンの存在によって
歪み、不純物原子とシリコン原子または炭素原子の置換
の確率および拡散を促進すると考えられる。
By doing so, an effect of promoting the activation of the implanted impurities is obtained as described later. The mechanism is that the distribution of the electron cloud contributing to the bonds gathered between the silicon and carbon atoms of the silicon carbide crystal is distorted by the presence of implanted hydrogen ions, and the impurity atoms and silicon atoms or carbon atoms are distorted. It is believed that it promotes the probability of atomic substitution and diffusion.

【0015】正に帯電した水素イオンの注入と不純物イ
オンを注入とを繰り返すことや、正に帯電した水素イオ
ンの注入と不純物イオンを注入とを同時におこなうこと
は、水素イオン濃度を高い状態に保つ上で効果があり、
その結果注入された不純物の活性化を一層促進すること
になる。
The repetition of the implantation of positively charged hydrogen ions and the implantation of impurity ions and the simultaneous implantation of positively charged hydrogen ions and implantation of impurity ions maintain the hydrogen ion concentration at a high level. Is effective on
As a result, the activation of the implanted impurities is further promoted.

【0016】[0016]

【発明の実施の形態】[実施例1]図1は、本発明にか
かるイオン注入プロセスを示す説明図であり、図の縦軸
は、SiC基板温度を、横軸は処理に要する時間を示し
ている。(0001)面から少し傾けた主面をもつ約1
0μmのn型エピタキシャル層を成長させた4H−Si
Cウェハを用意した。1000℃でH+ を加速電圧40
keV、1×1016cm-2、30keV、1×1016
-2、20keV、1×1016cm-2、10keV、1
×1016cm-2の4条件で連続注入する。続いてアルミ
ニウム(Al)のイオンを180keVで3×1015
-2、100keVで、1.5×1015cm-2、50k
eVで1×1015cm-2の条件で連続注入した。次に、
このウェハを真空中において1400℃で30分間アニ
ールをおこなった。
[Embodiment 1] FIG. 1 is an explanatory view showing an ion implantation process according to the present invention, in which the vertical axis indicates the SiC substrate temperature and the horizontal axis indicates the time required for the processing. ing. Approximately 1 with the main surface slightly inclined from the (0001) plane
4H-Si grown with a 0 μm n-type epitaxial layer
A C wafer was prepared. At 1000 ° C, H + is accelerated to 40
keV, 1 × 10 16 cm −2 , 30 keV, 1 × 10 16 c
m −2 , 20 keV, 1 × 10 16 cm −2 , 10 keV, 1
Continuous injection is performed under four conditions of × 10 16 cm -2 . Then, 3 × 10 15 c ions of aluminum (Al) were applied at 180 keV.
m −2 , 100 keV, 1.5 × 10 15 cm −2 , 50 k
Continuous injection was performed at 1 × 10 15 cm −2 at eV. next,
The wafer was annealed at 1400 ° C. for 30 minutes in a vacuum.

【0017】XPS(X線光電子分析法)で測定した不
純物イオンの分布は、表面から約0.4μmまでほぼ平
坦なピーク濃度(2×1021cm-3)となり、それより
深い領域では、急激に濃度が下がり、表面から0.5μ
mの深さでは、1×1017cm-3の濃度であった。この
試料について、van der Pauw 法によりシート抵抗を評
価した。オーミック電極の形成は次のようにおこなっ
た。すなわち、試料のエピタキシャル層上の四隅に、金
属マスクを使ったスパッタ法によりニッケル(Ni)電
極を形成する。電極の直径は200μm、厚さは400
nmである。この後、整流性を除きオーミックな接触と
するためアルゴン(Ar)雰囲気中で1050℃、5分
間のアニールをおこなった。
The distribution of impurity ions measured by XPS (X-ray photoelectron analysis) has a substantially flat peak concentration (2 × 10 21 cm −3 ) from the surface to about 0.4 μm. 0.5μ from surface
At a depth of m, the concentration was 1 × 10 17 cm −3 . The sheet resistance of this sample was evaluated by the van der Pauw method. The formation of the ohmic electrode was performed as follows. That is, nickel (Ni) electrodes are formed at four corners on the epitaxial layer of the sample by a sputtering method using a metal mask. The diameter of the electrode is 200 μm and the thickness is 400
nm. Thereafter, annealing was performed at 1050 ° C. for 5 minutes in an argon (Ar) atmosphere to obtain ohmic contact without rectification.

【0018】その結果、アニール温度が100℃低いに
もかかわらず、シート抵抗は5000Ω/□と、従来の
1500℃アニールと同等のシート抵抗となっているこ
とがわかった。そして、表面の黒化も従来よりかなり抑
えられた。すなわち、従来より低温のアニールで活性化
率を高めることができたことになる。図5の従来の方法
と異なる点は、不純物イオンの注入前に正に帯電した水
素イオンを照射するところにある。結晶中を正に帯電し
た水素イオンで満たすことにより、次の作用が起きると
考えられる。図2は、説明のための原子結合状態の概念
図である。1はシリコン原子、2は炭素原子、3は注入
された正に帯電した水素イオンである。
As a result, it was found that the sheet resistance was 5000 Ω / □, which is equivalent to that of the conventional 1500 ° C. annealing, even though the annealing temperature is 100 ° C. lower. The blackening of the surface was considerably suppressed as compared with the conventional case. That is, the activation rate could be increased by annealing at a lower temperature than in the past. The difference from the conventional method of FIG. 5 resides in that positively charged hydrogen ions are irradiated before the impurity ions are implanted. By filling the crystal with positively charged hydrogen ions, the following effects are considered to occur. FIG. 2 is a conceptual diagram of an atomic bonding state for explanation. 1 is a silicon atom, 2 is a carbon atom, and 3 is an implanted positively charged hydrogen ion.

【0019】結晶格子点にあるシリコン原子1と炭素
原子2の間に集まっている結合に寄与している電子雲4
の分布が、シリコン原子1および炭素原子2近傍に注入
された水素イオン3の存在によって歪む。この分布の歪
んだ電子雲5により炭素原子2−シリコン原子1の間で
は、電子密度が低下する。 このように、シリコン原子1と炭素原子2との結合に
関与していた電子雲4の分布が歪んだ電子雲5となるこ
とによって、その近傍でシリコン原子1−炭素原子2の
結合は弱まり、より低い温度で結合が切れる確率が高く
なるため、不純物原子とシリコン原子1または炭素原子
2とが置換する確率が増大し、また拡散を促進する作用
がある。
The electron cloud 4 contributing to the bond gathered between the silicon atom 1 and the carbon atom 2 at the crystal lattice point
Is distorted by the presence of hydrogen ions 3 implanted near silicon atoms 1 and carbon atoms 2. Due to the distorted electron cloud 5, the electron density decreases between carbon atom 2 and silicon atom 1. As described above, the distribution of the electron cloud 4 involved in the bond between the silicon atom 1 and the carbon atom 2 becomes a distorted electron cloud 5, whereby the bond between the silicon atom 1 and the carbon atom 2 is weakened in the vicinity thereof, Since the probability that the bond is broken at a lower temperature is increased, the probability that the impurity atom is replaced with the silicon atom 1 or the carbon atom 2 is increased, and there is an effect of promoting diffusion.

【0020】この場合の水素イオン3の注入条件は、結
晶を構成するシリコン原子1および炭素原子2の濃度に
対応する量程度の注入が必要であるため、1020〜10
21cm-3程度の濃度になるような注入量とする。また、
水素イオン3の分布が、不純物イオンの分布に重なるか
または、不純物イオンの分布を包含するような範囲に注
入をおこなう必要がある。
In this case, the hydrogen ions 3 are implanted in an amount of about 10 20 to about 10 20 , because the implantation is required to have an amount corresponding to the concentration of the silicon atoms 1 and the carbon atoms 2 constituting the crystal.
The injection amount is set to a concentration of about 21 cm -3 . Also,
It is necessary to perform the implantation in a range where the distribution of the hydrogen ions 3 overlaps with the distribution of the impurity ions or includes the distribution of the impurity ions.

【0021】[実施例2]図3は、本発明にかかるイオ
ン注入プロセスを示す説明図であり、図の縦軸は、Si
C基板温度を、横軸は処理に要する時間を示している。
この方法の特徴は、不純物イオンの注入と水素イオンの
注入とを繰り返すことである。不純物イオンおよび水素
イオンの総注入量は第一の実施例と同じとする。
[Embodiment 2] FIG. 3 is an explanatory view showing an ion implantation process according to the present invention.
The horizontal axis indicates the time required for processing, and the horizontal axis indicates the C substrate temperature.
The feature of this method is that implantation of impurity ions and implantation of hydrogen ions are repeated. The total implantation amount of impurity ions and hydrogen ions is the same as in the first embodiment.

【0022】特に高温でのイオン注入では、水素イオン
は注入を止めた時点から基板の外にも拡散していく(ア
ウトディフュージョンという)。このため、結晶中の水
素イオン濃度は急激に下がっていく。アウトディフュー
ジョンによる結晶中の水素イオン濃度の低下とともに、
水素イオン注入による活性化および拡散の促進効果が失
われる。
In particular, in ion implantation at a high temperature, hydrogen ions diffuse out of the substrate from the time when the implantation is stopped (referred to as out diffusion). For this reason, the hydrogen ion concentration in the crystal rapidly decreases. With the decrease of hydrogen ion concentration in the crystal due to out diffusion,
The effect of promoting activation and diffusion by hydrogen ion implantation is lost.

【0023】この問題の対策として、結晶中の水素イオ
ン濃度が高い状態で不純物イオンの注入をおこなうため
に、水素イオンの注入と不純物イオンの注入と繰り返す
と良い。実際の不純物イオンの注入時間は数分間程度で
あるが、これを3回に分け、その前後に水素イオンの注
入をおこなったところ、上の例より活性化温度が更に約
50℃低下した。それだけ炭化けい素基板の黒色化およ
び粗面化を抑制できた。
As a countermeasure against this problem, in order to implant impurity ions in a state where the concentration of hydrogen ions in the crystal is high, it is preferable to repeat implantation of hydrogen ions and implantation of impurity ions. Although the actual implantation time of the impurity ions is about several minutes, the implantation time is divided into three times, and hydrogen ions are implanted before and after that. As a result, the activation temperature is further lowered by about 50 ° C. as compared with the above example. As a result, blackening and roughening of the silicon carbide substrate could be suppressed.

【0024】これは、水素イオン濃度が高い状態で不純
物イオンの注入をおこなったための他に、次の作用もあ
ったと考えられる。すなわち、不純物イオンの注入量が
少ない程、イオン注入による結晶の損傷が少なくなり、
熱処理によって結晶性が回復し易いことが知られてい
る。従って、この実施例では、同量の不純物イオンを数
回にわけて注入することにより、一度に注入するドーズ
量を少なくしたことが、結晶の回復に効果があったもの
であろう。
This is presumably because the impurity ions were implanted in a state where the hydrogen ion concentration was high. That is, the smaller the amount of implanted impurity ions, the less damage to the crystal due to ion implantation,
It is known that crystallinity is easily recovered by heat treatment. Therefore, in this embodiment, the same amount of impurity ions may be implanted several times to reduce the amount of implanted ions at a time, which would have been effective in recovering the crystal.

【0025】[実施例3]水素イオンのアウトディフュ
ージョンを考慮すれば、水素イオン濃度が高い状態で不
純物イオンの注入をおこなうために、最も良い方法は、
水素イオンと不純物イオンとを同時に注入する方法であ
る。図4は、本発明にかかるイオン注入プロセスを示す
説明図であり、図の縦軸は、SiC基板温度を、横軸は
処理に要する時間を示している。
[Embodiment 3] In consideration of out diffusion of hydrogen ions, the best method for implanting impurity ions with a high hydrogen ion concentration is as follows.
This is a method of simultaneously implanting hydrogen ions and impurity ions. FIG. 4 is an explanatory view showing the ion implantation process according to the present invention, in which the vertical axis represents the temperature of the SiC substrate, and the horizontal axis represents the time required for processing.

【0026】通常のイオン注入装置は、注入するイオン
種としては1種類しか選べない。そこで、注入系統を2
系統有するイオン注入装置を試作し、同時注入を試み
た。不純物イオンおよび水素イオンの総注入量は第一の
実施例と同じとした。この例では、従来より活性化温度
を200℃低下させることができ、それだけ炭化けい素
基板の黒色化や粗面化を抑制できた。
An ordinary ion implanter can select only one type of ion to be implanted. Therefore, two injection systems
An ion implantation system with a system was prototyped and simultaneous implantation was attempted. The total implantation amount of impurity ions and hydrogen ions was the same as in the first embodiment. In this example, the activation temperature could be lowered by 200 ° C. as compared with the conventional case, and accordingly, the blackening and roughening of the silicon carbide substrate could be suppressed.

【0027】これは、水素イオン濃度が高い状態で不純
物イオンの注入をおこなったためのと考えられる。
This is presumably because impurity ions were implanted with a high hydrogen ion concentration.

【0028】[0028]

【発明の効果】以上説明したように本発明によれば、炭
化けい素単結晶または多結晶からなる半導体基板の表面
層に、不純物イオンを注入する炭化けい素半導体素子の
製造方法において、正に帯電した水素イオンと不純物イ
オンとを同じ領域に注入する。この注入された水素イオ
ンの存在によってその後の高温熱処理における不純物原
子とシリコン原子または炭素原子の置換の確率および拡
散が促進されるので、活性化のための熱処理温度を下げ
ることができ、高温熱処理による表面の黒色化、粗面化
等を抑制できる。
As described above, according to the present invention, a method for manufacturing a silicon carbide semiconductor device in which impurity ions are implanted into a surface layer of a semiconductor substrate made of silicon carbide single crystal or polycrystal is provided. Charged hydrogen ions and impurity ions are implanted into the same region. The presence of the implanted hydrogen ions promotes the probability and diffusion of substitution of impurity atoms and silicon atoms or carbon atoms in the subsequent high-temperature heat treatment, so that the heat treatment temperature for activation can be lowered, and the high-temperature heat treatment Blackening and roughening of the surface can be suppressed.

【0029】正に帯電した水素イオンの注入と不純物イ
オンを注入とを繰り返すことや、正に帯電した水素イオ
ンの注入と不純物イオンを注入とを同時におこなうこと
は、注入された不純物の活性化を一層促進することにな
る。これらは、炭化けい素半導体装置の普及に多大の貢
献をするものである。
Repeating the implantation of the positively charged hydrogen ions and the implantation of the impurity ions, and simultaneously performing the implantation of the positively charged hydrogen ions and the implantation of the impurity ions, activate the implanted impurities. Will further promote. These greatly contribute to the spread of silicon carbide semiconductor devices.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明第一の実施例の温度プロセスの説明図FIG. 1 is an explanatory view of a temperature process according to a first embodiment of the present invention.

【図2】本発明の作用原理の説明図FIG. 2 is a diagram illustrating the principle of operation of the present invention.

【図3】本発明第二の実施例の温度プロセスの説明図FIG. 3 is an explanatory view of a temperature process according to a second embodiment of the present invention.

【図4】本発明第三の実施例の温度プロセスの説明図FIG. 4 is an explanatory view of a temperature process according to a third embodiment of the present invention.

【図5】従来の温度プロセスの説明図FIG. 5 is an explanatory view of a conventional temperature process.

【符号の説明】[Explanation of symbols]

1 シリコン原子 2 炭素原子 3 水素イオン 4 電子雲 5 歪んだ電子雲 Reference Signs List 1 silicon atom 2 carbon atom 3 hydrogen ion 4 electron cloud 5 distorted electron cloud

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】炭化けい素単結晶または多結晶からなる半
導体基板の表面層に、不純物イオンを注入する炭化けい
素半導体素子の製造方法において、正に帯電した水素イ
オンと不純物イオンとを同じ領域に注入した後、高温熱
処理することを特徴とする炭化けい素半導体素子の製造
方法。
In a method of manufacturing a silicon carbide semiconductor device, wherein impurity ions are implanted into a surface layer of a semiconductor substrate made of silicon carbide single crystal or polycrystal, positively charged hydrogen ions and impurity ions are formed in the same region. And then performing a high-temperature heat treatment after the implantation.
【請求項2】正に帯電した水素イオンの注入と不純物イ
オンの注入とを繰り返しおこなうことを特徴とする請求
項1記載の炭化けい素半導体素子の製造方法。
2. The method of manufacturing a silicon carbide semiconductor device according to claim 1, wherein the implantation of positively charged hydrogen ions and the implantation of impurity ions are repeated.
【請求項3】正に帯電した水素イオンの注入と不純物イ
オンの注入とを同時におこなうことを特徴とする請求項
1に記載の炭化けい素半導体素子の製造方法。
3. The method of manufacturing a silicon carbide semiconductor device according to claim 1, wherein the implantation of positively charged hydrogen ions and the implantation of impurity ions are simultaneously performed.
JP10916398A 1998-04-20 1998-04-20 Method for manufacturing silicon carbide semiconductor device Expired - Fee Related JP4029466B2 (en)

Priority Applications (1)

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JP10916398A JP4029466B2 (en) 1998-04-20 1998-04-20 Method for manufacturing silicon carbide semiconductor device

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JPH11307467A true JPH11307467A (en) 1999-11-05
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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009081359A (en) * 2007-09-27 2009-04-16 National Institute Of Advanced Industrial & Technology Electrical activation method of impurity ion implanted layer
JP2015056410A (en) * 2013-09-10 2015-03-23 三菱電機株式会社 SiC SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6242724B2 (en) 2014-03-20 2017-12-06 株式会社東芝 Semiconductor device and manufacturing method thereof
JP6180978B2 (en) 2014-03-20 2017-08-16 株式会社東芝 Semiconductor device and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009081359A (en) * 2007-09-27 2009-04-16 National Institute Of Advanced Industrial & Technology Electrical activation method of impurity ion implanted layer
JP2015056410A (en) * 2013-09-10 2015-03-23 三菱電機株式会社 SiC SEMICONDUCTOR DEVICE MANUFACTURING METHOD

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