JPH11305857A - Current mirror circuit and method for determining resistance of the same circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To precisely obtain desired output currents without being affected by changes in input currents by offsetting the sensitivity of the DC current amplification factor of a transistor on outputs currents between a pair of transistors through the use of a third resistor, and determining circuit constants for obtaining desired output currents through the use of a second resistor in a current mirror circuit. SOLUTION: In this current mirror circuit, a transistor Q1 is used as a unit transistor, a resistor R1 is connected with the emitter of the transistor Q1 , a transistor Q2 is used as coefficient times of the unit transistor, a resistor R2 is connected with the emitter of the transistor Q2 , the base of the transistor Q1 is connected through a resistor R3 with the base of the transistor Q2 , and the collector of the transistor Q1 is connected with the base of the transistor Q2 . In this case, input currents are applied to the collector of the transistor Q1 , and output currents are obtained from the collector of the transistor Q2 . Then, the resistance value of the resistor R3 is set so as to offset fluctuations of the DC current amplification factor of the transistor Q1 on the output currents and those of the DC current amplification factor of the transistor Q2 on the output currents.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a current mirror circuit and a method for determining a resistance of the current mirror circuit.

[0002]

2. Description of the Related Art A current mirror circuit is a useful circuit in a semiconductor integrated circuit. In this circuit, it is desirable that the output current be accurately obtained by a factor of the input current regardless of the change in the input current.

FIG. 1 shows a currencies using a PNP transistor.
FIG. 2 is a circuit configuration diagram showing a front mirror circuit. As shown in Figure 1
Yeah, transistor Q₁Is a unit transistor, and this
Transistor Q₁The resistor R₁Is connected
I have. Transistor Q_TwoIs n times the unit transistor
And the emitter has a resistor R_TwoIs connected and this resistance
R_TwoIs the resistance R₁1 / n times the resistance value of Usually
Anti-R₁And resistance R_TwoNot connected to the transistor
The other is connected to a power supply VCC. Transistor
Q₁Base and transistor Q_TwoIs based on a resistor R_Three
Connected through. Transistor Q₁Collector
And transistor Q_TwoThe current source is commonly connected to the base
1 and the transistor Q₁Collectors and Transi
Star Q_TwoInput the common connection with the base of the
Star Q_TwoAnd the output current is the input current
n times. In FIG. 1, the input current is I_in, Output current
To I _outAnd Transistor Q₁Emitter current
To I_E1And the collector current is I_C1And the base current is I_B1, Ba
The voltage between the_BE1And the transistor Q _Two
The emitter current of I_E2And the collector current is I_C2, Base
Flow I_B2, The voltage between the base and the emitter is V_BE2And
The resistance R at this time_ThreeIs given by the following formula 1.
Can be.

[0004]

(Equation 1) However, Equation 1 is the base current I _B1 and the base of the transistor Q ₁ - emitter voltage V _BE1, the base current I _B2 and the base of the transistor Q ₂ - emitter voltage V _BE2 is included as determinant of R ₃ I have. Moreover, since these determinants vary, it is difficult to obtain R ₃ from Equation 1.

Therefore, as a first conventional example, the input current
The relationship of the output current to_in= I_out, Resistance R₁When
Resistance R_TwoThe relationship of R₁/ N = R_TwoAnd the transistor Q
₁And transistor Q_TwoThe relationship of the base current at nI
_B1= I_B2, And transistor Q₁And transistor Q_Two
The relationship between the base-emitter voltage at V_BE1= V
_BE2Approximate to R_ThreeI have been seeking. Equation 2 is shown above
Resistance R when using the approximate expression and the relational expression_ThreeIs shown.

[0006]

R ₃ = (1 + n) R ₁ However, in an actual current mirror circuit, it is difficult to satisfy the approximate expression I _B2 = nI _B1 regarding the base currents of the transistors Q ₁ and Q ₂ . Also, since it is difficult to _{satisfy the} approximate expression V _BE1 = V _BE2 regarding the base-emitter voltage of the transistor Q ₁ and the transistor Q ₂ , even if the resistance value of the resistor R ₃ is obtained by using the equation 2, It is difficult to accurately obtain a desired output current with respect to the current.

[0007] Figure 3 shows a case n = 1, the resistor R ₃ calculated using Equation 2, which is an example characteristic diagram showing the relationship between the output current I _out with respect to the change of the input current I _in. Output current I
_out is not the desired current value and the input current I
_The output current _Iout gradually decreases as in increases, and the error with respect to the input current increases. Table 1
1 shows the relationship between the resistance values of the resistors R ₁ , R ₂ , and R ₃ at this time, and Table 1-2 shows the output current I _out when the input current I _in is 100 μA.

[0008]

[Table 1] Next, a second conventional design method will be described.

[0009] This is an improvement over the first conventional design method, the base current I _B1 and the base current I _B2 of the transistor Q ₂ of the transistor Q ₁ without approximation and I _B1 = I _B2,
Using a graphical solution than characteristic diagram showing the relationship of collector current to the base current of the unit transistors, it obtains a base current I _B2 of the transistor Q ₂ from the collector current I _C2 of the transistor Q _2, the emitter current to the base current of the unit transistor using a graphical solution than characteristic diagram showing the relationship, obtaining the base current I _B1 of the transistor Q ₁ from the emitter current I _E1 of the transistor Q _1. It is to determine the resistance value of the resistor R ₃ in consideration of these base currents.

In the current mirror circuit shown in FIG.
The transistor Q ₁ as a unit transistor, the transistor Q ₂ is the n times the transistor unit transistor,
The electrical characteristics of the unit transistors are the same. Input current I _in and the output current I _out nI _in = I _out the relationship, of the relation between resistors R ₁ and R ₂ and R ₁ / n = R _2. Also,
Base of the transistor Q ₁ and the transistors Q ₂ - the relationship emitter voltage approximated to V _BE1 = V _BE2. When the base current I _B2 of the transistor Q ₂ is expressed using the base current I _B20 per unit transistor I _B2 = n
_IB20 . When the above relational expression and the approximate expression are substituted into Expression 1, the resistance R ₃ is expressed by Expression 3.

[0011]

(Equation 3) Here, in order to obtain the R ₃ shown in Equation 3, we must seek the base current I _B20 per unit transistor base current I _B1 and the transistor Q ₂ of the transistor Q _1. These base currents can be obtained by a schematic solution from a diagram showing characteristics of the collector current and the emitter current with respect to the base current of the unit transistor. This procedure will be specifically described with reference to FIG. Here, as an example, it is assumed that the input current is 100 μA and n = 1.

[0012] (Step 1) First, the base current I _B20 per unit transistor of the transistor Q _2, obtained from the collector current I _C2 of the transistor Q _2.

The desired output current I _out is determined by the transistor Q
₂ can be represented by a collector current I _C2 , and I _out = I _C2
Becomes Therefore, according to the electrical characteristic diagram of the collector current I _C with respect to the base current I _B of the unit transistor shown in FIG. 4, the base current when the collector current becomes I _C2 = 100 μA is equal to the base current I per unit transistor of the transistor Q _{2. B20} . The base current I at this time
_B20 is 6.79 μA.

[0014] (Step 2) Next, the base current I _B1 of the transistor Q _1, obtained from the emitter current I _E1 of the transistor Q _1.

Transistor Q₁Emitter current I_E1Is
Input current I_inAnd transistor Q_TwoUnit transistor
Base current I_B20And can be expressed as_E1
= I _in-NI_B20Becomes Therefore, the unit shown in FIG.
Transistor base current I _BEmitter current I
_EFrom the electrical characteristic diagram of FIG._in-NI_B20=
When the base current at 93.03 μA becomes the transistor
Q₁Base current I_B1Becomes The base current I at this time_B1
Is 5.45 μA.

(Procedure 3) By substituting the values of I _B1 and I _B20 which are schematically obtained as shown in the above description into Equation 3, the resistance value of the resistor R ₃ can be obtained and a current mirror circuit is formed. A design can be made in consideration of the base current of the transistor. Note that the resistance R ₃ obtained by this method
Is 7480Ω.

FIG. 5 shows the input current I_in= 100 μA, n =
In the case of 1, the resistance R in FIG.
_ThreeInput current I_inOutput current I_out
FIG. 6 is a characteristic diagram illustrating an example of a relationship with the graph. At the same time
The results of the first conventional design method that does not consider flow are also compared.
It is shown for Table 2-1 shows that the resistance R₁,
R _Two, R_ThreeTable 2-2 shows the input current
I_inOutput current I is 100 μA_outShows
You.

[0018]

[Table 2] Effective when the emitter voltage and Early voltage was considered to be equal - second conventional design approach described herein has been improved from the first conventional design method, the collector of the transistor Q _1, the transistor Q ₂ And the condition that the base-emitter voltages are equal is almost impossible in actual circuit operation. In addition, by investigating the electrical characteristics of the collector current and the emitter current with respect to the base current of the unit transistor, and schematically obtaining the base current,
This is a serious problem in circuit design.

[0019] Therefore, as a third conventional design method, it will be described a method of obtaining simply and automatically resistor R ₃ under conditions closer to the actual circuit operation.

FIG. 6 shows the resistance R of FIG._ThreeThe circuit simulation
2 shows a circuit configuration that is automatically obtained by using a computer.
Transistor Q₁The resistor R₁Is connected
And transistor Q_TwoThe resistor R_TwoIs connected
Have been. Transistor Q ₁Base and transistor
Q_TwoIs connected via a voltage control resistor 4.
You. Transistor Q₁Collector and transistor base
And the current source 1 is connected in common. Tiger
Transistor Q₁Of the collector of the transistor and the base of the transistor
Input to the connection_TwoExit collector
Force. Resistance R₁And resistance R_TwoContact with transistor
The other not connected is connected to the power supply VCC.
Transistor Q_TwoCurrent-voltage conversion circuit 2
Is connected, and the gain of the current-voltage conversion circuit 2 is
α₁And The other input of the current-voltage circuit 2
Is the transistor Q_TwoVoltage that does not saturate during circuit operation.
A pressure Vx is applied. The output of the current-voltage conversion circuit 2 is
It is connected to the inverting input terminal (-) of the generator circuit 3.
The gain of the comparator circuit 3 is α_TwoAnd Comparing
Other input of data circuit 3 (non-inverting input terminal (+))
Is the gain α of the current-voltage conversion circuit 2 at the desired output current.₁
The reference voltage V (α corresponding to the input current having a value corresponding to₁
I_out)give. The output of the comparator circuit 3 is a voltage
It is connected to the control terminal of the control resistor 4. This voltage control
The resistance 4 is a gain α of the comparator circuit 3. _TwoProportionally double
Resistance value. The configuration described above includes a feedback loop.
When the circuit shown in FIG._ThreeResistance corresponding to
The value can be determined.

FIG. 7 shows that I _in = 100 μA, n = 1, Vx
= By the resistance value of the resistor R ₃ which was determined as 3V, it is an example showing the relationship between the output current I _out with respect to the input current I _in in Figure 1. Also, the results obtained by the first and second conventional design methods are shown. Table 3-1
To the relationship between the resistors R _1, R _2, the resistance value of R _3, Table 3
2 shows the output current I when the input current I _in is 100 μA.
_out . When determining the resistance R ₃ using this approach, the output current is obtained with considerable accuracy.

[0022]

[Table 3]

[0023]

[SUMMARY OF THE INVENTION In the current mirror circuit shown in FIG. 1, the resistance value of the resistor R ₃ which are determined by the procedure described so far, to obtain the desired output current only for a specific input current However, there is a problem that the output current is not at a desired current value when the input current changes.

[0024]

According to the current mirror circuit of the present invention, the first transistor is a unit transistor,
A first resistor is connected to the emitter of the first transistor, the second transistor is multiplied by a factor of the unit transistor, a second resistor is connected to the emitter of the second transistor, and the first transistor is connected to the emitter of the first transistor. A base connected to the base of the second transistor via a third resistor;
A current mirror circuit comprising a collector connected to the base of the second transistor, an input current supplied to the collector of the first transistor, and an output current obtained from the collector of the second transistor.
The sensitivity of the change in the DC current gain of the first transistor to the output current, and the sensitivity of the change in the DC current gain of the second transistor to the output current,
The resistance value of the third resistor is set to a value that cancels each other.

According to a method of determining a resistance of a current mirror circuit of the present invention, a first transistor is used as a unit transistor, and a first resistor is connected to an emitter of the first transistor.
The second transistor is multiplied by a factor of the unit transistor,
A second resistor is connected to the emitter of the second transistor, a base of the first transistor is connected to a base of the second transistor via a third resistor, and a collector of the first transistor is connected. And a base of the second transistor, wherein an input current is supplied to a collector of the first transistor, and an output current is obtained from a collector of the second transistor. The sensitivity at which the change in the DC current gain of the first transistor affects the output current and the sensitivity at which the change in the DC current gain of the second transistor affects the output current cancel out each other. A first step of setting a resistance value of a third resistor; and a second step of setting the second resistance value so that the output current has a desired current value. The output current and repeating as desired the current value, or the desired and the second process and the first process so as to approach the current value.

[0026] The present invention will be described with reference to the current mirror circuit shown in FIG. 1, (1) to the DC current gain output current of the sensitivity and the transistor Q ₂ to which a DC current amplification factor of the transistor Q ₁ is on the output current Resistor R ₃ so that the applied sensitivity and each other cancel each other.
To determine. (2) If the output current at this time is not in the desired current value, adjust the output current to the desired current value by the resistance R _2. (3) above by an operator (2), the case where the sensitivity of the DC current amplification factor of the transistor Q _1, the transistor Q ₂ is on the output current made in (1) is no longer not cancel again above (1) Work.

In this way, the operations (1) and (2) are repeated until the output current reaches a desired current value or the error from the desired current value is minimized, and the resistance R determining a resistance value of _2, R _3.

[0028]

Embodiments of the present invention will be described below in detail with reference to the drawings. In the following embodiment, the case where the transistor is a PNP transistor will be described, but the present invention can be applied to the case where the transistor is an NPN transistor.

In this embodiment, attention is paid to the DC current amplification factor,
Using a circuit simulator, first, we examined the sensitivity DC current amplification factor of the transistor provides the output current, the transistor Q _1, the transistor Q ₂ this sensitivity by the resistance R ₃
To counteract between, then adjust the output current I _out to the desired current value by the resistance R _2.

As described above, the output current I is calculated by using the resistor R _2.
Together _out the desired current value, the DC current gain previously performed can not not cancel the sensitivity applied to the output current, so as to cancel the sensitivity due to the DC current amplification factor again using resistors R _3, then that such a to a desired value the current value by the resistance R _2, the output current is repeated until the or the error until the desired value is minimized, obtaining the resistance R ₂ and the resistor R _3.

The specific procedure will be described below.

(Procedure 1) First, a circuit simulation is performed so that the sensitivity of the DC current gain of the transistor Q _{1 to} the output current and the sensitivity of the DC current gain of the transistor Q _{2 to} the output current cancel each other out. R
Set the resistance of ₃ .

(Procedure 2) When the sensitivities of the transistors Q ₁ and Q _{2 on} the output current by the DC current amplification factors cancel each other, the output current I _out is different from the desired current value. _out to set the resistance value of the resistor R ₂ to the desired current value.

[0034] (Step 3) When the output current reaches the desired current, the sensitivity of the DC current amplification factor of the DC current sensitivity of the amplification factor of the transistor Q ₂ of the transistor Q ₁ is, since the longer not cancel again ( Perform procedure 1) → procedure 2. This operation is repeated several times until the output current reaches a desired value or the error with the output current is minimized, whereby the resistance values of the resistors R ₂ and R ₃ can be obtained.

Table 4-1 shows an example of the result obtained by performing a circuit simulation using the first conventional design method in FIG. 1 and examining the sensitivity of the DC current amplification factor. Note that this is the case where the input current I _in = 100 μA and n = 1. A sensitivity DC current amplification factor of the transistor Q ₁ is on the output current,
Not cancel each other sensitive DC current amplification factor of the transistor Q ₂ is on the output current. Table 4-2 shows the resistance values of the resistors R _1, R _2, R ₃ used in the circuit simulation. Table 4-3 shows the output current I _out with respect to the input current I _in, output current I _out is not in the desired current value.

[0036]

[Table 4] Table 5-1 using the method of the present embodiment shows a result of obtaining the resistance value of the resistor R ₂ and the resistor R _3, Table 5-2
Is an example of a result obtained by performing a circuit simulation using the resistance values shown in Table 5-1 and examining the sensitivity of the DC current gain to the output current. This result also corresponds to the case where n = 1, and corresponds to Table 1-1 and Table 1-2. A sensitivity DC current amplification factor of the transistor Q ₁ is on the output current, sensitivity DC current amplification factor of the transistor Q ₂ is on the output current, and cancel. In addition, it can be seen that the sensitivity of the reverse saturation current to the output current is canceled by using this method.

[0037]

[Table 5]FIG. 2 shows the input current I_in= 100 μA, n = 1
According to the method of the embodiment, the resistance R_TwoAnd resistance R_ThreeThe resistance of
Input current I on the horizontal axis._in, The vertical axis represents the output current I _out/ Enter
Force current I_inThis shows the relationship. At the same time, the first
Results when circuit constants are determined by conventional design methods
Are also shown. Input current I_in= 100 μA and the resistance R
_TwoAnd resistance R_ThreeIs determined, the input current I
_inOf the desired output current I_outBut
It is the current value.

[0038]

When the present invention is used as described above, the following effects are obtained.

Prior to adjusting the output current to a target current value, which is a conventional design guideline, first, in the current mirror circuit, the DC current gain of the transistor is changed to the output current by using the third resistor. If the effect of sensitivity is canceled between a pair of transistors and the circuit constant is determined so that the output current becomes a desired current value by using the second resistor, the change in the input current is less affected. Thus, a desired output current can be obtained with high accuracy.

[Brief description of the drawings]

FIG. 1 is a circuit configuration diagram of a current mirror circuit using a PNP transistor.

FIG. 2 is a characteristic diagram showing a relationship between an input current and an output current / input current when a resistance value obtained by a method according to an embodiment of the present invention is used.

FIG. 3 is a characteristic diagram showing a relationship between an input current and an output current / input current when a resistance value obtained by a first conventional design technique is used.

FIG. 4 is a characteristic diagram showing an emitter current and a collector current characteristic with respect to a base current per unit transistor constituting a circuit.

FIG. 5 is a characteristic diagram showing a relationship between an input current and an output current / input current when a resistance value obtained by a second conventional design technique is used.

6 is a circuit diagram of automatically determining circuit the resistance value of the resistor R ₃ in Fig.

7 is a characteristic diagram showing a relationship between an input current and an output current / input current when a resistance value obtained by the circuit of FIG. 6 is used.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 DC current source 2 Ideal current-voltage conversion circuit 3 Comparator circuit 4 Voltage control resistance Q1 _1st transistor Q2 _2nd transistor R1 _1st resistance R2 _2nd resistance R3 _3rd resistance

Claims (2)

[Claims] 1. A first transistor is a unit transistor, a first resistor is connected to an emitter of the first transistor, a second transistor is multiplied by a factor of the unit transistor, and an emitter of the second transistor is connected to an emitter of the second transistor. A second resistor is connected, a base of the first transistor and a base of the second transistor are connected via a third resistor, and a collector of the first transistor and a base of the second transistor are connected. And providing an input current to the collector of the first transistor;
In a current mirror circuit for obtaining an output current from a collector of the second transistor, a sensitivity of a change in a DC current gain of the first transistor to the output current and a change in a DC current gain of the second transistor And the sensitivity of the output current
A current mirror circuit, wherein the resistance value of the third resistor is set to a value that cancels each other. 2. The first transistor is a unit transistor, a first resistor is connected to the emitter of the first transistor, the second transistor is multiplied by a factor of the unit transistor, and the emitter of the second transistor is a unit transistor. A second resistor is connected, a base of the first transistor and a base of the second transistor are connected via a third resistor, and a collector of the first transistor and a base of the second transistor are connected. And providing an input current to the collector of the first transistor;
In the method of determining a resistance of a current mirror circuit for obtaining an output current from a collector of the second transistor, a sensitivity of a change in a DC current amplification factor of the first transistor to the output current and a DC current of the second transistor The sensitivity of the variation of the amplification factor on the output current is
A first step of setting the resistance value of the third resistor to a value that cancels each other; and a second step of setting the second resistance value so that the output current has a desired current value. A current mirror circuit comprising: repeating the first step and the second step so that the output current has a desired current value or approaches a desired current value. Resistance determination method.