JPH11297860A5 - - Google Patents
Info
- Publication number
- JPH11297860A5 JPH11297860A5 JP1998079129A JP7912998A JPH11297860A5 JP H11297860 A5 JPH11297860 A5 JP H11297860A5 JP 1998079129 A JP1998079129 A JP 1998079129A JP 7912998 A JP7912998 A JP 7912998A JP H11297860 A5 JPH11297860 A5 JP H11297860A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10079129A JPH11297860A (ja) | 1998-03-26 | 1998-03-26 | 半導体記憶装置 |
| US09/274,493 US6128223A (en) | 1998-03-26 | 1999-03-23 | Semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10079129A JPH11297860A (ja) | 1998-03-26 | 1998-03-26 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11297860A JPH11297860A (ja) | 1999-10-29 |
| JPH11297860A5 true JPH11297860A5 (OSRAM) | 2005-07-21 |
Family
ID=13681348
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10079129A Pending JPH11297860A (ja) | 1998-03-26 | 1998-03-26 | 半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6128223A (OSRAM) |
| JP (1) | JPH11297860A (OSRAM) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100387267B1 (ko) * | 1999-12-22 | 2003-06-11 | 주식회사 하이닉스반도체 | 멀티 레벨 플래쉬 이이피롬 셀 및 그 제조 방법 |
| US6418062B1 (en) * | 2001-03-01 | 2002-07-09 | Halo Lsi, Inc. | Erasing methods by hot hole injection to carrier trap sites of a nonvolatile memory |
| US6870764B2 (en) * | 2003-01-21 | 2005-03-22 | Xicor Corporation | Floating gate analog voltage feedback circuit |
| US7133316B2 (en) * | 2004-06-02 | 2006-11-07 | Macronix International Co., Ltd. | Program/erase method for P-channel charge trapping memory device |
| US7110298B2 (en) * | 2004-07-20 | 2006-09-19 | Sandisk Corporation | Non-volatile system with program time control |
| US7330373B2 (en) * | 2006-03-28 | 2008-02-12 | Sandisk Corporation | Program time adjustment as function of program voltage for improved programming speed in memory system |
| US7327608B2 (en) * | 2006-03-28 | 2008-02-05 | Sandisk Corporation | Program time adjustment as function of program voltage for improved programming speed in programming method |
| US8320191B2 (en) | 2007-08-30 | 2012-11-27 | Infineon Technologies Ag | Memory cell arrangement, method for controlling a memory cell, memory array and electronic device |
| US7835190B2 (en) * | 2008-08-12 | 2010-11-16 | Micron Technology, Inc. | Methods of erase verification for a flash memory device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61105862A (ja) * | 1984-10-30 | 1986-05-23 | Toshiba Corp | 半導体装置 |
| US5338952A (en) * | 1991-06-07 | 1994-08-16 | Sharp Kabushiki Kaisha | Non-volatile memory |
| US5414286A (en) * | 1992-03-19 | 1995-05-09 | Sharp Kabushiki Kaisha | Nonvolatile memory, method of fabricating the same, and method of reading information from the same |
| US5596529A (en) * | 1993-11-30 | 1997-01-21 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
-
1998
- 1998-03-26 JP JP10079129A patent/JPH11297860A/ja active Pending
-
1999
- 1999-03-23 US US09/274,493 patent/US6128223A/en not_active Expired - Lifetime