JPH11289553A - Digital video signal processing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the digital video signal processing circuit that processes a video signal by generating a color difference signal with a sampling frequency 8fc through data interpolation while leaving a sampling clock frequency 4fc as it is. SOLUTION: A color difference signal data interpolation circuit 21 that interpolates received digital color (C) signal data to covert a sampling frequency into an integral multiple of a frequency 4fc that is 4-times the frequency fc of a color burst is interposed to a pre-stage of a YC mix section 12, and the color difference signal data interpolation circuit 21 is provided with a 1-clock delay circuit 22 that produces data C90 with a phase difference of 90 degrees with respect to data C0, an adder 23 that adds the data C0 and C90 and a multiplier 24 that provides an output of interpolation data C45=(C0+C90)/√2, and the sampling frequency of the color difference signal is converted from 4fc into 8fc by interpolating the interpolation data C45=(C0+C90)/√2<1/2> .

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a digital video signal processing circuit for suppressing deterioration (aperture distortion) of high frequency components generated when converting a digital signal into an analog signal.

[0002]

2. Description of the Related Art Generally, a digital video signal processing circuit has a digital Y signal input terminal 10 as shown in FIG.
Y (luminance) signal input from the digital C signal input terminal 11
(Color) signal is mixed in the YC mixing section 12 and
The converter 13 converts a digital signal into an analog signal. However, the conventional digital video signal processing circuit uses the color burst frequency f due to the ease of signal processing.
The frequency 4fc, which is four times c, is used. When the sampling clock fsc is sampled at a frequency 4fc, which is four times the frequency fc of the color burst, and D / A conversion is performed, sampling is performed at approximately four points per wavelength as shown in FIG. 5A shows a case where sampling is performed at the maximum amplitude point, and FIG. 5B shows a case where sampling is performed at the minimum amplitude point. In particular, in the case shown in FIG. 5B, aperture distortion occurs in which high-frequency components are extremely attenuated.

Therefore, conventionally, as shown in FIG.
The output of the converter 13 is passed through an analog LPF 15, and the output of the analog LPF 15 is converted to an aperture correction circuit 16 composed of a filter circuit having characteristics opposite to those shown in FIG.
Thus, the attenuated aperture distortion of the high-frequency component is corrected, and an analog video signal is output to the analog video signal output terminal 17.

[0004]

The conventional circuit has an input Y
After the signal and the input C signal are mixed by the YC mixing section 12, the digital signal is further converted into an analog signal by the DA converter 13, and the aperture correction circuit 1 of the analog circuit is used.
6 corrected the aperture distortion. As described above, the aperture correction circuit 16 has the characteristic (sin
X) The filter circuit has a characteristic opposite to that of / X, and there is a problem that the circuit and the operation become complicated.

[0005] In particular, C has a large effect on aperture distortion.
The aperture distortion is corrected after mixing the signal and the Y signal having a small effect, but there is a problem that the deterioration of the C signal is large. In order to solve these problems, the sampling clock frequency is changed from 4fc to 8f
It is necessary to increase it to c or the like. However, increasing the sampling clock frequency to 8fc and performing digital processing has a problem in that the circuit scale increases.

An object of the present invention is to provide a digital video signal processing circuit which generates and processes a color difference signal having a sampling frequency of 8fc by data interpolation while keeping the sampling clock frequency at 4fc. .

[0007]

The present invention interpolates input digital color (C) signal data before a YC mixing section 12 for mixing a digital luminance (Y) signal and a digital color (C) signal. A color difference signal data interpolation circuit 21 for converting the sampling frequency to an integer multiple of the frequency 4fc, which is four times the frequency fc of the color burst, is interposed. 90 ° to signal data C0
One-clock delay circuit 22 for producing C90 having a phase difference of
And an adder 23 for adding C0C and 90, and interpolating data C45 = (C0 +
C90) / √2, and a multiplier 24 for outputting the digital video signal processing circuit.

In the above circuit configuration, two continuous color difference signals of C90 and C0 are extracted. These data have a phase difference of 90 ° from each other. Interpolation data is created by calculating C45 = (C0 + C90) / √2 by the adder 23 and the multiplier 24. By interpolating this, the sampling frequency of the color difference signal is set to 4fc.
To 8fc.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, the sampling clock frequency is kept at 4fc, and 8f
A color difference signal having a sampling frequency of c is generated and processed. The NTSC video signal is as follows: C = U × cos (ωct) + V × sin (ωct) (1) U = (R−Y) /1.14 (2) V = (B−Y) ) /2.08 (3) where ωc: angular frequency of frequency fc, Y: luminance signal R, red component signal B, blue component signal.

When the NTSC video signal is sampled at 4 fc, the color difference signal has a 90 ° phase difference every clock. On the other hand, the U and V components have a narrow frequency band and the amount of change during one clock is small. The color difference signal is interpolated using this property. FIGS. 2A and 2B show waveforms of the original video signal, data interpolation, and DA conversion output when (a) has the maximum amplitude, and FIG. 2B shows the original video signal, data interpolation, and DA conversion when (b) has the minimum amplitude. Each waveform of the conversion output is shown. It can be seen that the deterioration (aperture distortion) of the high frequency component is suppressed in each case.

A specific embodiment of the present invention will be described with reference to FIG. In FIG. 1, a digital Y signal input terminal 10
Is coupled to one input side of the YC mix unit 12, but if necessary, data for performing an interpolation process at an integer multiple of the frequency 4fc, which is four times the frequency fc of the color burst, for example, twice, is used. After interposing an insertion unit 18 and a 4 to 5 MHz digital LPF (low-pass filter) 20 for passing a band of 0 to 4.2 MHz Y signal and performing interpolation of insufficient video data, the YC mixing unit 12 It may be connected to one input side.

The digital C signal input terminal 11
It is coupled to the other input side of the YC mix section 12 via a color difference signal data interpolation circuit 21. On the output side of the YC mix unit 12, a DA converter 13 and an analog LP
It is coupled to the analog video signal output terminal 17 via F15. The sampling clock input terminal 14 of the DA converter 13 has a sampling clock fsc
Similar to the interpolation processing, the frequency 4fc, which is four times the frequency fc of the color burst, is an integral multiple of the frequency 4fc, for example, twice, more specifically, the frequency 8 which is eight times the sampling clock fsc.
fc is used to perform DA (digital-analog) conversion.

The color difference signal data interpolation circuit 21
1-clock delay circuit 2 for producing 0 ° phase delay signal
2. Signal without phase delay and 9 of 1 clock delay circuit 22
An adder 23 for adding a 0 ° phase delay signal; a multiplier 2 for multiplying the added output of the adder 23 by 1 / √2
4, a delay adjuster 25 for delaying the original signal, and a selector 26 for selecting with a 4fc clock from a 4fc clock input terminal 19.

The operation of the above circuit configuration will be described with reference to FIG. Of the digital C signals obtained by sampling the digital C signal at a frequency of 4fc,
Two continuous color difference signals of C0 input to the signal input terminal 11 and C0 delayed by one clock by the one-clock delay circuit 22 are extracted. These data have a phase difference of 90 ° from each other, and using the above equation (1), respectively, the following equation (4)
It can be expressed as (5). C0 = U0 × cos (ωct) + V0 × sin (ωct) (4) C90 = U90 × cos (ωct + 90 °) + V90 × sin (ωct + 90 °) (5) where U0 , U90, V0, and V90 are respectively C
0, U and V components at C90.

Here, since the frequency bands of U and V are sufficiently small with respect to fc, U0９０U90 (6) V0 ≒ V90 (7) ) Holds. At this time, if the C45 signal to be interpolated between C0 and C90 is C45 = U45 × cos (ωct + 45 °) + V45 × sin (ωct + 45 °) (8), C0 and C90 are A relationship of C45 = (C0 + C90) / √2 (9) holds. That is, (C0
+ C90), and the multiplier 24 calculates 1 / √2
Is interpolated to produce the interpolation data. By interpolating this, the sampling frequency of the color difference signal is set to 4
This means that fc has been converted to 8fc.

In the above embodiment, the data interpolation of the digital C signal is performed, and the data interpolation of the digital Y signal is not performed. However, as shown by a chain line in FIG. By interpolating between video data with zero-level data, the sampling frequency is converted to 8fc, which is twice as high, and then passed through the digital filter 20, to be converted to 8fc, which is twice the sampling frequency of the original video signal. In addition, it is possible to interpolate and output insufficient video data.

The interpolated outputs of the respective lacking video data are mixed in the YC mixing unit 12 and are output from the DA converter 1.
At 3, the analog-to-digital conversion is performed by the sampling clock of 8fc which is twice the sampling frequency, and the analog video signal is output from the analog video signal output terminal 17 via the analog LPF 15.

[0018]

According to the first aspect of the present invention, a color difference signal data interpolation circuit 21 for converting the color difference signal data to an integer multiple of 4fc is interposed at the preceding stage of the YC mixing section 12, and the color difference signal data interpolation circuit 21 is provided. Is a one-clock delay circuit 22 for producing C90 having a phase difference of 90 ° with respect to C0, and C0C
And an adder 23 for adding 90 to the interpolation data C45 =
(C0 + C90) / √2, so that the sampling clock frequency is kept at 4fc, and a color difference signal having a sampling frequency of 8fc can be generated and processed by data interpolation. Can be attenuated. In particular, it is effective in preventing deterioration of a digital color (C) signal having a band near the frequency fc of the color burst.

The sampling clock frequency is set to 8f
Instead of performing digital processing by increasing the value to c, a color difference signal having a sampling frequency of 8fc is generated and processed by data interpolation, so that the circuit scale does not increase.

According to the second aspect of the present invention, the digital luminance (Y) signal data is also interpolated, so that higher frequency components can be attenuated.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of a digital video signal processing circuit according to the present invention.

FIGS. 2A and 2B are diagrams for explaining an interpolation process of a digital original video signal according to the first embodiment of the present invention, wherein FIG. 2A is a waveform diagram when the amplitude is maximum, and FIG. It is.

FIG. 3 shows a sampling clock fsc by a conventional circuit.
FIG. 9 is a frequency characteristic diagram showing that high-frequency components are extremely attenuated and aperture distortion occurs when frequency conversion is performed using a four-fold frequency 4fc.

FIG. 4 is a block diagram showing a conventional digital video signal processing circuit.

5A and 5B are diagrams for explaining an interpolation process of a digital original video signal by a conventional circuit, wherein FIG. 5A is a waveform diagram when the amplitude is maximum, and FIG. 5B is a waveform diagram when the amplitude is minimum.

[Explanation of symbols]

10: Digital Y signal input terminal, 11: Digital C
Signal input terminal, 12: YC mix unit, 13: DA converter, 14: sampling clock input terminal, 15: analog LPF, 16: aperture correction circuit, 17: analog video signal input terminal, 18: data interpolation unit, 19 … 4
fc clock input terminal, 20 ... digital LPF, 21
... interpolation circuit for color difference signal data, 22 ... 1 clock delay circuit, 23 ... adder, 24 ... multiplier, 25 ... delay adjuster,
26 ... Selector.

Claims (2)

[Claims] 1. An input digital color (C) signal data is interpolated before a YC mixing section 12 for mixing a digital luminance (Y) signal and a digital color (C) signal to set a sampling frequency to a frequency of a color burst. fc
And a color difference signal data interpolation circuit 21 for converting the color difference signal data into an integer multiple of the frequency 4fc, which is four times the frequency of the digital color (C) signal data C0. A one-clock delay circuit 22 for generating C90 having a phase difference, an adder 23 for adding C0C and 90, and a multiplication for multiplying the added data by 1 / √2 to output interpolation data C45 = (C0 + C90) / √2 A digital video signal processing circuit comprising: 2. Interpolation and sampling of input digital luminance (Y) signal data before a YC mixing section 22 for mixing digital original video signals of a digital luminance (Y) signal and a digital color (C) signal. A data interpolation unit 18 for converting the frequency to an integer multiple of the frequency 4fc, which is four times the frequency fc of the color burst, and a digital filter 20 for interpolating the insufficient video data after the frequency conversion
2. The digital video signal processing circuit according to claim 1, wherein