JPH11274239A - Producing method for electronic component - Google Patents

Producing method for electronic component

Info

Publication number
JPH11274239A
JPH11274239A JP7893098A JP7893098A JPH11274239A JP H11274239 A JPH11274239 A JP H11274239A JP 7893098 A JP7893098 A JP 7893098A JP 7893098 A JP7893098 A JP 7893098A JP H11274239 A JPH11274239 A JP H11274239A
Authority
JP
Japan
Prior art keywords
electronic component
solder
electrode
solder bump
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7893098A
Other languages
Japanese (ja)
Inventor
Takashi Togasaki
隆 栂嵜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP7893098A priority Critical patent/JPH11274239A/en
Publication of JPH11274239A publication Critical patent/JPH11274239A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector

Abstract

PROBLEM TO BE SOLVED: To provide a method for easily connecting a projecting solder electrode and a connecting electrode on a circuit board without using any flux for soldering. SOLUTION: An inter-metal compound 16 is formed between a solder and a thin sheet metal by heating and pressing the projecting solder electrode on an electronic component 11 onto the thin sheet metal on a substrate 15 for transfer, and the inter-metal compound 16 is transferred onto the thin sheet metal by releasing and removing the electronic component 11 from the substrate 15 for transfer. Thus, an intrinsic solder side is exposed by removing an oxidized film on the projecting solder electrode, and the electronic component 11 is soldered onto a circuit board 23 without using any solder flux. Besides, a resin sheet is used in place of the thin sheet metal.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半田突起電極を有す
る電子部品の半田突起電極と回路基板上の接続電極とを
接続する電子部品の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic component for connecting a solder projection electrode of an electronic component having a solder projection electrode to a connection electrode on a circuit board.

【0002】[0002]

【従来の技術】多数の入出力電極を有する電子部品に対
しても実装外形が大型化することなしに回路基板上に高
密度に電子部品を実装可能な方法として、フェースダウ
ン実装方式が知られている。このフェースダウン実装方
式は、電子部品上に2次元的に配置された半田突起電極
と回路基板上に形成された接続電極とを直接接続する方
法である。フェースダウン実装方式では、半田突起電極
を溶融させて回路基板上の接続電極と半田付けする際
に、半田濡れ性を向上させるためのフラックスが用いら
れる。フラックスは半田表面酸化膜を除去して半田真性
面と接続電極とを接触させることにより半田濡れ性を向
上させるものである。しかしながらフラックスを用いる
と通常フラックス残渣が生じる。このフラックス残渣
は、腐食防止および電子部品下部を樹脂封止するため
に、半田付け後に洗浄除去される。このフラックス残渣
洗浄は、洗浄や乾燥等の工程数の増加によるコストの上
昇と、洗浄液の処理に伴い地球環境への悪影響を及ぼす
という問題があった。この問題のためにフラックスを用
いないフェースダウン実装方式の開発が求められてき
た。フラックスを用いずに、半田突起電極表面の酸化膜
を除去する方法として、半導体チップに超音波を印加し
ながら回路基板と圧着する方法(特開昭63ー288031 )や
突起電極中央に小さな隆起を設けて接続電極と対向させ
て加圧することにより突起電極を組成変形させることに
より圧着する方法(特開平2-112250)が提案されてい
る。ところが、超音波を印加しながら回路基板と圧着す
る方法に於いては、部品全体に超音波が印加されるた
め、出力の大きな超音波振動子が必要であり、装置が大
がかりとなり、ひいてはコストの増加につながるという
問題と超音波により部品が破損する恐れがあるという問
題があった。また、突起電極中央に小さな隆起を設けて
圧着する方法は、突起電極が潰れることを防ぐために、
突起電極の溶融温度以下の温度で接続することから大き
な加圧力が必要であるため、加圧によって電子部品が破
損しやすいという問題と、加圧による素子特性の変動を
避けるために電子部品の能動素子部分上に突起電極を形
成することが出来ないことから突起電極数が限定されて
多ピン化に対応できないという問題があった。
2. Description of the Related Art A face-down mounting method is known as a method for mounting electronic components on a circuit board at a high density without increasing the size of the mounted external components even for electronic components having a large number of input / output electrodes. ing. This face-down mounting method is a method of directly connecting a solder bump electrode two-dimensionally arranged on an electronic component and a connection electrode formed on a circuit board. In the face-down mounting method, a flux for improving solder wettability is used when a solder bump electrode is melted and soldered to a connection electrode on a circuit board. The flux improves the solder wettability by removing the oxide film on the solder surface and bringing the intrinsic surface of the solder into contact with the connection electrode. However, the use of flux usually produces flux residues. This flux residue is washed and removed after soldering in order to prevent corrosion and to seal the lower part of the electronic component with resin. The cleaning of the flux residue has a problem that the cost increases due to an increase in the number of steps such as cleaning and drying, and that the treatment of the cleaning liquid has a bad influence on the global environment. Due to this problem, development of a face-down mounting method that does not use flux has been required. As a method of removing the oxide film on the surface of the solder bump electrode without using a flux, a method of applying pressure to the semiconductor chip by applying ultrasonic waves to the semiconductor chip (Japanese Patent Laid-Open No. 63-288031) or a method of forming a small bump in the center of the bump electrode A method has been proposed in which the protruding electrode is pressure-bonded by deforming the protruding electrode by applying pressure while facing the connection electrode (Japanese Patent Laid-Open No. 2-112250). However, in the method of crimping the circuit board while applying ultrasonic waves, since ultrasonic waves are applied to the entire component, an ultrasonic vibrator having a large output is required, and the apparatus becomes large-scale, and as a result, cost is reduced. There is a problem that it leads to an increase and a problem that parts may be damaged by ultrasonic waves. In addition, the method of providing a small protrusion at the center of the protruding electrode and pressing the protruding electrode is to prevent the protruding electrode from being crushed,
Since the connection is performed at a temperature lower than the melting temperature of the protruding electrode, a large pressing force is required, so that the electronic components are easily damaged by the pressurization. Since it is impossible to form the protruding electrodes on the element portion, there is a problem that the number of protruding electrodes is limited and it is impossible to cope with the increase in the number of pins.

【0003】[0003]

【発明が解決しようとする課題】以上に述べたように、
超音波を印加しながら回路基板と圧着する方法には、装
置が大がかりとなりコストの増加につながるという問題
と超音波により部品が破損する恐れがあるという問題が
あった。また、突起電極中央に小さな隆起を設けて圧着
する方法には、電子部品が破損しやすいという問題と突
起電極数が限定されて多ピン化に対応できないという問
題があった。本発明は、以上の問題点を解決するために
なされたものであり、半田突起電極と回路基板上の接続
電極とを半田付け用フラックスを用いること無く容易に
接続することを目的とする。
As described above, as described above,
The method of crimping a circuit board while applying an ultrasonic wave has a problem that the device becomes large-scale, which leads to an increase in cost, and a problem that parts may be damaged by the ultrasonic wave. Further, the method of providing a small ridge at the center of the protruding electrode and performing pressure bonding has a problem that the electronic component is easily damaged and a problem that the number of protruding electrodes is limited and it is difficult to cope with the increase in the number of pins. The present invention has been made to solve the above problems, and has as its object to easily connect a solder bump electrode to a connection electrode on a circuit board without using a soldering flux.

【0004】[0004]

【課題を解決するための手段】上記目的を達成するため
に本発明は、表面が酸化膜で覆われた複数の半田突起電
極を有する電子部品と、表面が金属面である転写用基板
とを対向させ、前記電子部品と前記転写用基板とを加
圧、加熱することにより、前記半田突起電極と前記金属
面との接合部分に金属間化合物を形成する工程と、前記
電子部品を前記転写用基板から剥離除去して前記金属間
化合物を前記金属面上に転写することにより、前記半田
突起電極表面の酸化膜を少なくとも一部除去して半田真
性面を露出させる工程と、前記半田突起電極に対応した
接続電極を有する回路基板と前記電子部品上の半田突起
電極とを位置合わせを行ない、前記電子部品を前記回路
基板上に搭載する工程と、前記電子部品と前記回路基板
を加熱して前記半田突起電極を溶融させることにより、
前記半田突起電極と前記接続電極とを接合する工程とを
具備することを特徴とする電子部品の製造方法を提供す
る。また本発明は、前記金属面はAu、Ni、Cu、In、Snの
少なくともひとつからなることを特徴とする電子部品の
製造方法を提供する。
In order to achieve the above object, the present invention provides an electronic component having a plurality of solder bump electrodes whose surfaces are covered with an oxide film, and a transfer substrate having a metal surface. Opposing, pressing and heating the electronic component and the transfer substrate to form an intermetallic compound at the joint between the solder bump electrode and the metal surface; and transferring the electronic component to the transfer substrate. Transferring the intermetallic compound onto the metal surface by peeling and removing from the substrate, thereby removing at least a part of the oxide film on the surface of the solder bump electrode to expose the solder intrinsic surface; and Aligning a circuit board having a corresponding connection electrode with a solder bump electrode on the electronic component, and mounting the electronic component on the circuit board; and heating the electronic component and the circuit board to heat the electronic component and the circuit board. solder By melting the raised electrode,
Bonding the solder bump electrode and the connection electrode to each other. The present invention also provides a method for manufacturing an electronic component, wherein the metal surface is made of at least one of Au, Ni, Cu, In, and Sn.

【0005】また本発明は、前記半田突起電極はPb、S
n、Ag、Bi、Cu、Inの少なくともひとつからなる合金で
あることを特徴とする電子部品の製造方法を提供する。
また本発明は、前記金属間化合物を形成する工程の加熱
温度は前記半田突起電極の溶融温度以下であることを特
徴とする電子部品の製造方法を提供する。
Further, according to the present invention, the solder protruding electrodes may be made of Pb, S
Provided is a method for manufacturing an electronic component, which is an alloy made of at least one of n, Ag, Bi, Cu, and In.
The present invention also provides a method for manufacturing an electronic component, wherein a heating temperature in the step of forming the intermetallic compound is lower than a melting temperature of the solder bump electrode.

【0006】また本発明は、表面が酸化膜で覆われた複
数の半田突起電極を有する電子部品と、樹脂シートとを
対向させ、前記電子部品と前記樹脂シートとを加圧、加
熱することにより、前記半田突起電極を前記樹脂シート
中に埋め込む工程と、非酸化性雰囲気中で、前記電子部
品を加熱して前記半田突起電極を溶融させる工程と、非
酸化性雰囲気中で、前記半田突起電極が溶融した状態を
保ちながら前記電子部品を前記樹脂シートから除去する
ことにより、前記半田突起電極表面の酸化膜を前記樹脂
シートに転写することにより除去して、半田真性面を露
出させる工程と、前記半田突起電極に対応した接続電極
を有する回路基板と前記電子部品上の前記半田突起電極
の位置合わせを行ない、前記電子部品を前記回路基板上
に搭載する工程と、前記電子部品と前記回路基板とを加
熱して前記半田突起電極を溶融させることにより、前記
半田突起電極と前記接続電極とを接合する工程とを具備
することを特徴とする電子部品の製造方法を提供する。
Further, the present invention provides a method in which an electronic component having a plurality of solder projecting electrodes whose surfaces are covered with an oxide film is opposed to a resin sheet, and the electronic component and the resin sheet are pressed and heated. Embedding the solder projecting electrode in the resin sheet; heating the electronic component in a non-oxidizing atmosphere to melt the solder projecting electrode; Removing the electronic component from the resin sheet while maintaining the molten state, removing the oxide film on the surface of the solder bump electrode by transferring it to the resin sheet, exposing a solder intrinsic surface, Aligning the solder bump electrode on the circuit board with the circuit board having the connection electrode corresponding to the solder bump electrode, and mounting the electronic component on the circuit board; Bonding the solder projection electrode and the connection electrode by heating the electronic component and the circuit board to melt the solder projection electrode. provide.

【0007】また本発明は、前記樹脂シートが熱可塑性
樹脂からなることを特徴とする電子部品の製造方法を提
供する。また本発明は、前記半導体突起電極を前記樹脂
シート中に埋め込む工程の加熱温度は樹脂シートの軟化
温度より高く、半田突起電極の溶融温度より低いことを
特徴とする電子部品の製造方法を提供する。
The present invention also provides a method for manufacturing an electronic component, wherein the resin sheet is made of a thermoplastic resin. The present invention also provides a method for manufacturing an electronic component, wherein the heating temperature in the step of embedding the semiconductor bump electrode in the resin sheet is higher than the softening temperature of the resin sheet and lower than the melting temperature of the solder bump electrode. .

【0008】本発明では、電子部品上の半田突起電極を
転写用基板上の金属薄膜に加熱圧接して半田と金属薄膜
の間に金属間化合物を形成し、電子部品を転写用基板か
ら剥離除去して金属間化合物を金属薄膜上に転写する。
こうすることで半田突起電極上の酸化膜を除去して半田
真性面を露出させる。次に、この電子部品を回路基板上
に搭載して半田突起電極を溶融させることにより、フラ
ックスを用いることなく半田付けできる。
In the present invention, the solder bump electrode on the electronic component is heated and pressed against the metal thin film on the transfer substrate to form an intermetallic compound between the solder and the metal thin film, and the electronic component is peeled off from the transfer substrate. To transfer the intermetallic compound onto the metal thin film.
By doing so, the oxide film on the solder bump electrode is removed to expose the intrinsic surface of the solder. Next, by mounting this electronic component on a circuit board and melting the solder bump electrodes, soldering can be performed without using flux.

【0009】この方法は、半田突起電極の表面には酸化
膜が存在するが、加熱により半田突起電極と金属薄膜と
の反応性が向上してこれらの界面に金属間化合物が形成
される。さらに、電子部品剥離時の応力は半田突起電極
と金属薄膜の接合部に集中し、半田突起電極材料の破断
強度は金属間化合物の破断強度より小さいため、剥離時
の破断は金属間化合物近傍の半田内部で生ずる。これに
より半田真性面が露出し、酸化膜がなく濡れ性の良い半
田突起電極表面が得られることとなる。
In this method, an oxide film exists on the surface of the solder bump electrode, but the reactivity between the solder bump electrode and the metal thin film is improved by heating, so that an intermetallic compound is formed at the interface therebetween. Furthermore, the stress at the time of peeling the electronic component is concentrated on the joint between the solder bump electrode and the metal thin film, and the breaking strength of the solder bump electrode material is smaller than the breaking strength of the intermetallic compound. Occurs inside the solder. As a result, the intrinsic surface of the solder is exposed, and the surface of the solder bump electrode having no wettability and having no oxide film can be obtained.

【0010】また本発明は、電子部品上の半田突起電極
を樹脂シートに埋め込み、半田突起電極を溶融させなが
ら非酸化性雰囲気中で電子部品を樹脂シートから除去す
る。こうすることで半田突起電極の表面酸化膜を樹脂シ
ートに転写除去して半田真性面を露出させる。次に、電
子部品を回路基板上に搭載して半田突起電極を溶融させ
ることにより、フラックスを用いることなく半田付けで
きる。
Further, according to the present invention, a solder bump electrode on an electronic component is embedded in a resin sheet, and the electronic component is removed from the resin sheet in a non-oxidizing atmosphere while melting the solder bump electrode. By doing so, the surface oxide film of the solder bump electrode is transferred and removed to the resin sheet to expose the intrinsic surface of the solder. Next, the electronic component is mounted on a circuit board and the solder bump electrodes are melted, so that soldering can be performed without using flux.

【0011】この方法は、半田突起電極の表面には酸化
膜が形存在するが、半田酸化膜は融点が高いことから、
半田突起電極が溶融した状態で電子部品を樹脂シートか
ら除去する際に、半田酸化膜が樹脂シートに固着された
まま転写されることにより半田真性面が露出し、酸化膜
がなく濡れ性の良い半田突起電極表面が得られることと
なる。
In this method, an oxide film is present on the surface of the solder bump electrode, but since the solder oxide film has a high melting point,
When the electronic component is removed from the resin sheet in a state where the solder bump electrode is melted, the solder oxide film is transferred while being fixed to the resin sheet, so that the intrinsic surface of the solder is exposed, and there is no oxide film and good wettability. A solder bump electrode surface is obtained.

【0012】[0012]

【発明の実施の形態】図1から図5を用いて、本発明の
電子部品の製造方法を説明する。先ず、図1に示すよう
に、表面に半田突起電極12が形成されたシリコン半導
体チップからなる電子部品11と、表面に金属皮膜14
が形成された石英ガラスからなる転写用基板15を対向
させる。電子部品11は寸法が4.3mm ×4.1mm のダイシ
ングされたシリコン半導体チップであり、電子部品11
の周囲にはSn/Pb(60%/40% 重量比)合金からなる半田
突起電極12が250 ミクロンのピッチで一列に64個形
成されている。半田突起電極12は、直径が100ミク
ロンで高さが60ミクロンの球状であり、半田突起電極
12の表面には錫酸化物からなる厚さ5nm から50nmの酸
化膜13が形成されている。転写用基板15上にはTi/N
i/Auをそれぞれ100nm/500nm/100nm の厚さで順次積層し
た金属薄膜14が全面に形成されている。次に、図2に
示すように、電子部品11と転写用基板15とに圧力と
温度とを加え、半田突起電極12と金属薄膜14との接
合部分に金属間化合物16を形成する。この工程では、
半田突起電極12に含有されるSnと金属薄膜14の最上
層のAuは反応性が高く、高温では急速にAuSn2 を主成分
とする金属間化合物層16を形成する。本工程の加熱温
度は半田突起電極12の溶融温度以下で行い、温度は10
0 ℃ないし150 ℃、加熱時間は10秒ないし60秒である。
また本工程の加圧力は10MPa ないし200MPaである。この
工程によって、形成される金属間化合物層16の厚さは
60nmないし300nm である。このとき半田突起電極12中
へ金属薄膜14の溶融を防ぐため、本工程の加熱温度は
半田突起電極12の溶融温度(183 ℃)以下で行なう。
次に、図3に示すように、電子部品11を転写用基板1
5から剥離除去して金属間化合物層16を金属薄膜14
上に転写する。この工程により、半田突起電極12の表
面上の酸化膜を一部除去して半田真性面17を露出させ
る。このとき半田突起電極12と金属薄膜14の接合部
がくびれているために、電子部品11を剥離する際の応
力は、半田突起電極12と金属薄膜14の接合部に集中
する。また、半田突起電極12(SnPb(40/60) )の破断
強度(40MPa 〜80MPa)は金属間化合物層16(AnSn2
)の破断強度(100MPa〜250MPa)より小さい。以上2
つの理由によって、剥離時の破断は金属間化合物層16
と半田突起電極12界面(半田突起電極内部)で生ず
る。こうして、半田真性面が露出し、濡れ性の良い半田
突起電極12表面が得られる。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing an electronic component according to the present invention will be described with reference to FIGS. First, as shown in FIG. 1, an electronic component 11 composed of a silicon semiconductor chip having a solder bump electrode 12 formed on the surface, and a metal film 14 formed on the surface.
The transfer substrate 15 made of quartz glass on which is formed is opposed to each other. The electronic component 11 is a diced silicon semiconductor chip having a size of 4.3 mm × 4.1 mm.
Are formed around the solder bump electrodes 12 made of Sn / Pb (60% / 40% weight ratio) alloy at a pitch of 250 microns in a row. The solder bump electrode 12 has a spherical shape with a diameter of 100 μm and a height of 60 μm. On the surface of the solder bump electrode 12, an oxide film 13 made of tin oxide and having a thickness of 5 nm to 50 nm is formed. Ti / N on transfer substrate 15
A metal thin film 14 in which i / Au is sequentially laminated at a thickness of 100 nm / 500 nm / 100 nm is formed on the entire surface. Next, as shown in FIG. 2, pressure and temperature are applied to the electronic component 11 and the transfer substrate 15 to form an intermetallic compound 16 at a joint between the solder bump electrode 12 and the metal thin film 14. In this step,
Sn contained in the solder bump electrode 12 and Au in the uppermost layer of the metal thin film 14 have high reactivity, and rapidly form an intermetallic compound layer 16 mainly composed of AuSn2 at a high temperature. The heating temperature in this step is lower than the melting temperature of the solder bump electrode 12, and the temperature is 10
0 ° C to 150 ° C, heating time is 10 seconds to 60 seconds.
The pressure in this step is 10 MPa to 200 MPa. By this step, the thickness of the intermetallic compound layer 16 formed is
60 nm to 300 nm. At this time, in order to prevent the melting of the metal thin film 14 into the solder bump electrodes 12, the heating temperature in this step is set to be lower than the melting temperature of the solder bump electrodes 12 (183 ° C.).
Next, as shown in FIG. 3, the electronic component 11 is transferred to the transfer substrate 1.
5 to remove the intermetallic compound layer 16 from the metal thin film 14.
Transfer to the top. In this step, the oxide film on the surface of the solder bump electrode 12 is partially removed to expose the solder intrinsic surface 17. At this time, since the joint between the solder bump electrode 12 and the metal thin film 14 is narrowed, the stress at the time of peeling the electronic component 11 concentrates on the joint between the solder bump electrode 12 and the metal thin film 14. The breaking strength (40 MPa to 80 MPa) of the solder bump electrode 12 (SnPb (40/60)) is determined by the intermetallic compound layer 16 (AnSn2
) Is smaller than the breaking strength (100 MPa to 250 MPa). Above 2
For the following two reasons, the fracture at the time of peeling is caused by the intermetallic compound layer 16.
At the interface between the solder bump electrodes 12 (inside the solder bump electrodes). Thus, the solder intrinsic surface is exposed, and the surface of the solder bump electrode 12 having good wettability is obtained.

【0013】次に、図4に示すように、表面に銅/ニッ
ケル/金が順次積層された接続電極22を有するガラス
エポキシからなる回路基板23と、真性面が出た半田突
起電極12を位置合わせして、電子部品11を搭載す
る。搭載する際に5MPaないし20MPa の圧力を加えること
により接続電極と半田真性面を密着させる。この時用い
る回路基板23はガラス= エポキシに限定されるもので
はなく、BTレジン・ポリフェニルエチレン・アルミナ
・窒化アルミニウムでもよい。次に、図5に示すよう
に、電子部品11と回路基板23を加熱して半田突起電
極12を溶融させることにより電子部品を回路基板に接
合する。加熱にはベルト式加熱炉を用い、200 ℃ないし
260 ℃で10秒ないし90秒間の加熱を行う。この加熱は、
半田真性面が加熱中に酸化することを防ぐために、窒素
又は窒素と水素の混合気体からなる非酸化性雰囲気中で
行なう。この溶融工程では、半田突起電極12の真性面
と接続電極22が半田酸化膜を介さず直接密着している
ため、半田が溶融すると直ちに接続電極22表面のAuが
半田突起電極12中に溶解し、露出したNiと半田の間に
一様な金属間化合物(NiSn2 )層が形成されて半田と接
続電極が濡れることにより強固な接合部を形成する。
Next, as shown in FIG. 4, a circuit board 23 made of glass epoxy having a connection electrode 22 on which copper / nickel / gold is sequentially laminated on the surface and a solder bump electrode 12 having an intrinsic surface are located. At the same time, the electronic component 11 is mounted. By applying a pressure of 5MPa to 20MPa when mounting, the connection electrode and the solder intrinsic surface are brought into close contact. The circuit board 23 used at this time is not limited to glass = epoxy, but may be BT resin / polyphenylethylene / alumina / aluminum nitride. Next, as shown in FIG. 5, the electronic component 11 and the circuit board 23 are heated to melt the solder bump electrodes 12, thereby joining the electronic component to the circuit board. Use a belt-type heating furnace for heating.
Heat at 260 ° C for 10 to 90 seconds. This heating
In order to prevent the solder intrinsic surface from being oxidized during heating, the soldering is performed in a non-oxidizing atmosphere composed of nitrogen or a mixed gas of nitrogen and hydrogen. In this melting step, since the intrinsic surface of the solder bump electrode 12 and the connection electrode 22 are in direct contact with each other without the intermediary of the solder oxide film, as soon as the solder is melted, Au on the surface of the connection electrode 22 melts into the solder bump electrode 12. A uniform intermetallic compound (NiSn 2 ) layer is formed between the exposed Ni and the solder, and the solder and the connection electrode are wetted to form a strong joint.

【0014】以上の工程により、電子部品11と回路基
板23上の接続電極22とをフラックスを用いること無
く半田付けすることが可能となる。図6は本発明の別の
実施例を示す工程図である。先ず図6(a)に示すよう
に、加熱ヘッド21を用いて電子部品11をあらかじめ
転写用基板15上に、圧力と温度とを加え、半田突起電
極と金属薄膜との接合部分に金属間化合物を形成するよ
うに接続させておく。このとき図6(b)に示すような
複数の電子チップ付きシートを用意する。次に、図6
(c)に示すように、吸着ヘッド25を用いて、電子部
品を転写用基板から剥離除去して金属間化合物層16を
金属薄膜上に転写することにより、半田突起電極上の酸
化膜を除去して半田真性面を露出させる。
Through the above steps, the electronic component 11 and the connection electrode 22 on the circuit board 23 can be soldered without using a flux. FIG. 6 is a process chart showing another embodiment of the present invention. First, as shown in FIG. 6A, a pressure and a temperature are applied to the electronic component 11 in advance on the transfer substrate 15 by using the heating head 21, and the intermetallic compound is applied to the joint between the solder bump electrode and the metal thin film. Are formed so as to form. At this time, a plurality of sheets with electronic chips as shown in FIG. 6B are prepared. Next, FIG.
As shown in FIG. 3C, the oxide film on the solder bump electrode is removed by transferring the intermetallic compound layer 16 onto the metal thin film by peeling and removing the electronic component from the transfer substrate using the suction head 25. To expose the intrinsic surface of the solder.

【0015】次に、図6(d)に示すように、接続電極
22を有する回路基板23と電子部品上の半田突起電極
の位置合わせして搭載する。最後に、図6(e)に示す
ように、電子部品と回路基板を加熱して半田突起電極を
溶融させることにより電子部品を回路基板に接合する。
Next, as shown in FIG. 6D, the circuit board 23 having the connection electrode 22 and the solder bump electrode on the electronic component are aligned and mounted. Finally, as shown in FIG. 6E, the electronic component is joined to the circuit board by heating the electronic component and the circuit board to melt the solder bump electrodes.

【0016】以上の図6(c)の工程から図6(e)の
工程は連続して行なうことにより、図6(c)の工程で
露出された半田真性面の再酸化が防止され、信頼性の高
い半田接合部を得ることが出来る。また図6(b)に示
す電子チップ付きシートを大量に用意しておくことで、
作業効率が著しく向上する。なお、本実施例の半田突起
電極材料はSn/Pb合金に限るものではなく、Pb、Sn、A
g、Bi、Cu、Inの何れかを組み合わせてなる合金でもよ
い。また、本実施例の金属薄膜はTi/Ni/Au積層膜に限る
ものではなく、Ti/Ni 薄膜、Ti/Cu 薄膜、Ti/Cu/Au薄
膜、Cu箔電極上のIn被覆膜、Cu箔電極上のSn被覆膜等を
用いてもよい。また、本実施例の転写用基板は石英ガラ
スに限るものではなく、ソーダガラス、シリコンでも良
い。さらに金属薄膜と転写用基板の組合せに替ってCu
板、Ni板、Au被覆したCu板、Au被覆したNi板を用いても
よい。
The steps shown in FIG. 6C to FIG. 6E are performed continuously to prevent re-oxidation of the solder intrinsic surface exposed in the step shown in FIG. It is possible to obtain a solder joint having high property. By preparing a large number of sheets with electronic chips shown in FIG. 6B,
Work efficiency is significantly improved. The material of the solder bump electrode of this embodiment is not limited to Sn / Pb alloy, but may be Pb, Sn, A
An alloy formed by combining any of g, Bi, Cu, and In may be used. Further, the metal thin film of the present embodiment is not limited to the Ti / Ni / Au laminated film, but includes a Ti / Ni thin film, a Ti / Cu thin film, a Ti / Cu / Au thin film, an In coating film on a Cu foil electrode, A Sn coating film on a foil electrode or the like may be used. Further, the transfer substrate of this embodiment is not limited to quartz glass, but may be soda glass or silicon. In addition, instead of the combination of metal thin film and transfer substrate, Cu
Plates, Ni plates, Au-coated Cu plates, and Au-coated Ni plates may be used.

【0017】次に本発明の電子部品の製造方法の別の実
施例を説明する。先ず、図7に示すように、表面に半田
突起電極12が形成されたシリコン半導体チップからな
る電子部品11と熱可塑性樹脂からなる樹脂シート31
を対向させる。この電子部品11は、寸法が4.3mm ×4.
1mm のダイシングされたシリコン半導体チップである。
またこの電子部品11の周囲にはSn/Pb(60%/40% 重量
比)合金からなる半田突起電極12が250 ミクロンのピ
ッチで一列に64個形成されている。また半田突起電極
12表面には酸化膜13が覆われている。樹脂シート3
1に用いる熱可塑性樹脂としては半田溶融温度以下に軟
化温度をもつポリアセタール樹脂(軟化温度:80〜1
60℃)、ポリアミド樹脂(軟化温度:80〜230
℃)、ポリサルホン樹脂(軟化温度:150〜220
℃)、ポリエーテルサルホン樹脂(軟化温度:150〜
220℃)、ポリカーボネート樹脂(軟化温度:100
〜150℃)、ポリブチレンテレフタレート樹脂(軟化
温度:80〜210℃)、ポリエーテルケトン樹脂(軟
化温度:150〜280℃)、ポリエーテルエーテルケ
トン樹脂(軟化温度:150〜280℃)、ポリエーテ
ルイミド樹脂(軟化温度:200〜210℃)、ポリア
リレート樹脂(軟化温度:50〜120℃)、ポリエチ
レンテレフタレート樹脂(軟化温度:180〜230
℃)、ポリフェニレンサルファイド樹脂(軟化温度:1
60〜280℃)等を用いることが出来る。
Next, another embodiment of the method for manufacturing an electronic component according to the present invention will be described. First, as shown in FIG. 7, an electronic component 11 made of a silicon semiconductor chip having solder bump electrodes 12 formed on a surface thereof and a resin sheet 31 made of a thermoplastic resin
Face each other. This electronic component 11 measures 4.3 mm x 4.
1mm silicon semiconductor chip diced.
Around this electronic component 11, 64 solder bump electrodes 12 made of a Sn / Pb (60% / 40% weight ratio) alloy are formed in a row at a pitch of 250 microns. The surface of the solder bump electrode 12 is covered with an oxide film 13. Resin sheet 3
As the thermoplastic resin used in No. 1, a polyacetal resin having a softening temperature below the solder melting temperature (softening temperature: 80 to 1)
60 ° C.), polyamide resin (softening temperature: 80 to 230)
C), polysulfone resin (softening temperature: 150-220)
℃), polyether sulfone resin (softening temperature: 150 ~
220 ° C), polycarbonate resin (softening temperature: 100
-150 ° C), polybutylene terephthalate resin (softening temperature: 80-210 ° C), polyetherketone resin (softening temperature: 150-280 ° C), polyetheretherketone resin (softening temperature: 150-280 ° C), polyether Imide resin (softening temperature: 200 to 210 ° C), polyarylate resin (softening temperature: 50 to 120 ° C), polyethylene terephthalate resin (softening temperature: 180 to 230)
° C), polyphenylene sulfide resin (softening temperature: 1
60-280 ° C.).

【0018】次に、図8に示すように、電子部品11と
樹脂シート31とに5Paないし100Paの圧力と7
0℃ないし150℃の温度とを加え、半田突起電極12
を樹脂シート31中に埋め込む。本工程の加熱温度は半
田の溶融温度以下で尚且つ樹脂シートの軟化温度以上と
することにより、樹脂シートが軟化し、一方で半田突起
電極は軟化しないため、これらの硬さの差異によって半
田突起電極が樹脂シート中に完全に埋め込まれる。次
に、図9に示すように、電子部品11に加熱を加えて半
田突起電極12を溶融させ、吸着ヘッドを用いて電子部
品11を吸着して樹脂シート32から引き剥がす。この
工程により、半田突起電極12の表面酸化膜13を樹脂
シート31中にに転写することにより除去して、半田真
性面を露出させる。本工程は半田表面の再酸化を防ぐた
めに窒素、アルゴン等の非酸化性雰囲気中で行なう。本
工程では、半田突起電極12表面の酸化膜13は融点が
1127℃と高いため、半田のみが溶融するため、酸化
膜が樹脂シート側に転写されて、半田真性面が露出す
る。
Next, as shown in FIG. 8, a pressure of 5 Pa to 100 Pa is applied to the electronic component 11 and the resin sheet 31.
A temperature of 0 ° C. to 150 ° C.
Is embedded in the resin sheet 31. By setting the heating temperature in this step to be equal to or lower than the melting temperature of the solder and equal to or higher than the softening temperature of the resin sheet, the resin sheet is softened, while the solder bump electrodes do not soften. The electrodes are completely embedded in the resin sheet. Next, as shown in FIG. 9, the electronic component 11 is heated to melt the solder bump electrodes 12, and the electronic component 11 is sucked using a suction head and peeled off from the resin sheet 32. In this step, the surface oxide film 13 of the solder bump electrode 12 is removed by being transferred to the resin sheet 31 to expose the intrinsic solder surface. This step is performed in a non-oxidizing atmosphere such as nitrogen or argon to prevent re-oxidation of the solder surface. In this step, since the melting point of the oxide film 13 on the surface of the solder bump electrode 12 is as high as 1127 ° C., only the solder is melted. Therefore, the oxide film is transferred to the resin sheet side, and the intrinsic surface of the solder is exposed.

【0019】次に、図10に示すように、接続電極22
を有する回路基板23と電子部品11上の半田突起電極
12を位置合わせし搭載する。回路基板は第1の実施例
と同様の基板を用いる。
Next, as shown in FIG.
The circuit board 23 having the solder bump electrodes 12 on the electronic component 11 is aligned and mounted. A circuit board similar to that of the first embodiment is used.

【0020】最後に、図11に示すように、電子部品1
1と回路基板23を加熱して半田突起電極を溶融させる
ことにより電子部品11を回路基板23に接合する。接
合条件は第1の実施例と同様の条件を用いる。以上の方
法により、半田突起電極と回路基板上の接続電極とを半
田付け用フラックスを用いること無く接続する手段が提
供される。
Finally, as shown in FIG.
The electronic component 11 is joined to the circuit board 23 by heating the circuit board 1 and the circuit board 23 to melt the solder bump electrodes. The same joining conditions as in the first embodiment are used. According to the above method, means for connecting the solder bump electrode and the connection electrode on the circuit board without using a soldering flux is provided.

【0021】[0021]

【発明の効果】以上説明したように、本発明の電子部品
の製造方法によれば、半田付けフラックスを用いること
無く、半田突起電極を用いた接合部を形成することが可
能となる。
As described above, according to the method of manufacturing an electronic component of the present invention, it is possible to form a joint using a solder bump electrode without using a soldering flux.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の第1の実施例を示す工程図FIG. 1 is a process chart showing a first embodiment of the present invention.

【図2】本発明の第1の実施例を示す工程図FIG. 2 is a process chart showing a first embodiment of the present invention.

【図3】本発明の第1の実施例を示す工程図FIG. 3 is a process chart showing a first embodiment of the present invention.

【図4】本発明の第1の実施例を示す工程図FIG. 4 is a process chart showing a first embodiment of the present invention.

【図5】本発明の第1の実施例を示す工程図FIG. 5 is a process chart showing a first embodiment of the present invention.

【図6】本発明の第2の実施例を示す工程図FIG. 6 is a process chart showing a second embodiment of the present invention.

【図7】本発明の第3の実施例を示す工程図FIG. 7 is a process chart showing a third embodiment of the present invention.

【図8】本発明の第3の実施例を示す工程図FIG. 8 is a process chart showing a third embodiment of the present invention.

【図9】本発明の第3の実施例を示す工程図FIG. 9 is a process chart showing a third embodiment of the present invention.

【図10】本発明の第3の実施例を示す工程図FIG. 10 is a process chart showing a third embodiment of the present invention.

【図11】本発明の第3の実施例を示す工程図FIG. 11 is a process chart showing a third embodiment of the present invention.

【符号の説明】[Explanation of symbols]

11 電子部品 12 半田突起電極 13 酸化膜 14 金属薄膜 15 転写用基板 16 金属間化合物 17 半田真性面 21 加熱ヘッド 22 接続電極 23 回路基板 25 吸着ヘッド 31 樹脂シート DESCRIPTION OF SYMBOLS 11 Electronic component 12 Solder projection electrode 13 Oxide film 14 Metal thin film 15 Transfer substrate 16 Intermetallic compound 17 Solder intrinsic surface 21 Heating head 22 Connection electrode 23 Circuit board 25 Suction head 31 Resin sheet

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】表面が酸化膜で覆われた複数の半田突起電
極を有する電子部品と、表面が金属面である転写用基板
とを対向させ、前記電子部品と前記転写用基板とを加
圧、加熱することにより、前記半田突起電極と前記金属
面との接合部分に金属間化合物を形成する工程と、 前記電子部品を前記転写用基板から剥離除去して前記金
属間化合物を前記金属面上に転写することにより、前記
半田突起電極表面の酸化膜を少なくとも一部除去して半
田真性面を露出させる工程と、 前記半田突起電極に対応した接続電極を有する回路基板
と前記電子部品上の半田突起電極とを位置合わせを行な
い、前記電子部品を前記回路基板上に搭載する工程と、 前記電子部品と前記回路基板を加熱して前記半田突起電
極を溶融させることにより、前記半田突起電極と前記接
続電極とを接合する工程とを具備することを特徴とする
電子部品の製造方法。
An electronic component having a plurality of solder bump electrodes, the surface of which is covered with an oxide film, and a transfer substrate having a metal surface are opposed to each other, and the electronic component and the transfer substrate are pressed. Forming an intermetallic compound at the joint between the solder bump electrode and the metal surface by heating; and removing the electronic component from the transfer substrate to remove the intermetallic compound on the metal surface. Transferring at least a portion of the oxide film on the surface of the solder bump electrode to expose the intrinsic surface of the solder, and a circuit board having connection electrodes corresponding to the solder bump electrode and solder on the electronic component. Positioning the protruding electrode and mounting the electronic component on the circuit board; heating the electronic component and the circuit board to melt the solder protruding electrode; Electronic component manufacturing method characterized by comprising the step of bonding the connection electrodes.
【請求項2】前記金属面はAu、Ni、Cu、In、Snの少なく
ともひとつからなることを特徴とする請求項1記載の電
子部品の製造方法。
2. The method according to claim 1, wherein the metal surface is made of at least one of Au, Ni, Cu, In, and Sn.
【請求項3】前記半田突起電極はPb、Sn、Ag、Bi、Cu、
Inの少なくともひとつからなる合金であることを特徴と
する請求項1記載の電子部品の製造方法。
3. The solder bump electrode includes Pb, Sn, Ag, Bi, Cu,
2. The method for manufacturing an electronic component according to claim 1, wherein the alloy is an alloy comprising at least one of In.
【請求項4】前記金属間化合物を形成する工程の加熱温
度は前記半田突起電極の溶融温度以下であることを特徴
とする請求項1記載の電子部品の製造方法。
4. The method according to claim 1, wherein a heating temperature in the step of forming the intermetallic compound is lower than a melting temperature of the solder bump electrode.
【請求項5】表面が酸化膜で覆われた複数の半田突起電
極を有する電子部品と、樹脂シートとを対向させ、前記
電子部品と前記樹脂シートとを加圧、加熱することによ
り、前記半田突起電極を前記樹脂シート中に埋め込む工
程と、 非酸化性雰囲気中で、前記電子部品を加熱して前記半田
突起電極を溶融させる工程と、 非酸化性雰囲気中で、前記半田突起電極が溶融した状態
を保ちながら前記電子部品を前記樹脂シートから除去す
ることにより、前記半田突起電極表面の酸化膜を前記樹
脂シートに転写することにより除去して、半田真性面を
露出させる工程と、 前記半田突起電極に対応した接続電極を有する回路基板
と前記電子部品上の前記半田突起電極の位置合わせを行
ない、前記電子部品を前記回路基板上に搭載する工程
と、 前記電子部品と前記回路基板とを加熱して前記半田突起
電極を溶融させることにより、前記半田突起電極と前記
接続電極とを接合する工程とを具備することを特徴とす
る電子部品の製造方法。
5. An electronic component having a plurality of solder projecting electrodes, the surface of which is covered with an oxide film, and a resin sheet are opposed to each other, and the electronic component and the resin sheet are pressurized and heated. A step of embedding the projecting electrode in the resin sheet; a step of heating the electronic component in a non-oxidizing atmosphere to melt the solder projecting electrode; and a step of melting the solder projecting electrode in a non-oxidizing atmosphere. Removing the electronic component from the resin sheet while maintaining the state, thereby removing an oxide film on the surface of the solder bump electrode by transferring it to the resin sheet to expose a solder intrinsic surface; Positioning a circuit board having connection electrodes corresponding to the electrodes and the solder bump electrodes on the electronic component, and mounting the electronic component on the circuit board; Bonding the solder protrusion electrode and the connection electrode by heating the product and the circuit board to melt the solder protrusion electrode.
【請求項6】前記樹脂シートが熱可塑性樹脂からなるこ
とを特徴とする請求項5記載の電子部品の製造方法。
6. The method according to claim 5, wherein the resin sheet is made of a thermoplastic resin.
【請求項7】前記半導体突起電極を前記樹脂シート中に
埋め込む工程の加熱温度は樹脂シートの軟化温度より高
く、半田突起電極の溶融温度より低いことを特徴とする
請求項5記載の電子部品の製造方法。
7. The electronic component according to claim 5, wherein the heating temperature in the step of embedding the semiconductor projecting electrode in the resin sheet is higher than the softening temperature of the resin sheet and lower than the melting temperature of the solder projecting electrode. Production method.
JP7893098A 1998-03-26 1998-03-26 Producing method for electronic component Pending JPH11274239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7893098A JPH11274239A (en) 1998-03-26 1998-03-26 Producing method for electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7893098A JPH11274239A (en) 1998-03-26 1998-03-26 Producing method for electronic component

Publications (1)

Publication Number Publication Date
JPH11274239A true JPH11274239A (en) 1999-10-08

Family

ID=13675600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7893098A Pending JPH11274239A (en) 1998-03-26 1998-03-26 Producing method for electronic component

Country Status (1)

Country Link
JP (1) JPH11274239A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6872635B2 (en) 2001-04-11 2005-03-29 Sony Corporation Device transferring method, and device arraying method and image display unit fabricating method using the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6872635B2 (en) 2001-04-11 2005-03-29 Sony Corporation Device transferring method, and device arraying method and image display unit fabricating method using the same
US7195687B2 (en) 2001-04-11 2007-03-27 Sony Corporation Device transferring method, and device arraying method and image display unit fabricating method using the same

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