JPH1127124A - Semiconductor circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the number of parts without deteriorating largely inter- input-output cutoff characteristic at the time of off in a circuit that turns on and off a high frequency signal. SOLUTION: Source terminals of NMOSFETs 1 and 2 are connected to each other, gate terminals of the NMOSFETs 1 and 2 are connected to each other, and a solar battery 3 is provided so that a negative polarity may be connected to the source terminals and that a positive polarity may be connected to the gate terminals. Source terminals and gate terminals of PMOSFETS 5 and 6 are connected to each other and a solar battery 7 is provided so that a negative polarity may be connected to the source terminals and that a positive polarity may be connected to the gate terminals. A light emitting diode 4 is provided to be optically connected to the battery 7, an anode terminal and a cathode terminal become primary side input terminals I1a and I1b respectively, and the NMOSFETs 1 and 2 and the PMOSFETS 5 and 6 are complementarily turned on and off by a signal input to the light emitting diode.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor circuit used for a circuit for turning on / off a high-frequency signal.

[0002]

2. Description of the Related Art Generally, a metal contact relay having a small capacitance between output terminals is used as a switch for turning on and off a high-frequency signal. For prevention and the like, a semiconductor circuit as shown in FIG. 3 is known.

This semiconductor circuit is composed of three semiconductor systems A to C. Note that the semiconductor systems A to C
Are the same, only the semiconductor system A will be described with the suffixes a, b, and c.

The semiconductor system A has a source terminal and a gate terminal.
Two NMOSFETs 8a whose terminals are connected to each other,
9a, a solar cell 10a having an anode and a cathode connected to the source and gate terminals of the NMOSFETs 8a and 9a, respectively, and a light emitting diode 11a optically coupled to the solar cell 10a. The anode terminal and the cathode terminal of the light emitting diode 11a are connected to primary side input terminals 12a and 13a, respectively. At this time, the drain terminals of the NMOSFETs 8a and 9a become secondary terminals.

[0005] One secondary terminal of the three semiconductor systems A to C is connected, and the other secondary terminals are respectively connected to a secondary input terminal I2, a secondary output terminal O2 and a secondary common terminal. IO.

In such a semiconductor circuit, the semiconductor systems A and B are simultaneously turned on and off, and the semiconductor system C is turned on and off complementarily with the semiconductor systems A and B, thereby effectively increasing the cutoff gain of a high-frequency signal. ing.

The operation of the conventional semiconductor circuit will be described below with reference to the drawings. 4A and 4B are current path diagrams of the semiconductor circuit according to the above figure, wherein FIG. 4A is a current path diagram at the time of signal transmission, and FIG. 4B is a current path diagram at the time of signal interruption.
At the time of signal transmission, between the primary-side input terminals 12a and 13a and between the primary-side input terminals 12b and 13a to turn on the semiconductor systems A and B.
No current flows between the primary-side input terminals 12c and 13c in order to cause a current to flow between b and the semiconductor system C to be turned off. In this state, the high-frequency input signal S1 passes through the semiconductor systems A and B in the ON state and passes through the secondary output terminal O2.
(The output signal S2a), and a small signal component flows to the secondary common terminal IO through the output capacitance of the semiconductor system C in the off state.

When the signal is cut off, no current flows between the primary input terminals 12a and 13a and between the primary input terminals 12b and 13b in order to turn off the semiconductor systems A and B.
A current flows between the primary-side input terminals 12c and 13c to turn on. In this state, the high-frequency input signal S1 (the frequency is f) passes through the output capacitors 8a 'and 9a' (the combined capacitance is C) of the semiconductor system A in the off state, and most of them are in the on state. The signal component that flows to the semiconductor system C (the on-resistance is R), flows through the output capacitors 8b 'and 9b' (the combined capacitance is C) of the semiconductor system B, and reaches the secondary output terminal O2 is very small. (Output signal S
2b). In this case, the cutoff characteristics between the input and output when the load resistance RL is

[0009]

(Equation 1)

## EQU1 ## Here, FIG. 3 shows an improvement of the characteristics of the simple semiconductor circuit shown in FIG. Although the operation is omitted here, in the case of the semiconductor circuit having the configuration shown in FIG.

[0011]

(Equation 2)

For example, C = 2.5 pF (5 pF for one), R = 20 Ω (10 Ω for one), RL = 50
When Ω, f = 1 MHz, the absolute value of the cutoff characteristic of the semiconductor circuit of FIG.

[0013]

(Equation 3)

The absolute value of the cutoff characteristic of the semiconductor circuit of FIG.

[0015]

(Equation 4)

In the semiconductor circuit shown in FIG. 3, the cutoff characteristic is improved by four digits. Therefore, by adopting the configuration of FIG. 3, it is possible to efficiently prevent the signal from being transmitted to the output side at the time of interruption.

[0017]

However, in the semiconductor circuit as shown in FIG. 3, it is possible to efficiently prevent a signal from being transmitted to the output side when the semiconductor device is cut off. Are required, it is difficult to seal them in one semiconductor package.

Further, it is necessary to drive the light emitting diodes on and off in opposite phases. At least the solar cells 10a, 10a of the semiconductor systems A, B and the semiconductor system C must be driven.
It was necessary to provide a light blocking means so that light interference did not occur between Ob and the solar cell 10c.

Even if all the packages of the semiconductor systems A to C are separated, the same operation as described above is performed, but there are problems such as an increase in the number of parts and an increase in cost.

The present invention has been made in view of the above points, and an object of the present invention is to reduce the number of parts without greatly deteriorating the input / output cutoff characteristics at the time of off. It is to provide a semiconductor circuit.

[0021]

According to the first aspect of the present invention,
A light-emitting diode that emits light in response to a signal on the input side, first and second photoelectric conversion elements that receive a light signal from the light-emitting diode and generate photovoltaic power, and the first photoelectric conversion element First and second NMOS transistors for applying photovoltaic power of the conversion element between the gate and source to turn on the drain and source.
ET and the photovoltaic power of the second photoelectric conversion element are gated.
A first and a second PMOSFET applied between the sources to turn off the drain and the source, the source terminals of the NMOSFET and the PMOSFET being connected to each other, Are connected to a secondary side input terminal and a secondary side output terminal, respectively, and the drain terminal of the PMOSFET is connected to the NMO.
The NMOSFET and the PMOSFET are connected to a source terminal and a secondary input / output terminal of an SFET, respectively, and the NMOSFET and the PMOSFET are turned on / off complementarily by a signal input to the light emitting diode. Things.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a semiconductor circuit diagram according to an embodiment of the present invention, FIG. 2 is a current path diagram of the semiconductor circuit according to the above diagram, (a) is a current path diagram during signal transmission, (b) is a current path diagram at the time of signal interruption.
The semiconductor circuit according to the present embodiment includes source terminals of two enhancement-type NMOSFETs 1 and 2 and a gate terminal.
A solar cell 3 as a photoelectric conversion element is provided such that the gate terminals are connected to each other, the anodes are connected to the source terminals of the NMOSFETs 1 and 2, and the cathode is connected to the gate terminals. .

Also, two depletion-type PMOSs
The FETs 5 and 6 have their source terminals connected to each other and their gate terminals connected to each other, the anodes are connected to the source terminals of the PMOSFETs 5 and 6, and the cathodes are connected to the gate terminals. A solar cell 7 as a conversion element is provided, and a light emitting diode 4 is provided so as to be optically coupled to the solar cells 3 and 7.
Is provided.

Here, the anode terminal and the cathode terminal of the light emitting diode 4 are primary input terminals I1a and I1a, respectively.
1b, the drain terminal of the NMOSFET 1 is a secondary input terminal I2, the drain terminal of the NMOSFET 2 is a secondary output terminal O2, the drain terminal of the PMOSFET 6 is a secondary common terminal IO, and the PMOSFET
The drain terminal 5 is connected to the connection point of the source terminals of the NMOSFETs 1 and 2. In the present embodiment, the NMOSFETs 1 and 2 and the PMOSFETs 5 and 6 are turned on / off complementarily by a signal input to the light emitting diode 4.

The operation of the semiconductor circuit according to this embodiment will be described below with reference to the drawings. First, at the time of signal transmission (ON), a current is input to the primary-side input terminals I1a and I1b to turn on the NMOSFETs 1 and 2, and the light-emitting diode 4 emits light. At this time, NMOSFETs 1 and 2 and PMOSFETs 5 and 6
Drive voltage is applied to the gate terminal of
Both 1 and 2 are on, and both PMOSFETs 5 and 6 are off. In this state, the high-frequency input signal S1 passes through the on-state NMOSFETs 1 and 2 and is output to the secondary output terminal O2 (output signal S2a), and the output capacitances 5a and 6a (here The output capacitance is the parasitic capacitance between the drain and source and the gate capacitance.
(The sum of the parasitic capacitance between the gate and the drain) through the secondary common terminal IO is very small.

Next, when the signal is cut off (off), the NMOS
In order to turn off the FETs 1 and 2 and turn on the PMOSFETs 5 and 6, no current flows through the primary input terminals I1a and I1b, and the light emitting diode 4 does not emit light. At this time, the outputs of the solar cells 3 and 7 are both 0, and the NMOSFET
Both 1 and 2 are off, and both PMOSFETs 5 and 6 are on. In this state, the high-frequency input signal S1
(Frequency is f) NMOSFET in OFF state
1, the output capacitance 1a (the output capacitance is 2C),
Most of the signal components flow into the PMOSFETs 5 and 6 in the ON state (the on-resistance is R), and the signal component that flows through the output capacitance 2a of the NMOSFET 2 and reaches the secondary output terminal O2 is very small (output signal S2b). . In this case, the load resistance
The cutoff characteristics between input and output when RL is

[0027]

(Equation 5)

## EQU1 ## The absolute value of the cutoff characteristic is

[0029]

(Equation 6)

As a conventional example, the cutoff gain is about four times that of the semiconductor circuit shown in FIG. 3 and the cutoff characteristics are slightly deteriorated, but there is no change to the extent that the digit changes.

Therefore, according to the configuration of this embodiment, four switching elements (NMOs) are used without greatly deteriorating the input / output cutoff characteristics at the time of off.
SFETs 1 and 2 and PMOSFETs 5 and 6) and two solar cells (solar cells 3 and 7) are required, and the switching element performs complementary switching operation with the same signal from the light emitting diode 4, so that there is also one signal source. Thus, the number of parts can be reduced, and packaging can be performed with a simple configuration.

In the present embodiment, the solar cells 3 and 7 are used to generate photovoltaic power upon receiving an optical signal from the light emitting diode. However, the present invention is not limited to this. A photoelectric conversion element such as a diode or a phototransistor may be used.

In this embodiment, the NMOSF
ET1, ET2, enhancement type, PMOSFE
Depletion type was used for T5 and T6.
The depletion type is used as FET 1 and 2 and PMOSFE
An enhancement type may be used as T5, 6, and in this case, the polarities of the solar cells 3, 7 are reversed.

[0034]

According to the first aspect of the present invention, there is provided a light emitting diode which emits light in response to a signal on the input side, and first and second light emitting diodes which generate a photoelectromotive force by receiving an optical signal from the light emitting diode. The photovoltaic powers of the second photoelectric conversion element and the first photoelectric conversion element are gated.
The first and second NMOSFETs applied between the gate and the source to turn on the drain and the source, and the photovoltaic power of the second photoelectric conversion element is applied between the gate and the source. First and second PMs applied to turn off drain-source
An NMOSFET and a PMO
The source terminals of the SFET are connected to each other, and the NMO
The drain terminal of the SFET is connected to the secondary input terminal and the secondary output terminal, respectively, the drain terminal of the PMOSFET is connected to the source terminal and the secondary input / output terminal of the NMOSFET, respectively, and the NMOSFET and the PMOSFE are connected.
Since T is turned on / off complementarily by a signal input to the light emitting diode, a semiconductor circuit capable of reducing the number of parts without greatly deteriorating the cutoff characteristics between the input and output when off is provided. Could be provided.

[Brief description of the drawings]

FIG. 1 is a semiconductor circuit diagram according to an embodiment of the present invention.

FIG. 2 is a current path diagram of the semiconductor circuit according to the above diagram;
(A) is a current path diagram at the time of signal transmission, and (b) is a current path diagram at the time of signal interruption.

FIG. 3 is a semiconductor circuit diagram according to a conventional example.

FIG. 4 is a current path diagram of the semiconductor circuit according to the above figure;
(A) is a current path diagram at the time of signal transmission, and (b) is a current path diagram at the time of signal interruption.

FIG. 5 is a semiconductor circuit diagram according to a conventional example.

[Explanation of symbols]

 AC semiconductor system I1a, I1b Primary input terminal I2 Secondary input terminal O2 Secondary output terminal IO Secondary common terminal S1 High frequency input signal S2a, S2b Output signal 1 NMOSFET 1a Output capacitance 2 NMOSFET 2a Output capacitance Reference Signs List 3 solar cell 4 light emitting diode 5 PMOSFET 5a output capacity 6 PMOSFET 6a output capacity 7 solar cell 8a-8c NMOSFET 8a'-8c 'output capacity 9a-9c NMOSFET 9a'-9c' output capacity 10a-10c solar cell 11a- 11c Light-emitting diodes 12a to 12c, 13a to 13c Primary input terminals

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Yoshifumi Shirai 1048 Kazumasa Kadoma, Osaka Prefecture Matsushita Electric Works Co., Ltd. 72) Inventor Hitoshi Takano 1048 Kazuma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works, Ltd. (72) Inventor Takeshi Yoshida 1048 Kadoma Kadoma, Kadoma City, Osaka Prefecture Inside Matsushita Electric Works Co., Ltd.

Claims (1)

[Claims] 1. A light emitting diode that emits light in response to a signal on an input side, first and second photoelectric conversion elements that generate a photoelectromotive force by receiving an optical signal from the light emitting diode, First and second NMOSFETs for applying a photoelectromotive force of the first photoelectric conversion element between a gate and a source to turn on a drain and a source, and the second photoelectric conversion; A first and a second PMOSFET for applying a photovoltaic force of the element between the gate and the source to turn off the drain and the source, and the source of the NMOSFET and the PMOSFET. Are connected to each other, and the NMOSFE
A drain terminal of T is connected to a secondary input terminal and a secondary output terminal, respectively, and a drain terminal of the PMOSFET is connected to a source terminal and a secondary input / output terminal of the NMOSFET, respectively. P
A semiconductor circuit wherein a MOSFET is turned on / off complementarily by a signal input to the light emitting diode.