JPH11264741A - Encoder device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an encoder device capable of enhancing reliability, by increasing frequency of checkup on counted values. SOLUTION: A C-phase signal of an encoder is outputted a plurality of times during one rotation cycle of a servomotor, an output period of one specific C-phase signal among them is set up to differ from output periods of the other C-phase signals, and a CPU can determine, with high frequency, whether a counter performs normal counting action based on proper output timing of an A-phase signal and a B-phase signal, by detecting the shift amount of rotational position data counted by the counter every time the C-phase signal is detected. By discriminating the output period of the C-phase signals, an origin/C- phase detecting circuit detects the specific C-phase signal, as reference point, and can easily determine a origin of the servomotor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a method of outputting pulse signals having phases different from each other by 90 degrees as an A-phase signal and a B-phase signal in accordance with a linear displacement or a rotational displacement of a displacement body. The present invention relates to an encoder device that outputs a C-phase signal when a reference point is reached.

[0002]

2. Description of the Related Art For example, an optical rotary encoder (hereinafter, referred to as an encoder) is provided with a disk-shaped scale having a plurality of slits on an outer peripheral portion thereof, for example, on a rotating shaft of a motor as a displacement body, and sandwiching the scale. The light emitting device and the light receiving device corresponding to the A, B, and C phases are arranged.

When the scale rotates with the rotation of the motor, the light-receiving element receives the light emitted from the light-emitting element through the slit, so that the A-phase and B-phase signals having phases different from each other by 90 degrees, and A C-phase signal that is output only once for each rotation is output.

When the control device for controlling the driving of the electric motor obtains these A, B and C phase signals from the encoder, it counts, for example, the edge output of the A and B phase signals with the origin at the time of outputting the C phase signal. By doing so, the rotational position of the rotor is detected, and the rotational direction of the rotor is detected from the phase relationship between the A-phase and B-phase signals, thereby performing various controls related to the electric motor.

For such an encoder, every time a C-phase signal is output, a difference between the count values obtained by the counting operation is obtained, and the difference value is compared with a normal value determined from the resolution of the encoder. In this case, the count value is checked.

In general, the encoder is generally used in an environment where noise is likely to occur. In many cases, extraneous noise is applied to the A, B, and C phase signals, or a pulse is missing due to dust adhering to the slit. Erroneous detection (erroneous count) occurs at a relatively high frequency.

Accordingly, a detection error that does not cause a problem in practical use is allowed, and in the above-described abnormality detection process, an abnormality is determined when the difference between the count value and the normal value exceeds an allowable range. .

[0008]

However, conventionally, no matter what environment the motor is operating in, the abnormality determination is performed only once each time the motor rotates once. Therefore, the check frequency is low and there is a problem in reliability.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an encoder device capable of improving the reliability by increasing the frequency of checking a count value based on an output signal of an encoder. It is in.

[0010]

According to a first aspect of the present invention, there is provided an encoder device comprising: an A-phase signal and a pulse signal having a phase difference of 90 degrees from each other in accordance with a linear displacement or a rotational displacement of a displacement body; Outputting the C-phase signal when the displacement position of the displacement body reaches a reference point, and outputting the C-phase signal a plurality of times during one displacement cycle of the displacement body. Features. With such a configuration, based on the output timings of the plurality of C-phase signals, for example, whether the output timings of the A-phase signal and the B-phase signal are normal is determined in a period shorter than one displacement cycle of the displacement body. That is, the determination can be performed with higher frequency than in the related art.

In this case, as described in claim 2, position data output means for outputting displacement position data of the displacement body by counting the A-phase and B-phase signals,
C-phase signal detection means for detecting the output timing of the C-phase signal and outputting a C-phase detection signal; and outputting the C-phase signal at a timing at which the C-phase detection signal is output by the C-phase signal detection means. The displacement position data output means may include a displacement amount detecting means for detecting a displacement amount of the displacement position data counted by the displacement position data output means based on the amount of change in the displacement position data.

[0012] According to this structure, the displacement detection means detects the displacement position data counted by the displacement position data output means at the timing when the C-phase signal is detected a plurality of times during one displacement cycle of the displacement body. Since the shift amount is detected, it is frequently checked whether or not the counting operation of the displacement position data output means based on the output timing of the A-phase signal and the B-phase signal is normally performed by detecting the shift amount. be able to.

Further, the output period of the specific C-phase signal, which is one of the C-phase signals output a plurality of times, is different from the output periods of the other C-phase signals. It is preferred that With this configuration, by determining the output period of the C-phase signal, the specific C-phase signal can be detected as, for example, a reference point of the displacement cycle.

In this case, as described in claim 4, the C-phase signal detecting means may include an origin detecting means for detecting an origin of the displacement body based on an output timing of the specific C-phase signal. With such a configuration, the origin of the displacement body can be easily and reliably determined by the origin detecting means.

According to a fifth aspect of the present invention, the displacement detecting means detects the displacement based on all output timings of the C-phase detection signal output by the C-phase signal detecting means. A configuration may be used. With this configuration, the frequency of detecting the amount of displacement of the displacement position data can be maximized.

Further, as set forth in claim 6, the position shift amount detection means detects a C-phase detection signal corresponding to a C-phase signal other than the specific C-phase signal detected by the C-phase signal detection means. The shift amount may be detected based only on the output timing of the above. Even with such a configuration, substantially the same effects as those of the fifth aspect can be obtained.

Preferably, at least one edge output interval of at least one side of the C-phase signal output a plurality of times is set to be equal. With such a configuration, for example, the C-phase signal detection means detects the C-phase signal based on the edge on the side having the same output interval, so that the A-phase signal and the B-phase within the interval in which the C-phase signal is detected. The output numbers of the phase signals are all equal. Therefore, the shift amount detecting means can easily detect the shift amount of the displacement position data based on the equal output number at any detection timing of the C-phase signal.

The encoder device according to the present invention is characterized in that the encoder device further comprises a displacement amount accumulating means for accumulating the displacement amount detected by the displacement amount detecting means. According to this structure, even if dust or the like adheres to the slit of the encoder and one pulse of the A-phase signal or the B-phase signal is lost every time the origin position is detected, for example, the position shift due to the one pulse is lost. The amount is reliably detected by being accumulated by the displacement amount accumulating means.

In this case, as described in claim 9, the displacement amount accumulated by the displacement amount accumulating means is:
It is preferable to include an abnormality determination unit that determines that an abnormality has occurred when the accumulated deviation amount exceeds a preset allowable value of the accumulated deviation amount. The means can reliably determine the abnormality.

[0020] Further, as set forth in claim 10, a display means for displaying the displacement amount accumulated by the displacement amount accumulating means may be provided. With such a configuration, the accumulated displacement amount may be provided. By referring to the display of the amount, it is possible to visually grasp the frequency of noise generation in the environment in which the displacement body is operating.

According to another aspect of the present invention, when the displacement of the encoder detected by the displacement detecting means is equal to or less than a preset allowable correction value, a predetermined value is determined based on the displacement. It is preferable to provide a position correcting means for performing the correcting operation of (1). With such a configuration, for example, by correcting the position data of the displacement body based on the displacement amount equal to or less than the correction allowable value, an accurate displacement position of the displacement body can be obtained.

In this case, as described in claim 12,
Count the number of times that the displacement amount of the encoder detected by the displacement amount detecting means continuously becomes equal to or less than the correction allowable value, and determine that the abnormality is abnormal when the count value exceeds a predetermined value. A continuous correction abnormality determination unit may be provided. With such a configuration, when the displacement amount equal to or less than the correction allowable value continuously occurs, the probability of occurrence of the abnormality is high, and such a case can be determined as abnormal.

In this case, as described in claim 13,
It is also possible to provide a correction number display means for displaying the number of corrections performed by the position correction means. With such a configuration, similar to the ninth or tenth aspect, a comparison of the environment in which the displacement body is operating is provided. It is possible to visually grasp the extremely low level noise occurrence frequency.

In the above case, as described in claim 14, the C-phase signal detecting means determines whether the signal level of one of the A-phase or the B-phase during the period in which the C-phase signal is output and the other signal level. It is preferable to output the C-phase detection signal based on the output timing of the signal edge. With such a configuration, the C-phase signal is output at the displacement position of the displacement body to be the origin. It is only necessary to be significant when the A-phase or B-phase signal edge corresponding to the output is output, and the output condition of the C-phase signal in the encoder can be further relaxed, and the production can be facilitated. And changes in output characteristics of the A, B, and C phase signals due to aging,
It is possible to provide a larger allowable range for signal output fluctuation due to mechanical vibration due to displacement of the displacement body.

Further, as set forth in claim 15, the C-phase signal detection means is provided with one edge of the C-phase signal and the position data output means during a period when the position data output means is counting up. May be configured to output the C-phase detection signal based on the other edge of the C-phase signal during a period in which the counter is counting down. With such a configuration, the output timing of the C-phase detection signal is always determined based on the output timing of the same edge of the C-phase signal regardless of the displacement direction of the displacement body.

Further, as set forth in claim 16, the output period of the C-phase signal is set shorter than the shortest edge output interval between the A-phase signal and the B-phase signal, and the shortest edge output interval is set shorter. And the C-phase signal detection means may output the C-phase detection signal based only on the C-phase signal. According to this configuration, the C-phase detection signal can be output based on only the C-phase signal without reference to a signal indicating the displacement direction of the displacement body, so that the configuration can be extremely simplified. .

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. FIG. 4 is a functional block diagram showing the overall configuration. The CPU (position shift amount detection means, position shift amount accumulation means, abnormality determination means, position correction means, continuous correction abnormality determination means) includes a ROM 2, a RAM,
3, communication port 4, I / O port 5, display device (display means, correction count display means) 6, operating device 7, and counter circuit 8 are each composed of address bus 9 and data bus 1.
0 and so on.

When the CPU 1 reads out the control program stored in the ROM 2, the CPU 1 performs processing according to the control program. RAM3 is
It is used as a download of a control program, a work area of the CPU 1, and the like.

An encoder signal (A, B, and C phase signals) is given to the counter circuit 8 from an encoder 12 (see FIG. 5) attached to a servomotor 11 which is a displacement body. The counting operation based on the encoder signal is performed.

When the CPU 1 obtains the rotational position information of the servo motor 11 from the counter circuit 8, the CPU 1 gives a command to a servo driver (not shown) for driving the servo motor 11 via the communication port 4 based on the control program. It has become. Further, the CPU 1 and the counter circuit 8
Various control signals, which will be described later, are transmitted via the / O port 5.

The user can set various allowable values, which will be described later, by operating the operation device 7 including, for example, a keyboard. Further, for example, the display device 6 including a CRT display or the like includes a CP.
Various information, which will be described later, is displayed based on a command given from U1.

FIG. 5 is a functional block diagram showing a detailed configuration of the counter circuit 8. As shown in FIG. An optical encoder 12 is attached to a rotor of the servo motor 11. Although not specifically shown, the rotation axis of the servomotor 11 includes:
A disk-shaped scale having concentrically arranged slits corresponding to the A-phase, B-phase and C-phase signals of the encoder 12 is mounted and fixed.

A light emitting element (not shown), such as an LED, corresponding to each phase signal, and light receiving elements 12A, 12B, and 12C (A-phase, B-phase, and C-phase signal output means) including, for example, a photodiode are provided as described above. They are arranged to face each other across the slit of the scale. As in a general encoder, the A-phase and B-phase signals have a duty ratio of 5
At 0%, the pulse signals are output with a phase difference of 90 degrees from each other. The C-phase signal is a pulse signal output a plurality of times during one rotation of the rotation axis of the servo motor 11 (FIG. 9).
reference).

As shown in FIG. 9, the pulse width of the plurality of pulse signals output as the C-phase signal is substantially equal to the period T of the A-phase and B-phase signals except for one specific C-phase signal. Thus, the shape and arrangement of the slits provided on the scale are adjusted. Further, the pulse width of the specific C-phase signal is set to twice the pulse width of the other C-phase signals. In addition, the rising edge of the C-phase signal pulse is A
It is adjusted so as to be located between the rising edges of the phase signal and the B-phase signal.

The output terminals of the light receiving elements 12A and 12B are:
It is connected to the input terminal of the quadruple circuit 13. The quadruple circuit 13 outputs an UP / DOWN pulse every time a rising edge or a falling edge of the A-phase signal and the B-phase signal is inputted. , Hereinafter referred to as a counter). That is, UP / D
The OWN pulse is a signal obtained by multiplying the frequency of the A-phase signal and the B-phase signal by four.

The quadruple frequency multiplier 13 is provided with an UP / DOWN
A signal is also output to the counter 14, and A
The input order of the rising edge (）) and falling edge (↓) of the phase and B phase signals is A (↑), B (↓), A (↓), B
(↑),... (Ie, in the case of B-phase advance), it is determined that the rotation of the servomotor 11 is forward rotation, and the UP / D
The OWN signal is set to high level, and the input order is A
(↑), B (↑), A (↓), B (↓),... (That is, in the case of A-phase advance), it is determined that the rotation of the servomotor 11 is in the reverse direction, and UP / DOWN is performed. The signal is set to low level.

Then, the counter 14 sets the UP / DOWN
According to the input of the pulse, the up-count operation is performed while the UP / DOWN signal is at the high level, and the down-count operation is performed while the UP / DOWN signal is at the low level.
The data bus 15 from which the count value of the counter 14 is output is connected to two counter data latch circuits (hereinafter, referred to as two counter data latch circuits).
(Referred to as a latch circuit) 16 and 17.

The output timing of the rising edge of the C-phase signal pulse at the time of the leading phase (forward rotation) of the A-phase signal is set so that the counter values of the counter 14 are all equal to "16". ing.

The CPU 1 outputs the latch signal (1) to the latch circuit 16 periodically to latch the count data. And CPU1
When an address assigned to the latch circuit 16 is output to the address bus 9, the address is decoded by the address decoder 18 and a chip select signal is output to the latch circuit 16. Then, the latch circuit 16
Is enabled, and the latched data is output onto the data bus 10.

Origin / C phase detection circuit (C phase signal detection means,
The origin detection means) 19 has a C
UP / DOWN output from phase signal and quadruple circuit 13
A pulse and an UP / DOWN signal are provided, and a latch 2 clear signal and an origin latch clear signal output by the CPU 1 are provided. Then, the origin / C phase detection circuit 19 determines the encoder 1 based on these signals.
2 and the origin of the servo motor 11 are detected.
The phase detection signal and the origin detection signal are output to the latch circuit (position detection means) 17 and the CPU 1.

The latch circuit 17 latches the count data of the counter 14 using the origin detection signal as a latch signal. And, like the latch circuit 16,
When the address assigned to the latch circuit 17 by the CPU 1 is output to the address bus 9 and the chip select signal is output by the address decoder 18, the address is enabled and the latched data is transferred to the data bus 10.
Output to the top.

FIG. 6 shows a detailed electrical configuration of the origin / C phase detection circuit 19, and FIG. 7 shows signal waveforms at various parts of the origin / C phase detection circuit 19. UP
The / DOWN signal is supplied to the D input terminals of D flip-flops 20 and 21 (the negative logic is on the 21 side), and one input terminal (23) of AND gates 22 and 23.
Side is given to negative logic). The C-phase signal is supplied to clock input terminals of D flip-flops 20 and 21 (21 side has negative logic).

The UP / DOWN pulse is supplied to the other input terminals of the AND gates 22 and 23.
Output terminals of the D gates 22 and 23 are connected to clock input terminals of D flip-flops 24 and 25 and one input terminal of NOR gates 26 and 27, respectively.

The latch 2 clear signal is output from the NOR gate 26
27 and the input terminal of a NOT gate 28, and the output terminals of the NOR gates 26 and 27 are connected to the negative logic CLR input terminals of the D flip-flops 21 and 20, respectively. The output terminal of the NOT gate 28 is connected to the D flip-flops 24 and 2
5 is connected to the negative logic CLR input terminal.

The Q output terminals of the D flip-flops 20 and 21 are connected to the D input terminals of the D flip-flops 24 and 25, respectively.
5 Q output terminals are connected to the input terminals of the OR gate 29, respectively. The output terminal of the OR gate 29 outputs a C-phase detection signal.

The UP / DOWN pulse is connected to the clock input terminals of the 4-bit counter 30 and the D flip-flop 32, and the C-phase signal is input to the negative logic CLR input terminal of the 4-bit counter 30 and the D flip-flop. 31 clock input terminals of negative logic.
Then, the origin latch clear signal is sent to the negative logic CL of the D flip-flops 31 and 32 via the NOT gate 33.
Connected to R input terminal.

The Q3 output terminal of the 4-bit counter 30
The D input terminal of the D flip-flop 31 is connected to the D input terminal, and the Q output terminal of the D flip-flop 31 is connected to the D input terminal of the D flip-flop 32. The Q output terminal of the D flip-flop 32 outputs an origin detection signal. In addition, origin / C
In the phase detection circuit 19, the 4-bit counter 30 and the D flip-flops 31 and 32 are provided with origin detection means 19a.
The other parts are C-phase signal detecting means 1
9b.

Next, the operation of this embodiment will be described with reference to FIGS. In the origin / C-phase detection circuit 19, the D flip-flop 20 detects the rising edge of the C-phase signal at the time of the up-counting operation of the counter 14, and the D flip-flop 21 at the time of the down-counting operation of the counter 14. It detects the falling edge of the C-phase signal.

That is, in FIG. 7, during the period when the servo motor 11 is rotating forward and the counter 14 is performing the up-counting operation with the leading phase of the B-phase signal, the UP / DOWN
The signal is at a high level, and when a rising edge of the C-phase signal is input in this state, the D flip-flop 20 is triggered and the signal goes to a high level (see FIG. 7 (g)).

Since the D flip-flop 24 is triggered by the up pulse output from the AND gate 22 during the up-count operation period, the signal becomes high level at the input timing of the next up pulse after the signal goes high level. (See FIG. 7 (j)), and the C-phase detection signal is output via the OR gate 29 (see FIG. 7 (o)).

Then, triggered by the C-phase detection signal, the latch circuit 17 latches the counter value of the counter 14 as reference position data. When recognizing that the C-phase detection signal has been output, the CPU 1 outputs a latch 2 clear signal (see FIG. 7F) to clear the D flip-flops 20 and 24.

On the other hand, the servo motor 11 is rotating in the reverse direction,
The UP / DOWN signal is at a low level during the period in which the counter 14 performs the down-counting operation with the leading phase of the A-phase signal, and when the falling edge of the C-phase signal is input in that state, the D of the negative edge trigger is changed. The signal becomes high level when the flip-flop 21 is triggered (see FIG. 7).
(K)).

Since the D flip-flop 25 is triggered by the down pulse output from the AND gate 23 during the down-count operation period, the signal becomes high level at the input timing of the next down pulse after the signal becomes high level. (See FIG. 7 (n)), and the C-phase detection signal is output via the OR gate 28 (see FIG. 7 (o)).

Then, the latch circuit 17 sets the counter 14
Latches the same counter value as in the normal rotation of
When recognizing that the phase detection signal has been output, a latch 2 clear signal is output (see FIG. 7 (f)) to clear the D flip-flops 21 and 25.

That is, the origin / C-phase detection circuit 19 outputs a C-phase detection signal based on the rising edge of the C-phase signal when the servo motor 11 is rotating forward and based on the falling edge when the servo motor 11 is rotating in the reverse direction. The detection signal is output at the timing of the same side edge of the C-phase signal regardless of whether the servo motor 11 is rotating forward or backward. Therefore, the counter value of the counter 14 latched by the latch circuit 17 at the time of forward rotation and the time of reverse rotation of the servo motor 11 becomes the same value.

Also, as shown in FIG. 8, for example, when the servo motor 11 is rotating in the reverse direction (A-phase advance), the signal is inverted immediately after the non-detection side (rising) C-phase signal edge is output, and It is assumed that the C-phase signal edge on the reverse rotation detection side (falling) is output before the level of the / DOWN signal switches from low to high.

As described above, the origin / C phase detection circuit 19 synchronizes with the up pulse after detecting the rising edge of the C phase signal during normal rotation, and detects the falling edge after detecting the falling edge during reverse rotation. In synchronization with the C phase detection signal.

Therefore, even in this case, the D flip-flop 21 detects the falling edge on the detection side at the time of the reverse rotation, and the signal goes high. Flip-flop 24 is not triggered. The up-pulse is NOR
Since the D flip-flop 21 is supplied to the D flip-flop 21 via the gate 27 as a CLR signal, the C-phase detection signal is not output at an incorrect timing based on the non-detection-side edge output.

The origin detecting means 19a counts the number of UP / DOWN pulses output by the 4-bit counter 30 only during the period when the C-phase signal is at the high level. Here, as shown in FIG. 9, the pulse width of the specific C-phase signal is equivalent to the number of outputs of the UP / DOWN pulse “8”, and the pulse width of the other C-phase signals is U
The setting is made so as to correspond to the output number “4” of the P / DOWN pulse.

Therefore, only when the specific C-phase signal is input, the Q3 output terminal of the 4-bit counter 30 becomes high level, and the D flip-flop 31 outputs the high level signal given to the D input terminal to the specific C-phase signal. Trigger on the falling edge of the phase signal. Then, D flip-flop 3
2 outputs an origin detection signal in synchronization with the rising edge of the next input UP / DOWN pulse.

FIGS. 1 to 3 are flowcharts showing the control contents of the CPU 1. In FIG. 1, the CPU 1
It waits until a system timer (not shown) incorporated therein reaches a predetermined value and outputs a timer interrupt signal (step A1). This timer interrupt signal is output to the latch circuit 16 as a latch signal (1).

When the CPU 1 receives the timer interrupt signal, the CPU 1 reads the counter value (a) of the counter 14 latched by the latch
3 is stored (step A2). Next, the difference between the current counter value read in step A2 and the previous counter value stored in the RAM 3 is obtained, and the difference value is added to the previously stored previous count value to obtain the current rotation value. The position is updated (step A3).

In order to determine the rotational position by accumulating the difference between the counter values as described above, the maximum count value of the counter 14 is as follows.
UP / DOW of encoder 12 output during full stroke (maximum displacement) of a displacement body such as servo motor 11
This is because the rotation position of the servomotor 11 cannot be determined even if the counter value is directly read because the number of pulses is smaller than the number of N pulses. The cycle of the system timer is determined by the counter 1 when the servo motor 11 rotates at the maximum speed.
4 is set to be sufficiently shorter than the overflow period.

Next, when the CPU 1 controls the servo motor 11 according to the rotational position and the speed of the servo motor 11 calculated based on the timer interrupt cycle updated in step A3 (step A4), the CPU 1 refers to the input port. It is determined whether a C-phase detection signal is output from the origin / C-phase detection circuit 19 (step A5). If the C-phase detection signal has not been output, the process proceeds to step A1 and waits for the next timer interrupt to occur.

When the C-phase detection signal is output in the judgment step A5, the CPU 1 reads the counter value (b) latched by the latch circuit 17. Then,
By outputting the latch 2 clear signal, the D flip-flop 30 is cleared and the C phase detection signal is made inactive (step A6, see FIG. 7 (f)). In addition, CPU
1 recognizes the C-phase detection signal, reads the latch data of the latch circuit 17, and outputs the latch 2 clear signal. The time between the generation of the C-phase signal pulse is sufficiently shorter than that of the C-phase signal pulse. Is set to not occur.

Next, when the CPU 1 obtains the difference between the counter values (b) and (a) to obtain the rotational position (B) at the time when the C-phase detection signal is output (step A7), the RAM 3
Is compared with the previous rotational position (A) stored in (A8). In the determination step A8, if the difference value {(B)-(A)} between the two rotational positions is larger than the count value (number of pulses) “8” which is １ ／ of the output interval of the C-phase signal, The servo motor 11 is rotating forward, and the single-shot deviation amount (C) is obtained as {(B) − (16 pulses) − (A)} (step A12), and the process proceeds to the “displacement determination process” of step A11.

If the difference value {(B)-(A)} between the two rotational positions is less than or equal to the count value "8" in the judgment step A8, the flow shifts to the judgment step A9. When the difference value {(A) − (B)} between the two rotational positions is larger than the count value “8”, the servo motor 11 is rotating in the reverse direction, and the single-shot deviation amount (C) is calculated as ｛( B) + (16 pulses) − (A)｝ (step A13)
The processing shifts to “shift determination processing”.

Further, in the judgment step A9, if the difference value (A)-(B)} between the two rotational positions is equal to or smaller than the count value "8", a C-phase signal corresponding to the same rotational position as the previous time is detected. Since it is determined that the deviation has occurred, the single-shot deviation amount (C)
As {(B)-(A)} (step A1).
0) The process proceeds to “shift determination processing”. The above-described process of calculating the amount of deviation is performed every time a C-phase signal is detected in step A5, that is, every time 16 UP / DOWN pulses are counted. Steps A8 to A10,
A12 and A13 correspond to a displacement amount detecting means.

FIG. 2 is a flowchart of the "shift determination process". The following counters (G) and (H) are configured to start the following processing from a state where the counters are cleared to zero in the initial processing after the power is turned on. In the first determination step B1, the CPU 1 determines whether or not the single-shot deviation amount (C) is “0”. If the single shift amount (C) is "0", no shift has occurred, and therefore, as will be described later, the counter (G) for counting the number of continuous corrections is cleared to zero (step B2), and the process ends.

If the single shot deviation (C) is not "0",
It is determined whether or not the mode is the position correction mode (step B
3). In the position correction mode, for example, the user
Is set in advance.

When the position correction mode is not set,
The CPU 1 updates the cumulative deviation amount by adding the single deviation amount (C) to the previous cumulative deviation amount stored in the RAM 3 (Step B4, position deviation amount accumulating means). Then, it is determined whether or not the updated cumulative deviation amount exceeds the cumulative deviation allowable value (step B5, abnormality determining means). If the cumulative shift amount is equal to or less than the cumulative shift allowable value, the turning point (A) is updated based on the turning point (B) obtained in step A7 of FIG. 1 and stored in the RAM 3 (step B10). , And the process ends. CPU1
Causes the display device 6 to display the accumulated shift amount.

If the position correction mode is set in the determination step B3, the CPU 1 determines whether or not the single displacement amount (C) exceeds the position correction allowable value (step B6). If
The counter (G) for the number of continuous corrections and the counter (H) for displaying the number of corrections since power-on are both incremented (step B7). The value of the counter (H) is displayed on the display device 6.

Then, it is determined whether or not the value of the counter (G) exceeds a predetermined number of consecutive corrections (step B).
8, continuous correction abnormality determination means), if the number of continuous corrections is less than or equal to the predetermined number of continuous corrections, the turning point position (B) obtained in step A7 is corrected by the single-shot deviation amount (C) (step B9, position correction means). ), When the corrected turning point position (B) 'is updated as the turning point position (A) (step B10), the process ends.

Further, when the single deviation amount (C) exceeds the position correction allowable value in the judgment step B6, and when the value of the counter (G) exceeds the predetermined number of consecutive corrections in the judgment step B8. Is the encoder 1
It is determined that there is an abnormality in 2 and abnormal processing such as displaying on the display device 6 is performed (step B11), and then the processing is terminated. The above processing is started after the origin detection is performed in the home return operation processing described below.

FIG. 3 is a flowchart showing the control contents of the home position return operation process performed by the CPU 1 when the power is turned on. First, the CPU 1 outputs an origin latch clear signal to the origin / C phase detection circuit 19 (step C1).
In the following steps C2 to C5, the same processing as in steps A1 to A4 is performed.

Then, referring to the corresponding input port, the CPU 1 determines whether or not the origin limit switch (not shown) is turned on in a determination step C6. The origin limit switch is turned ON when the servo motor 11 reaches a predetermined rotation position during one rotation of the servo motor 11 in order to detect the mechanical origin of the servo motor 11.
In order not to be affected by the error during N, OFF operation,
It is mounted so as to be turned on at the origin position by the C-phase signal, that is, on the side substantially opposite to the position where the specific C-phase signal is output.

If the origin limit switch is ON in step C6, the origin limit flag is set to "1" in step C7, and the process proceeds to step C8. If the origin limit switch is not ON Directly proceeds to Step C8.

In step C8, it is determined whether or not the origin limit flag is "1". If it is "1", it is determined in decision step C9, and if it is not "1", it is determined in decision step C17. It is determined whether the detection signal is output (is "1").

If the origin detection signal has been output in step C9, the origin flag is set to "1" (step C10), and the routine goes to a decision step C11. If the origin detection signal has been output in step C17, an origin latch clear signal is output (step C18), and the routine goes to a judgment step C11. If the origin detection signal has not been output in steps C9 and C17, the process directly proceeds to step C11.

At step C 11, the CPU 1 determines whether or not a C-phase signal has been detected, and if a C-phase signal has been detected, the counter 1 latched by the latch circuit 17.
After reading the counter value (b) of No. 4, a latch 2 clear signal is output (step C12). If the C-phase signal is not detected, the flow shifts to decision step C14.

When the counter value (b) is read in step C12, the CPU 1 reads the counter value (b) and the value in step C12.
The rotational position data (B) at the time of latching the counter value (b) is obtained from the difference from the counter value (a) read in 3 and the current rotational position data. And step C
Go to 14.

At step C14, the origin flag is set to "1".
Is determined, and if it is set to "1", the rotation position (B) is set as the origin position (step C15), and the origin detection completion flag is set to "1" (step C15). Step C16) The process ends. If the origin flag is not set to "1", the flow shifts to step C2 to wait for the generation of the next system timer interrupt signal.

Here, referring to FIG. 9, when the servo motor 11 is rotating in the reverse direction and the A-phase signal is in the leading phase,
The origin / C phase detection circuit 19 outputs the origin detection signal at the same time as the time when the falling edge of the specific C phase signal is input and the C phase detection signal is output (for example, the counter value “33”). is there. Therefore, in this case, in the flow of FIG. 3, steps C11 → C12 → C13 → C
The transition is made from 14 to C15, the latest latch data at the time when the C-phase detection signal is detected is read, and the rotational position data (B) updated at step C13 (counter value “33”)
Is set as the origin position.

On the other hand, when the servo motor 11 is
When the phase signal is a leading phase, the origin / C phase detection circuit 1
The timing at which the reference point 9 outputs the origin detection signal is the point in time when eight counts have elapsed (counter value “33”) from the point in time when the rising edge of the specific C-phase signal is input and the C-phase detection signal is output (for example, counter value “33”) 41 "). Therefore, in this case, in the flow of FIG.
1 → C14 → C15, and the rotational position data (B) that has not been updated when the C-phase detection signal was detected last time
(Counter value “33”) is set as the origin position.

As described above, according to the present embodiment, the C-phase signal of the encoder 12 is output a plurality of times during one rotation cycle of the servomotor 11, so that one of the specific C-phase signals is output. The output period of the signal is set to be different from the output periods of the other C-phase signals.
Thus, every time the C-phase detection signal is output, the amount of deviation of the rotational position data counted by the counter 14 is detected.

Therefore, based on the output timings of the plurality of C-phase signals, it is frequently determined whether or not the counter 14 is performing a normal counting operation based on the correct output timings of the A-phase signal and the B-phase signal. be able to. Further, the origin / C-phase detection circuit 19 determines the output period of the C-phase signal, thereby detecting the specific C-phase signal as a reference point and easily determining the origin position of the servomotor 11.

Further, according to the present embodiment, since the edge output intervals on one side of the C-phase signal output a plurality of times are all equal, the origin / C-phase detection circuit 19 detects the C-phase signal. By performing based on the edge on the side where the output interval is equal, the number of outputs of the A-phase signal and the B-phase signal within the detection interval of the C-phase signal is all equal, and the CPU 1 performs The displacement amount of the displacement position data can be easily detected based on the equal number of outputs.

In addition, according to the present embodiment, the origin / C-phase detection circuit 19 detects the C-phase based on the rising edge of the C-phase signal when the servo motor 11 rotates in the normal direction and based on the falling edge when the servo motor 11 rotates in the reverse direction. Since the signal is output, the C-phase detection signal is output at the timing of the same side edge of the C-phase signal regardless of whether the servo motor 11 rotates normally or not. Therefore, the counter value of the counter 14 latched by the latch circuit 17 at the time of forward rotation and the time of reverse rotation of the servo motor 11 becomes the same value, so that the configuration can be simplified.

Also, according to the present embodiment, each time the turning point position of the servomotor 11 is detected by the latch circuit 17, the CPU 1 sets the counter based on the difference value from the previously detected turning point position data. When the single-shot deviation amount (C) is detected, the single-shot deviation amount (C) is accumulated, and when the accumulated positional deviation amount exceeds a preset accumulated deviation amount allowable value, it is determined to be abnormal. I made it.

Therefore, for example, even if dust or the like adheres to the slit of the encoder 12 and one pulse of the A-phase signal or the B-phase signal is lost each time the origin position is detected, the amount of deviation due to the one pulse is missing. Since the accumulation is reliably detected, the abnormality determination can be reliably performed.

Further, according to the present embodiment, the encoder 12
If the single-shot deviation amount (C) is equal to or smaller than the preset correction allowable value, the detected origin position data is corrected based on the single-shot deviation amount (C). By correcting the position data, an accurate turning point position can be obtained.

Then, the number of times that the single-shot deviation amount (C) of the encoder 12 continuously becomes equal to or less than the correction allowable value is counted, and if the count value exceeds a predetermined value, it is determined that there is an abnormality. Even if the difference is equal to or smaller than the allowable value, a case where the probability that the deviation amount continuously occurs has a high probability of occurrence can be determined to be abnormal. In addition, the number of times that the turning point data has been corrected since the power was turned on is counted by the counter (H) and is displayed on the display device 6 together with the accumulated deviation amount. It is possible to visually grasp the frequency of occurrence of noise in the environment in which the noise occurs.

FIGS. 10 to 13 show a second embodiment of the present invention. The same portions as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. Only different portions will be described below. FIG. 10 is a functional block diagram showing a configuration of a counter circuit 8a in place of the counter circuit 8 of the first embodiment.
The configuration of the counter circuit 8a is different from the origin /
The C-phase detection circuit 19 is replaced with an origin / C-phase detection circuit (C-phase signal detection means, origin detection means) 34.

Further, from the encoder 12a in place of the encoder 12, A, B
And a C-phase signal. The shape and arrangement of the slits provided on the scale are adjusted so that the pulse width of the C-phase signal output from the encoder 12a is substantially equal to the period T of the A-phase and B-phase signals (see FIG. 13). . In addition, the pulses of the C-phase signal other than the specific C-phase signal are adjusted such that the falling edge of the A-phase signal pulse is located at substantially the center phase of the pulse width.

FIG. 11 shows a detailed electrical configuration of a portion for detecting a C-phase signal in the origin / C-phase detection circuit 34, and FIG. 12 shows a signal waveform of each portion. The configuration of the origin detecting means in the origin / C phase detecting circuit 34 is the same as that of the origin detecting means 19a of the first embodiment, and is not shown.

Clock input terminals CK of three D flip-flops 35, 36 and 37 connected serially
Is supplied with a clock signal CLK of the clock circuit 38. The A-phase signal applied to the D input terminal of the first-stage D flip-flop 35 is applied to the Q output terminals of the D flip-flops 35, 36, and 37.
Each of them is output as a signal shifted by one clock signal CLK (see FIGS. 12C to 12E).

The EXOR gate 39 outputs a signal by taking the exclusive OR of the signal and the signal (see FIG. 12 (g)). That is, the signal is a signal having a pulse width of one pulse of the clock signal CLK, which is output according to the rising and falling edges of the A-phase signal shown in FIG. The EXOR gate 40 outputs a signal by taking an exclusive OR of the signal and the signal (FIG. 12).
Therefore, the signal is a signal that is delayed by one pulse of the clock signal CLK with respect to the signal.

The signals output from these EXOR gates 40 and 39 are given to one input terminal of AND gates 41 and 42, and the AND gate 41
The UP / DOWN signal (U / D signal) is given to the other input terminal of the AND gate 42 (the negative logic on the AND gate 41 side). The output terminals of the AND gates 41 and 42 are respectively connected to the input terminals of the OR gate 43, and the output signal of the OR gate 43 is provided to one input terminal of the three-input AND gate 44.

That is, as shown in FIGS. 12 (h) and 12 (i), when the U / D signal is at a low level (down),
A signal is output as a signal via the D gate 41 and the OR gate 43, and the U / D signal is at a high level (up).
In this case, the signal is selectively output as a signal via the AND gate 42 and the OR gate 43.

Then, the remaining 2 of the 3-input AND gate 44
One input terminal is supplied with the B-phase and C-phase signals of the encoder 12a, and the output terminal of the AND gate 44 is
The flip-flop 45 is connected to a clock input terminal. The D input terminal of the D flip-flop 45 is pulled up to a high level, and the C output terminal outputs a C phase detection signal.

Next, the operation of the second embodiment will be described with reference to FIG. For example, when the servo motor 11 is rotating in the reverse direction, the counter 14 performs a down-counting operation in accordance with the output of the rising and falling edges of the A-phase and B-phase signals (FIGS. 13A, 13B, and 13B). (E)).
It should be noted that after the input state of the A-phase signal and the B-phase signal has changed, the counter 14 outputs the clock signal CLK (see FIG. 13D).
It counts up (down) after the clock. At this time, as shown in FIG.
The signal is at a low level, and the signal shown in FIG. 11G is output as the signal shown in FIG.

In the case of the reverse rotation, all the inputs of the AND gate 44 are at the high level during the period when the signal levels of the B phase and the C phase are both high and the falling edge of the A phase signal is output. And a C-phase detection signal is output (see FIG. 13 (g)). Then, at the falling edge of the C-phase detection signal, the latch circuit 17 outputs the counter 1
4 latches the count value “3” output to the data bus. At the same time, the CPU 1 is also supplied with the C-phase detection signal.

When the servo motor 11 is rotating forward, the counter 14 performs an up-count operation (FIG. 1).
3 (a), (b) and (e)). In the case of normal rotation, the C-phase detection signal is output during a period in which the signal levels of the B-phase and the C-phase are both high and based on the output of the rising edge of the A-phase signal (FIG. 13 (g)). )reference). At this time, as shown in FIG. 13H, the U / D signal is at a high level, and the signal shown in FIG.
The signal (f) is output. Then, at the rising edge of the C-phase detection signal, the latch circuit 17
The counter 3 latches the count value “3” output to the data bus.

In this case, FIG. 13 shows that the timing at which the count value of the counter 14 changes is equal to the timing at which the signal and the C-phase detection signal are output. Since the signal is output after passing through the flip-flop 45, a gate delay occurs in the output timing of the actual C-phase detection signal. Accordingly, since the C-phase detection signal rises after the count value of the counter 14 changes and is output to the latch circuit 17, the count value "3" of the counter 3 output at that time is latched. .

As described above, the output timing of the C-phase detection signal is changed according to the level of the U / D signal so that the count value of the counter 14 is equal between the forward rotation and the reverse rotation. To do that.

As described above, the C-phase signal is adjusted so that the substantially center phase of the pulse width is located at the falling edge of the A-phase signal. From there, even when the output timing of the C-phase signal changes, in order to detect the count value “3”, a C-phase detection signal based on at least the falling edge of the A-phase signal is output as in FIG. It is sufficient that the C-phase signal becomes significant (high level) during the operation. Therefore, the allowable range of the center phase shift is approximately ± T / 2.

As described above, according to the second embodiment, the origin /
The C-phase detection circuit 34 is configured to output the C-phase detection signal based on the B-phase signal level during the period in which the C-phase signal is output and the output timing of the A-phase signal edge.

Therefore, the C-phase signal only needs to be significant when the A-phase or B-phase signal edge corresponding to the displacement position of the servomotor 11 is output, and the output condition of the C-phase signal in the encoder 12 is further relaxed. And the encoder 12 can be easily manufactured. Further, it is possible to provide a larger tolerance for a change in output characteristics of the A, B, and C phase signals due to a change with time and a change in signal output due to mechanical vibration caused by displacement of the displacement body. .

FIGS. 14 to 16 show a third embodiment of the present invention. The same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted. Only different parts will be described below. FIG. 14 is a functional block diagram showing a configuration of a counter circuit 8b replacing the counter circuit 8 of the first embodiment.
The configuration of the counter circuit 8b is the same as that of the first embodiment.
The C-phase detection circuit 19 is replaced with an origin / C-phase detection circuit (C-phase detection means, origin detection means) 46.

Further, the encoder 12a is
has been replaced by b. Then, the origin / C phase detection circuit 4
6 is supplied to the encoder 12b
Is only the C-phase signal. The C-phase signal other than the specific C-phase signal output from the encoder 12b is set so that the pulse width is less than 1/4 of the period of the A-phase signal and the B-phase signal. (The minimum edge interval) (see FIGS. 16A to 16C).

The construction of the origin detecting means in the origin / C phase detecting circuit 46 is the same as that of the origin detecting means 19a of the first embodiment. FIG. 14 shows only the C-phase signal detecting means 46b of the origin / C-phase detecting circuit 46.
The C-phase signal detecting means 46b includes only a D flip-flop 47 whose D input terminal is pulled up and whose C-phase signal is supplied to a clock input terminal.

According to the third embodiment configured as described above, as shown in FIG.
6 outputs a C-phase detection signal triggered by the rising edge of the C-phase signal in both cases of the forward rotation and the reverse rotation of the servo motor 11, but the C-phase signal of the encoder 12b is changed to the A-phase signal and the B-phase signal. By being located within the minimum edge interval with the signal,
The timing at which the latch circuit 17 latches the displacement position data is “3” in each case. Therefore, the configuration can be extremely simplified.

The present invention is not limited to the embodiments described above and shown in the drawings, and the following modifications or extensions are possible. In the first embodiment, the predetermined correction operation performed in step B9 shown in FIG. 2 is not limited to the one that corrects the counter value.
The PU 1 may displace the servo motor 11 by giving a correction command to the servo driver. Further, in the first embodiment, the abnormality determination may be performed only for the single-shot deviation amount (C) based on whether or not the deviation amount allowable value is exceeded, without accumulating and determining the single-shot deviation amount (C). Various displays by the display device 6 may be performed as needed.

The abnormality determination processing in steps B5 and B8 may be performed as needed. In the second embodiment, the pulse width (here, W) of the C-phase signal does not necessarily have to be equal to the period T of the A-phase and B-phase signals, and is appropriately set in a range of T / 8 <W ≦ T. You can change it. Also,
It is not always necessary that the center phase of the C-phase signal and the output timing of the edge detection signal substantially coincide with each other, and may be changed as appropriate in accordance with the actual characteristics of deviation and fluctuation in each individual device. In the second embodiment, the B-phase signal is at the low level and the edge of the A-phase signal (the rising edge in the case of normal rotation) is input during the period in which the C-phase signal is output according to the selection of the reference point. The origin detection signal may be output based on the timing. Alternatively, the A-phase signal and the B-phase signal may be exchanged, and the C-phase detection signal may be output based on the level of the A-phase signal and the edge of the B-phase signal.

Instead of delaying the output timing of the edge detection signal in accordance with the direction of displacement of the servomotor 11, the following configuration is also possible. Instead of supplying the U / D signal output from the counter 14 to the origin detection circuit 19, the latch circuit 17 is provided with a subtractor capable of decrementing the latched data. When the U / D signal is at the low level, that is, when the servo motor 11 is rotating in the reverse direction, the latch circuit 5 decrements the latched data and outputs
Output to Even with such a configuration,
The displacement of the C-phase detection position caused by the change in the rotation direction of the servo motor 11 can be corrected. Also,
At the time of the up-counting operation, the counter 14 starts the clock signal CLK after the input state of the A-phase signal and the B-phase signal changes.
It may be configured to count up one clock after the above, and to count down two clocks after the input state of the A-phase signal and the B-phase signal changes during the down-counting operation. That is, the count timing in the down-count operation is delayed by one clock with respect to the up-count operation.

The displacement detecting means does not necessarily have to detect all C
It is not necessary to detect the shift amount based on the output timing of the phase signal, and the detection may be performed once every time the C-phase signal is output a plurality of times. In addition, C excluding the specific C-phase signal
The shift amount may be detected based on the output timing of the phase signal. For example, a multiplexer is provided in the origin / C phase detection circuit 19 so that a specific C phase signal and other C phase signals can be selectively output to the latch circuit 17. The data latch may be performed only with the specific C-phase signal, and the data latch may be performed with the other C-phase signals in the C-phase signal detection mode in the shift amount detection processing.

The output intervals of the C-phase signals need not always be set to be equal. In this case, the positional deviation amount detecting means stores, based on the specific C-phase signal, how many output intervals of each C-phase signal are counted by the position data output means, and stores the stored value. The shift amount may be detected based on the following. The specific C-phase signal may be provided as needed. For example, for a direct drive such as a main spindle of a machine tool, and the position determined as the origin may be on any side of 0 to 180 degrees or 180 to 360 degrees, the phase of the C-phase signal is shifted by 180 degrees and the same. The pulse width (ie, 2 in one rotation cycle)
The frequency of detection of the deviation amount can be increased (by outputting only the pulse), and in this case, the origin detection means can be omitted.

Instead of performing the detection of the amount of deviation by software of the CPU 1, it is also possible to configure hardware as follows. For example, the counter is cleared each time a C-phase signal is detected, and the counter value is latched (before being cleared) each time a C-phase signal is detected, using a counter that counts the number of pulses output during that time. To do.
Then, the latch data is compared with the number of pulses corresponding to the regular output interval of the C-phase signal by a magnitude comparator, and if they do not match, or if the difference between them is greater than or equal to a predetermined value, it is determined to be abnormal. To do. The encoder is not limited to a rotary encoder, and can be applied to a linear encoder in the same manner. The encoder is not limited to an optical encoder, but may be a magnetic encoder or the like. The displacement body is not limited to the servomotor 11, but may be applied as long as it can be rotated or linearly displaced.

[0119]

Since the present invention is as described above,
The following effects are obtained. According to the encoder device of claim 1, based on the output timing of the plurality of C-phase signals,
For example, whether or not the output timing of the A-phase signal and the B-phase signal is normal can be determined in a period shorter than one displacement cycle of the displacement body, that is, more frequently than in the related art.

According to the encoder device of the second aspect,
The displacement amount detecting means detects the displacement amount of the displacement position data counted by the displacement position data output means at a timing when the C-phase signal is detected a plurality of times during one displacement cycle of the displacement body. A phase signal and B
It is possible to check at a high frequency whether or not the counting operation of the displacement position data output means based on the output timing of the phase signal is normally performed.

According to the encoder device of the third aspect,
Since the output period of the specific C-phase signal, which is one of the C-phase signals output a plurality of times, is made different from the output periods of the other C-phase signals, the output period of the C-phase signal is determined. , The specific C-phase signal can be detected, for example, as a reference point.

According to the encoder device of the fourth aspect,
The origin detection means can easily and reliably determine the origin of the displacement body based on the output timing of the specific C-phase signal.

According to the encoder device of the fifth aspect,
Since the displacement amount detecting means detects the displacement amount based on all output timings of the C-phase detection signal output by the C-phase signal detecting means, it is possible to maximize the frequency of the displacement amount detection of the displacement position data. it can.

According to the encoder device of the sixth aspect,
The position shift amount detecting means detects the shift amount based only on the output timing of the C-phase detection signal corresponding to the C-phase signal other than the specific C-phase signal detected by the C-phase signal detecting means. The same effect can be obtained.

According to the encoder device of the seventh aspect,
Since at least one edge output interval of at least one side of the C-phase signal output a plurality of times is set to be equal, for example,
Since the C-phase signal detecting means detects the C-phase signal based on the edge on the side where the output interval is equal, the output numbers of the A-phase and B-phase signals in the interval where the C-phase signal is detected become equal. The shift amount detecting means can easily detect the shift amount of the displacement position data based on the equal output number at any detection timing of the C-phase signal.

According to the encoder device of the eighth aspect,
For example, even if one pulse missing of the A-phase signal or the B-phase signal occurs every time the origin position is detected due to the attachment of dust or the like to the slit of the encoder, the displacement amount due to the one pulse missing is calculated by the positional displacement amount accumulating means. , It is possible to reliably detect it.

According to the encoder device of the ninth aspect,
The abnormality determining means determines that the abnormality is abnormal when the deviation amount accumulated by the positional deviation amount accumulating means exceeds a preset accumulated deviation amount allowable value. Therefore, even in a state where a slight deviation amount surely occurs every time. Thus, the abnormality determination can be reliably performed.

According to the encoder device of the tenth aspect, the display means displays the displacement amount accumulated by the positional displacement amount accumulating means. Therefore, by referring to the display of the accumulated displacement amount, the displacement body can be displayed. The noise occurrence frequency of the operating environment can be visually grasped.

According to the encoder device of the eleventh aspect, the position correcting means is provided when the position data shift amount of the position data output means detected by the position shift amount detecting means is equal to or less than a preset allowable correction value. Since the predetermined correction operation is performed based on the amount of displacement, an accurate displacement position of the displacement body can be obtained by correcting, for example, the position data of the displacement body based on the amount of displacement equal to or less than the correction allowable value.

According to the encoder device of the twelfth aspect, the continuous correction abnormality judging means counts the number of times that the amount of deviation detected by the positional deviation amount detecting means has continuously become equal to or less than the allowable correction value. Since the abnormality is determined when the count value exceeds the predetermined value, it is possible to determine the abnormality even when the deviation amount equal to or less than the correction allowable value continuously occurs.

According to the encoder device of the thirteenth aspect, the number-of-corrections display means displays the number of times the correction has been performed by the position correction means. It is possible to visually grasp the relatively low-level noise occurrence frequency of the environment in which it is located.

According to the encoder device of the fourteenth aspect, the C-phase signal is significant when the A- or B-phase signal edge corresponding to the displacement position of the displacement body to be the origin is output. The output condition of the C-phase signal can be further relaxed and the encoder can be easily manufactured. Further, it is possible to provide a larger tolerance with respect to a change in output characteristics of the A, B, and C phase signals due to a change with time and a change in signal output due to mechanical vibration due to displacement of the displacement body. Become.

According to the encoder device of the fifteenth aspect, the C-phase signal detection means includes one edge of the C-phase signal during the period in which the position data output means is counting up, and the position data output means counts down. Since the C-phase detection signal is output based on the other edge of the C-phase signal during the operation, the detection is always performed based on the output timing of the same edge of the C-phase signal regardless of the displacement direction of the displacement body.

According to the encoder device of the sixteenth aspect, the C-phase signal is set to be located within the shortest edge output interval between the A-phase signal and the B-phase signal, and the C-phase signal detection means Since the C-phase detection signal is output based only on the signal, there is no need to refer to a signal indicating the displacement direction of the displacement body, and the configuration can be extremely simplified.

[Brief description of the drawings]

FIG. 1 is a flowchart showing control contents of a CPU.

FIG. 2 is a flowchart showing control contents of a shift determination process.

FIG. 3 is a flowchart showing control contents of an origin return process.

FIG. 4 is a functional block diagram showing an overall configuration.

FIG. 5 is a functional block diagram showing a detailed configuration of a counter circuit.

FIG. 6 is a diagram showing a detailed electrical configuration of an origin / C phase detection circuit.

FIG. 7 is a timing chart of each part of the origin / C phase detection circuit.

FIG. 8 is a timing chart for explaining a case where the servomotor is inverted immediately after the non-detection-side C-phase signal edge is output and the detection-side C-phase signal edge is output before the level of the UP / DOWN signal is switched; chart

FIG. 9 is a timing chart showing output timings of a counter value of an up / down counter and an origin detection signal.

FIG. 10 is a view corresponding to FIG. 5, showing a second embodiment of the present invention.

FIG. 11 is a diagram corresponding to FIG. 6;

FIG. 12 is a diagram corresponding to FIG. 7;

FIG. 13 is a diagram corresponding to FIG. 9;

FIG. 14 is a view corresponding to FIG. 5, showing a third embodiment of the present invention.

FIG. 15 is a diagram corresponding to FIG. 6;

FIG. 16 is a diagram corresponding to FIG. 7;

[Explanation of symbols]

1 is a CPU (position shift amount detecting means, position shift amount accumulating means, abnormality determining means, position correcting means, continuous correction abnormality determining means), 6 is a display device (display means, correction number displaying means),
11 is a servo motor (displacement body), 12, 12a and 12
b is an encoder, 14 is an up / down counter (position data output means), 17 is a counter data latch circuit (position detection means), 19, 34 and 46 are origin / C phase detection circuits (C phase signal detection means, origin detection means) ).

Claims (16)

[Claims] When a displacement signal of a displacement body reaches a reference point, pulse signals having phases different from each other by 90 degrees are output as an A-phase signal and a B-phase signal according to a linear displacement or a rotational displacement of the displacement body. An encoder device for outputting a C-phase signal, wherein the C-phase signal is output a plurality of times during one displacement cycle of the displacement body. 2. A position data output means for outputting displacement position data of the displacement body by counting the A-phase and B-phase signals, and outputting a C-phase detection signal by detecting an output timing of the C-phase signal. C-phase signal detecting means, and outputting the position data based on a change amount of the displacement position data output by the position data output means at a timing at which the C-phase detection signal is output by the C-phase signal detecting means. 2. The encoder device according to claim 1, further comprising: a position shift amount detecting unit that detects a shift amount of the displacement position data counted by the unit. 3. The output period of a specific C-phase signal, which is one of the C-phase signals output a plurality of times, is different from the output periods of other C-phase signals. Or the encoder device according to 2. 4. The encoder according to claim 3, wherein said C-phase signal detecting means includes origin detecting means for detecting an origin of said displacement body based on an output timing of said specific C-phase signal. apparatus. 5. The apparatus according to claim 2, wherein the displacement detecting means detects the displacement based on all output timings of the C-phase detection signal output by the C-phase signal detecting means. 5. The encoder device according to any one of 4. 6. The position shift amount detection means detects the shift based on only an output timing of a C-phase detection signal detected by the C-phase signal detection means and corresponding to a C-phase signal other than the specific C-phase signal. The encoder device according to claim 4, wherein the amount is detected. 7. The encoder device according to claim 1, wherein at least one edge output interval of at least one side of the C-phase signal output a plurality of times is set to be equal. . 8. The encoder device according to claim 2, further comprising a displacement amount accumulating unit that accumulates the displacement amount detected by the displacement amount detecting unit. 9. An abnormality judging means for judging an abnormality when the displacement amount accumulated by the displacement amount accumulating means exceeds a preset accumulated displacement amount allowable value. 9. The encoder device according to 8. 10. The encoder device according to claim 8, further comprising a display unit that displays a displacement amount accumulated by the displacement amount accumulation unit. 11. When the displacement detected by the displacement detecting means is equal to or less than a preset allowable correction value, a position correcting means for performing a predetermined correction operation based on the displacement is provided. 11. The method according to claim 8, wherein:
The encoder device according to any one of the above. 12. Counting the number of times the amount of displacement detected by the displacement amount detecting means continuously becomes equal to or less than the correction allowable value, and when the count value exceeds a predetermined value, it is determined that an abnormality has occurred. The encoder device according to claim 11, further comprising a continuous correction abnormality determination unit for determining. 13. The encoder device according to claim 11, further comprising a correction number display means for displaying the number of times correction has been performed by said position correction means. 14. The C-phase signal detecting means, based on one signal level of the A-phase or the B-phase during a period in which the C-phase signal is output, and the output timing of the other signal edge. 14. The encoder device according to claim 8, wherein the encoder device outputs a detection signal. 15. The C-phase signal detection means includes one edge of the C-phase signal during a period when the position data output means is counting up and a period during which the position data output means is counting down. 14. The encoder device according to claim 8, wherein the C-phase detection signal is output based on the other edge of the C-phase signal. 16. The C-phase signal is set so that its output period is shorter than the shortest edge output interval between the A-phase signal and the B-phase signal, and is positioned within the shortest edge output interval. The encoder device according to any one of claims 8 to 13, wherein the C-phase signal detection unit outputs the C-phase detection signal based on only the C-phase signal.