JPH11239086A - Method and device for synchronization - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce an amount of arithmetic operations and to suppress interference waves by sharing a calculated weight coefficient between a received signal at a symbol discrimination point and a received signal in a timing other than the symbol discrimination point. SOLUTION: Signals are received from antennas 101 and 102. Receiving RF parts 103 and 104 convert these signals of carrier frequencies received from the antennas to base-band signals. Then A/D converters 105 and 106 convert the respective base-band signals to digital signals. Then a weight coefficient control circuit 109 calculates the weight coefficient by receiving as an input signal the received signal at the time A of the symbol discrimination point. Complex multipliers 110 to 113 multiply the received signals at the time A and the time B by the weight coefficient thus obtained and composition units 114 and 115 add the results. Then the weight coefficient is sequentially updated so as to minimize the squared error of the composite signal and known signal. Then the composition is adaptively performed also following up the received signals.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a synchronization method and a synchronization device in a wireless communication device.

[0002]

2. Description of the Related Art A conventional synchronizer will be described. FIG.
Shows a block diagram of a conventional synchronizer. Here, for simplicity, the number of antennas is set to two and the number of delay elements is set to two. However, the basic operation is also possible when the number of antennas is set to M and the number of delay elements (N-1). Is similar.

First, signals are received from antennas 801 and 802. This reception signal is received by reception RF sections 803 and 804.
Converts the carrier frequency signal from each antenna into a baseband signal. Next, A / D converters 805 and 806
Converts each baseband signal into a digital signal. X _m = [x _m1 (t),... x _m2 (t),..., x _mN (t)] ^T _m (1) W _m = [w _m1 (t), ... _wm2 (t), ..., _wmN (t)] ^T ... (2) Here, x _mn and w _mn correspond to the m-th antenna and the n-th delay tap. Therefore, the reception signal vector of the prior _{art, X = [X 1, X} 2, ... X M] T ··· (3) W = [W 1, W 2, ... W M] T ··· (4) Becomes Further, the calculation of the weighting factor for suppressing the interference wave uses an LMS algorithm that sequentially updates the weighting factor using the instantaneous value of the received signal and the reference signal. L
The MS algorithm is performed by a weight coefficient control circuit 807. Here, a received signal input to each antenna and each delay element is complex-multiplied by a weight coefficient and added, and a reference signal at time k is added. Thus, this is an algorithm that updates the weight coefficient so as to minimize the square error between the synthesized signal and the reference signal. Here, the error signal e (k) at the time point k is

[0004]

(Equation 1) (5) Using this, an update formula for obtaining a weight coefficient at the time point k + 1 from a weight coefficient of the antenna m at the time point k is expressed as: W _m (k + 1) = W _m (k) + μ · X ^* _m k) · e (k) m = 1, 2,..., M (6) Here, μ indicates a step size, and * indicates a complex conjugate.

As described above, in the conventional technique, the M × N weighting coefficients are independently updated using the LMS algorithm, and the square error between the synthesized signal and the reference signal is minimized, so that the discrimination point can be obtained. And suppresses the interference wave.

[0006]

However, in the conventional synchronizing apparatus, M × N weighting factors are applied to the received signal in a constantly changing propagation environment, and the square error between the combined signal and the reference signal is reduced. It must be updated to a minimum and converged. Also, if the synthesis is performed with insufficient convergence, the discrimination points of the synthesized signal are naturally shifted, and the characteristics are deteriorated.
At the same time, the effect of suppressing the interference wave decreases. Therefore, the conventional synchronizer requires a sufficient convergence time and a large amount of calculation. Furthermore, the use of a plurality of complex multipliers and delay elements increases the size of the device and complicates the device.

The present invention solves such a conventional problem. Even when an interfering station is present, the synchronization timing is detected without increasing the amount of calculation and suppressing the interference wave. It is another object of the present invention to provide a synchronization method and a synchronization device capable of achieving synchronization.

[0008]

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problem, and a weight coefficient calculated for suppressing an interference wave is determined by using a reception signal of a symbol identification point and a timing other than the symbol identification point. It is possible to reduce the amount of calculation by sharing with the received signals of the above, and to suppress the interference wave by multiplying and combining each received signal with the weighting factor calculated at the symbol identification point. The synchronization timing is detected by correlating the synthesized signal with the known signal and the known signal, so that synchronization can be achieved even when an interference station exists.

[0009]

According to the first aspect of the present invention, a received signal is multiplied by a weighting coefficient by a multiplying means, a multiplication result is added by a synthesizing means, and a correlation is obtained by two sets of correlating means. It operates at N times the symbol timing, the input signal at the symbol timing interval is processed by the synthesis means A, the input signal at other times is processed by the synthesis means B, and the output of the synthesis means A and the known signal are processed by the difference means. This is a synchronization method in which the difference is obtained, the weight coefficient is updated by the weight coefficient control means, and the synchronization timing is detected from the output of the correlation means by the synchronization timing detection means.

According to a fifth aspect of the present invention, there is provided a combination comprising a multiplier for multiplying a received signal by a weighting factor, a synthesizer for adding a multiplication result, and a correlator for correlating the synthesized signal with a known signal. , Which operates at N times the symbol timing, outputs an input signal to the combiner A at symbol timing intervals, and outputs to the combiner B at other times, a combiner A output and a known signal And a synchronization timing detector for detecting a synchronization timing from an output of the correlator.

With these configurations, the number of antennas is M
In this case, if there are M × 2 complex multipliers, a synchronous device can be realized, the device can be made smaller and simpler than the conventional technology, and the convergence time can be reduced by controlling a small number of weighting factors. It also leads to shortening. Therefore, the ability to follow a received signal in a constantly changing propagation environment is improved, and the interference suppression effect is also increased.

According to a second aspect of the present invention, the received signal is operated at N times the symbol timing by the A / D conversion means, multiplied by the weighting coefficient by the multiplication means, and the result of the multiplication is added by the synthesis means. Then, the correlation between the synthesized signal and the known signal is obtained by the correlation means, the information of the symbol timing interval is held by the buffer means, the buffer is controlled by the timing control means, and the difference between the synthesized signal and the known signal is obtained by the difference means. A synchronization method in which the weight coefficient is updated by the weight coefficient control means, and the synchronization timing is detected from the output of the correlation means by the synchronization timing detection means.

The invention according to claim 6 is characterized in that two sets of an A / D converter operating at N times the symbol timing and a multiplier for multiplying the received signal by a weight coefficient are multiplied by two. A synthesizer for adding the result, a correlator for correlating the synthesized signal with the known signal, a buffer for holding information at symbol timing intervals, a timing control circuit for controlling the buffer, and a difference between the synthesizer output and the known signal And a synchronization timing detector for detecting a synchronization timing from the correlator output.

With these configurations, the processing of two sets of received signals can be performed only by controlling the timing of overwriting and saving in the buffer without switching the received signal at the symbol identification point and the received signal at other timings by the switch. The hardware can be shared and the hardware can be shared, so that the size of the device can be reduced. Further, since the weight coefficient is calculated only at the symbol identification point, the amount of calculation is reduced, and the followability is improved and the interference suppression effect is increased even for a received signal in a propagation environment that changes every moment. Furthermore, since the synchronization timing is detected from the combined signal in which the interference wave is suppressed, the detection accuracy is improved, and stable synchronization can be achieved.

According to a third aspect of the present invention, a received signal is multiplied by a weighting coefficient by a multiplying means, a multiplication result is added by a synthesizing means, and a correlation is obtained by two sets of correlating means.
It operates at N times the symbol timing, the input signal at the symbol timing interval is processed by the synthesis means A, the input signal at other times is processed by the synthesis means B, and the output of the synthesis means A and the known signal are processed by the difference means. This is a synchronization method in which a difference is obtained, a weight coefficient is updated by weight coefficient control means, an output of the correlation means is interpolated by interpolation means, and a synchronization timing is detected from an output of the interpolation means by synchronization timing detection means.

According to a seventh aspect of the present invention, there is provided a combination comprising a multiplier for multiplying a received signal by a weighting factor, a synthesizer for adding a multiplication result, and a correlator for correlating the synthesized signal with a known signal. , Which operates at N times the symbol timing, outputs an input signal to the combiner A at symbol timing intervals, and outputs to the combiner B at other times, a combiner A output and a known signal And a synchronizing device including a weighting factor control circuit for updating the weighting factor from the difference between the two, a interpolator for interpolating the correlator output, and a synchronization timing detector for detecting a synchronization timing from the interpolator output.

With these configurations, the number of antennas can be
In this case, if there are M × 2 complex multipliers, a synchronous device can be realized, the device can be made smaller and simpler than the conventional technology, and the convergence time can be reduced by controlling a small number of weighting factors. It also leads to shortening. Therefore, the ability to follow a received signal in a constantly changing propagation environment is improved, and the effect of interference suppression is also increased. Furthermore, by obtaining a correlation between the synthesized signal in which the interference wave is suppressed and the known signal, and interpolating between the correlation values, more accurate synchronization timing can be detected, and the detection accuracy is improved, and the stable synchronization is improved. Can be taken.

According to a fourth aspect of the present invention, the A / D converter operates the received signal at N times the symbol timing, multiplies the received signal by a weighting factor, and adds the multiplication result by the combining unit. Then, the correlation between the synthesized signal and the known signal is obtained by the correlation means, the information of the symbol timing interval is held by the buffer means, the buffer is controlled by the timing control means, and the difference between the synthesized signal and the known signal is obtained by the difference means. A synchronization method in which a weight coefficient is updated by a weight coefficient control means, an interpolation means interpolates from an output of the correlation means, and a synchronization timing detection means detects a synchronization timing from an output of the interpolation means.

Further, according to the present invention, two sets of an A / D converter operating at N times the symbol timing and a multiplier for multiplying the received signal by a weighting coefficient are multiplied by two. A combiner for adding the result, a correlator for correlating the synthesized signal with the known signal, a buffer for holding information at symbol timing intervals, a timing control circuit for controlling the buffer, A synchronization device includes a weight coefficient control circuit that updates a weight coefficient from a difference, an interpolator that interpolates an output of the correlator, and a synchronization timing detector that detects a synchronization timing from an output of the interpolator.

With these configurations, the processing of two sets of received signals can be performed only by controlling the timing of overwriting and saving in the buffer without switching between the received signal at the symbol identification point and the received signal at other timings by the switch. The hardware can be shared and the hardware can be shared, so that the size of the device can be reduced. Further, since the weight coefficient is calculated only at the symbol identification point, the amount of calculation is reduced, and the followability is improved, and the effect of interference suppression is increased, even for a received signal in a constantly changing propagation environment. . Furthermore, by obtaining the correlation of the combined signal in which the interference wave is suppressed and interpolating between the correlation values, it is possible to detect a synchronization timing with higher accuracy, improve the detection accuracy, and achieve stable synchronization. it can.

Hereinafter, embodiments of the synchronizing device of the present invention will be specifically described with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram of a first embodiment. FIG. 2 shows a frame format, and FIG. 3 shows an operation explanatory diagram of the correlator. Here, for simplicity of description, the number of antennas is set to two, and time A is set to nTs (n = 0, 1, 2,...) Which is an integral multiple of the symbol timing (Ts).
And the time B is ((2n + 1) Ts) / 2 (n = 0, 1,
2,...), The received signal is divided and processed. However, the basic operation is the same when the number of antennas is M and the time is plural.

First, signals are received from the antennas 101 and 102. This reception signal is transmitted to reception RF sections 103 and 104.
Converts the carrier frequency signal from each antenna into a baseband signal. Next, the A / D converters 105 and 106
Converts each baseband signal into a digital signal. This digital signal has a symbol timing (T
s) by switching devices 107 and 108 operating at N times
0, Ts, 2Ts, ....., nTs (n
= 0, 1, 2,...) And Ts /
2, 3Ts / 2, 5Ts / 2 ...., ((2n + 1) T
s) / 2 (n = 0, 1, 2,...). Here, the vector of the received signal at time A is: X _A = [x ₁ (nTs), x ₂ (nTs),..., X _M (nTs)] ^T (n = 0, 1, 2,...) If (7), the weighting factor control circuit 109 calculates the weighting factor using the received signal at the symbol identification point at time A as an input signal. The weighting factor W thus obtained is expressed as follows: W = [w ₁ , w ₂ ,..., W _M ] ^T (8)
Multiply by 10, 111, 112, 113 and combiner 11
4, 115 are added. K at time A and time B
The synthesized signals at the time are represented by y _A (k) and y _B (k), respectively.
If you, the _{y A (k) = X A} T · W y B (k) = X B T · W ··· (9). Here, T represents a transposed matrix. As can be seen from Equation (9), the weighting coefficient W is common to the time A and the time B.

Further, the difference between the composite signal at the time A at the symbol discrimination point and the known signal r (k) at the time point k is obtained by the differentiator 116, and this output is defined as an error signal e (k). ) = Y _A (k) −r (k) = X _A ^T · W−r (k) (10) Using the error signal e (k) and the received signal X _{A at} the symbol identification point at time A, the weight coefficient control circuit 109
Calculates the weighting coefficient at the time of k + 1. Here, assuming that the weight coefficient w _m (k + 1) of the m-th antenna at time k + 1 is: w _m (k + 1) = w _m (k) + μ · x _m ^* (k) / e (k) m = 1,2 , 3,..., M (11) Here, μ indicates a step size, and * indicates a complex conjugate. As described above, by sequentially updating the weighting coefficients so as to minimize the square error between the synthesized signal y _A (k) and the known signal r (k), reception in a propagation environment that changes every moment is performed. By adaptively following and synthesizing the signal, the interference wave can be suppressed. Here, although the LMS algorithm is used as the adaptive algorithm of the weight coefficient control circuit 109, NLMS, R
The operation is basically the same in other algorithms such as LS and SMI.

Next, in the correlators 117 and 118, in order to detect the synchronization timing, the composite signal y _A (k), at time k of time A and time B at which the interference wave is suppressed is detected.
Using a y _B (k), a known signal r (k), correlated. Here, assuming that the number of known signal symbols is 1 symbol, the slide amount is τ, and the cross-correlation values c _A (τ) and c _B (τ) are:

[0025]

(Equation 2) (12) Using the correlator output, the synchronization timing detector 119 can detect the location where the correlation value is maximum, and determine the timing closest to the synchronization point.

In the first embodiment, the weighting factor is calculated by using the received signal only at the symbol identification point, and by sharing the weighting factor with time A and time B, the size of the apparatus can be reduced and the amount of calculation can be reduced. Reduction and suppression of interference waves were realized. Also,
By performing correlation using a received signal in which interference waves sampled at a plurality of times are suppressed, accurate synchronization timing can be detected even when an interference station exists.

(Embodiment 2) FIG. 4 shows a block diagram of Embodiment 2. Here, for simplicity of description, the number of antennas is assumed to be two, and the output signals of the A / D converters 405 and 406 are set to 0, Ts / 2, Ts, 3Ts / 2,... NTs / 2.
(N = 0, 1, 2,...), But the number of antennas is M
The basic operation is the same even when a higher-speed A / D converter is used.

First, signals are received from the antennas 401 and 402. This reception signal is received by reception RF sections 403 and 404.
Converts the carrier frequency signal from each antenna into a baseband signal. Next, the symbol timing (Ts)
A / D converters 405 and 406 operating at N times of the above convert the respective baseband signals into digital signals. Here, the vector of the received signal of this A / D converter is

[0029]

(Equation 3) ... (13) In addition, the weight coefficient control circuit 407 calculates the time 0,
Since weight coefficients are calculated only for the received signals at the symbol identification points of Ts, 2Ts,..., NTs (n = 0, 1, 2,...), Signals other than the symbol identification points are received. During this period, the signals at the symbol identification points are buffered 408, 40
9, 410, 411, and 412. For this purpose, using the timing control circuit 413, the time 0, Ts, 2Ts,..., NTs (n = 0, 1,.
2,...) At each symbol timing (Ts) interval.
12 is overwritten and stored, and the timing of the input signal is controlled. As a result, the hardware is shared, the size of the apparatus is reduced, and the weight coefficient is calculated only at the symbol identification point, which leads to a reduction in the amount of calculation. Here, if the weighting coefficients obtained by the symbol identification point at time k and _{Wk, W k = [w 1} (k), w 2 (k), ..., w M (k)] T ··· (14 ), Multiplied by complex multipliers 414 and 415, and added by combiner 416. The composite signal at the time point k is represented by y
Assuming that (k), y (k) = X ^T · W _k (15) Here, T represents a transposed matrix. That is, time nTs and time ((2n + 1) Ts) / 2 (n = 0, 1,
2,...) Are multiplied by the same weighting factor for each antenna and combined.

In updating the weight coefficient, an error signal e (k) output from a differentiator 417 between the composite signal y (k) and the known signal r (k), a received signal at the symbol identification point, Is used to calculate the weight coefficient at the time point k + 1. e (k) = y (k) −r (k) (16) w _m (k + 1) = w _m (k) + μ · x _m ^* (k) · e (k) (17) Here, μ indicates a step size, and * indicates a complex conjugate. Thus, the composite signal y (k) and the known signal r (k)
Are successively updated so as to minimize the square error of. Therefore, it is possible to adaptively follow a received signal in a constantly changing propagation environment and suppress interference waves by combining the signals.
Here, the LMS algorithm is used as the adaptive algorithm of the weight coefficient control circuit 407, but NL
The operation is basically the same in other algorithms such as MS, RLS, and SMI.

Next, in the correlator 418, even if an interference wave is present, the synchronization timing can be detected. Therefore, the output signal y (k) of the synthesizer 416, which is a signal in which the interference wave is suppressed, and the known signal The correlation is obtained using r (k). Here, assuming that the number of known signal symbols is 1 symbol, the slide amount is τ, and the cross-correlation value c (τ) is:

(Equation 4) (18) Using the correlator output, the synchronization timing detector 419 can detect the location where the correlation value is maximum, and determine the timing closest to the synchronization point.

In the second embodiment, the weight coefficient is calculated using the received signal of only the symbol identification point and the timing of a plurality of buffers is controlled, so that time nTs and time (2n + 1) Ts) / 2 ( (n = 0, 1,...) can be used in common, and hardware can be used in common, thereby realizing miniaturization of the device, reduction in the amount of calculation, and suppression of interference waves. In addition, by performing correlation using received signals obtained by suppressing interference waves sampled at a plurality of times, accurate synchronization timing can be detected even when an interference station exists.

(Embodiment 3) FIG. 5 is a block diagram showing Embodiment 3 of the present invention. FIG. 6 is a diagram illustrating the operation of interpolation and synchronization timing detection according to the third embodiment. Here, for simplification of description, the number of antennas is set to two, and time A is set to an integer multiple of the symbol timing (Ts). nTs (n
= 0, 1, 2,...) And time B by ((2n + 1) Ts)
/ 2 (n = 0, 1, 2,...), The received signal is divided and processed, but the basic operation is the same when the number of antennas is M and the time is plural. It is.

First, signals are received from the antennas 501 and 502. This reception signal is transmitted to reception RF sections 503 and 504.
Converts the carrier frequency signal from each antenna into a baseband signal. Next, A / D converters 505 and 506
Converts each baseband signal into a digital signal. This digital signal has a symbol timing (T
s) by the switches 507 and 508 operating at N times
0, Ts, 2Ts, ....., nTs (n
= 0, 1, 2,...) And Ts /
2, 3Ts / 2, 5Ts / 2 ....., (2n + 1) Ts)
/ 2 (n = 0, 1, 2,...). Here, the vector of the received signal at time A is: X _A = [x ₁ (nTs), x ₂ (nTs),..., X _M (nTs)] ^T (n = 0, 1, 2,...) Given that (19), the weighting factor control circuit 509 calculates a weighting factor using the received signal at time A at the symbol identification point as an input signal. The weight coefficient W thus obtained is expressed as follows: W = [W ₁ , W ₂ ,... W _M ] ^T (20)
10, 511, 512, and 513, and a combiner 51
4, 515 are added. K at time A and time B
The synthesized signals at the time are represented by y _A (k) and y _B (k), respectively.
When, a _{y A (k) = X A} T · W y B (k) = X B T · W ··· (21). Here, T represents a transposed matrix. This equation (2
As can be seen from 1), a common weighting factor W is used at time A and time B.

Further, the difference between the composite signal at the time A at the symbol discrimination point and the known signal r (k) at the time point k is calculated by the differentiator 516, and this output is defined as an error signal e (k). ) = Y _A (k) −r (k) = X _A ^T · W−r (k) (22) Using the error signal e (k) and the received signal X _{A at} the symbol identification point at time A, the weight coefficient control circuit 509 is used.
Calculates the weighting coefficient at the time of k + 1. Here, if the m-th antenna at time k + 1 of the weighting factor wm (k + 1), w m (k + 1) = w m (k) + μ · x m * (k) / e (k) m = 1,2, 3,..., M (23) Here, μ indicates a step size, and * indicates a complex conjugate. As described above, by sequentially updating the weighting coefficients so as to minimize the square error between the synthesized signal yA (k) and the known signal r (k), the reception signal in the propagation environment that changes every moment is obtained. , The interference wave can be suppressed by adaptively following and combining. Here, the LMS algorithm is used as the adaptive algorithm of the weight coefficient control circuit 509, but NLMS, R
The operation is basically the same in other algorithms such as LS and SMI.

Next, in the correlators 517 and 518, in order to detect the synchronization timing, the composite signal y _A (k), at the time k of the time A and the time B when the interference wave is suppressed, is detected.
and y _B (k), the correlation with the known signal r (k).
Here, assuming that the number of known signal symbols is 1 symbol, the slide amount is τ, and the cross-correlation values c _A (τ) and c _B (τ) are:

[0037]

(Equation 5) (24) The interpolator 519 interpolates the correlator output at the interval of Ts / 2 as shown in FIG. Therefore, the synchronization timing detector 520 detects the timing at which the interpolated correlation value becomes maximum, calculates the timing correction amount Δt, and corrects the synchronization timing.

In the third embodiment, the weighting factor is calculated using only the received signal at the symbol identification point, and the weighting factor is shared with the time A and the time B, thereby reducing the size of the apparatus and reducing the amount of calculation. If there is an interfering station, reduce interference, suppress interference waves, and perform correlation using received signals that suppress interference waves sampled at multiple times and perform finer interpolation than sampling intervals. However, more accurate synchronization timing can be detected. That is, the detection accuracy is determined by the time interval between the interpolations.

(Fourth Embodiment) FIG. 7 is a block diagram of a fourth embodiment. Here, for simplicity of description, the number of antennas is assumed to be two, and the output signals of the A / D converters 705 and 706 are set to 0, Ts / 2, Ts, 3Ts / 2,... NTs / 2.
(N = 0, 1, 2,...), But the number of antennas is M
The basic operation is the same even when a higher-speed A / D converter is used.

First, signals are received from antennas 701 and 702. This reception signal is received by reception RF sections 703 and 704.
Converts the carrier frequency signal from each antenna into a baseband signal. Next, the symbol timing (Ts)
A / D converters 705 and 706 operating at N convert the respective baseband signals into digital signals. Here, the vector of the received signal of this A / D converter is

[0041]

(Equation 6) ... (25) Also, the weight coefficient control circuit 707 calculates the time 0, T
Since weight coefficients are calculated only for the received signals at the symbol identification points of s, 2Ts,..., nTs (n = 0, 1, 2,...), signals other than the symbol identification points are received. During this time, the signals at the symbol identification points are buffered 708, 709,
710, 711, 712. For this purpose, the timing 0, T
The received signals of s, 2Ts,..., nTs (n = 0, 1, 2,...) are overwritten and stored in the buffers 708, 709, 710, 711, 712 at symbol timing (Ts) intervals. , The timing of the input signal. As a result, the hardware is shared, the size of the apparatus is reduced, and the weight coefficient is calculated only at the symbol identification point, which leads to a reduction in the amount of calculation. Here, if the weighting coefficients obtained by the symbol identification point at time k and _{Wk, W k = [w 1} (k), w 2 (k), ..., w M (k)] T ··· (26 ), Multiplied by complex multipliers 714 and 715, and added by combiner 716. The composite signal at the time point k is represented by y
Assuming that (k), y (k) = X ^T · W _k (27) Here, T represents a transposed matrix. That is, time nTs and time ((2n + 1) Ts) / 2 (n = 0, 1,
2,...) Are multiplied by the same weighting factor for each antenna and combined.

For updating the weighting coefficient, the error signal e (k) output from the differentiator 717 between the composite signal y (k) and the known signal r (k), the received signal at the symbol identification point, Is used to calculate the weight coefficient at the time point k + 1. e (k) = y (k) −r (k) (28) w _m (k + 1) = w _m (k) + μ · x _m ^* (k) · e (k) (29) Here, μ indicates a step size, and * indicates a complex conjugate. Thus, the composite signal y (k) and the known signal r (k)
Are successively updated so as to minimize the square error of. Therefore, it is possible to adaptively follow a received signal in a constantly changing propagation environment and suppress interference waves by combining the signals.
Here, the LMS algorithm is used as the adaptive algorithm of the weight coefficient control circuit 707, but NL
The operation is basically the same in other algorithms such as MS, RLS, and SMI.

Next, in the correlator 718, even if an interference wave exists, the synchronization timing can be detected. Therefore, the output signal y (k) of the synthesizer 716, which is a signal in which the interference wave is suppressed, and the known signal The correlation is obtained using r (k). Here, assuming that the number of known signal symbols is 1 symbol, the slide amount is τ, and the cross-correlation value c (τ) is:

(Equation 7) (30) Using the correlator output, the interpolator 719
Then, interpolation is performed from the correlator output at the interval of Ts / 2. Therefore, the synchronization timing detector 720 detects the position where the interpolated correlation value is the maximum, calculates the timing correction amount Δt, and corrects the synchronization timing.

In the fourth embodiment, the weight coefficient is calculated using the received signal of only the symbol identification point and the timing of a plurality of buffers is controlled, so that the time nTs and the time ((2n + 1) Ts) / 2 (N = 0, 1, 2,...) Can be used in common, and the hardware can be used in common. Thus, the device can be reduced in size, the amount of calculation can be reduced, and interference waves can be suppressed. In addition, correlation is obtained using the received signal in which interference waves sampled at a plurality of times are suppressed, and finer than the sampling interval, and interpolation is performed to detect more accurate synchronization timing even when an interference station exists. can do.

[0045]

As is apparent from the above description, according to the present invention, even when an interfering station is present, it is possible to detect an accurate synchronization timing while suppressing an interference wave. In addition, since the weight coefficient is shared between the received signal for every nTs and the received signal for every ((2n + 1) Ts) / 2, the amount of calculation is greatly reduced. Further, the simplification and miniaturization of the device can be achieved as compared with the conventional technology, and the convergence time can be shortened by controlling a small number of weighting factors, so that it can follow a received signal in a constantly changing propagation environment. effective.

[Brief description of the drawings]

FIG. 1 is a block diagram of a synchronization device according to a first embodiment of the present invention.

FIG. 2 is a frame format diagram according to the first embodiment of the present invention.

FIG. 3 is a schematic diagram illustrating a correlation operation according to the first embodiment of the present invention.

FIG. 4 is a block diagram of a synchronization device according to a second embodiment of the present invention.

FIG. 5 is a block diagram of a synchronization device according to a third embodiment of the present invention.

FIG. 6 is a schematic diagram illustrating interpolation and synchronization timing detection operations according to a third embodiment of the present invention.

FIG. 7 is a block diagram of a synchronization device according to a fourth embodiment of the present invention.

FIG. 8 is a block diagram of a conventional synchronization device.

[Explanation of symbols]

101, 102 Antenna 103, 104 Receiving RF unit 105, 106 A / D converter 107, 108 Switch 109 Weight coefficient control circuit 110, 111, 112, 113 Complex multiplier 114, 115 Combiner 116 Differentiator 117, 118 Correlation Unit 119 Synchronous timing detector 401, 402 Antenna 403, 404 Receive RF unit 405, 406 A / D converter 407 Weight coefficient control circuit 408, 409, 410, 411, 412 Buffer 413 Timing control circuit 414, 415 Complex multiplier 416 Synthesizer 417 Differentiator 418 Correlator 419 Synchronous timing detector 501, 502 Antenna 503, 504 Receive RF unit 505, 506 A / D converter 507, 508 Switch 509 Weight coefficient control circuit 510, 511, 512, 513 Elementary multiplier 514, 515 Combiner 516 Differentiator 517, 518 Correlator 519 Interpolator 520 Synchronous timing detector 701, 702 Antenna 703, 704 Receive RF unit 705, 706 A / D converter 707 Weight coefficient control circuit 708, 709 , 710, 711, 712 Buffer 713 Timing Control Circuit 714, 715 Complex Multiplier 716 Synthesizer 717 Differentiator 718 Correlator 719 Interpolator 720 Synchronous Timing Detector 801 802 Antenna 803 804 Reception RF Unit 805 806 A / D Converter 807 Weight coefficient control circuit 808, 809, 810, 811 Delay element 812, 813, 814, 815, 816,
817 Complex multiplier 818 Combiner 819 Decoder 820 Switch 821 Modulator 822 Differentiator

 ──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor Katsuhiko Hiramatsu 4-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. (72) Koichi Takahara Shibaura, Minato-ku, Tokyo 1-2-1 NTT Central Personal Communication Network Co., Ltd. (72) Inventor Hiroyuki Nose 1-2-1 Shibaura Minato-ku, Tokyo NTT Central Personal Communication Network Stock In company

Claims (8)

[Claims] 1. A receiving signal is multiplied by a weighting coefficient by a multiplying means, a multiplication result is added by a synthesizing means, and correlation is obtained by two sets of correlating means. Means A processes an input signal at a symbol timing interval, Synthesis means B processes an input signal at other times, a difference means obtains a difference between the output of the synthesis means A and a known signal, and a weight coefficient control means A synchronization method in which a coefficient is updated and a synchronization timing is detected from an output of the correlation unit by a synchronization timing detection unit. 2. The received signal is operated at N times the symbol timing by an A / D converter, multiplied by a weighting factor by a multiplying unit, and a multiplication result is added by a synthesizing unit. Of the symbol timing interval is held by the buffer means, the buffer is controlled by the timing control means, the difference between the synthesized signal and the known signal is obtained by the difference means, and the weight coefficient is obtained by the weight coefficient control means. And a synchronous timing detecting means for detecting a synchronous timing from an output of the correlating means. 3. A received signal is multiplied by a weighting coefficient by a multiplying means, a multiplication result is added by a synthesizing means, and a correlation is obtained by two sets of correlating means. Means A processes an input signal at a symbol timing interval, Synthesis means B processes an input signal at other times, a difference means obtains a difference between the output of the synthesis means A and a known signal, and a weight coefficient control means A synchronization method in which a coefficient is updated, an output of the correlation means is interpolated by interpolation means, and a synchronization timing is detected from an output of the interpolation means by synchronization timing detection means. 4. The received signal is operated at N times the symbol timing by an A / D converter, multiplied by a weighting factor by a multiplier, and a multiplication result is added by a synthesizer. Of the symbol timing interval is held by the buffer means, the buffer is controlled by the timing control means, the difference between the synthesized signal and the known signal is obtained by the difference means, and the weight coefficient is obtained by the weight coefficient control means. A synchronization method in which interpolation is performed by the interpolation means from the output of the correlation means, and the synchronization timing is detected by the synchronization timing detection means from the output of the interpolation means. 5. A combination of a multiplier for multiplying a received signal by a weighting coefficient, a synthesizer for adding a multiplication result, a correlator for correlating the synthesized signal with a known signal, and a symbol timing It operates N times, outputs an input signal to the combiner A at symbol timing intervals, and at other times outputs a switch to the combiner B, and updates the weight coefficient from the difference between the output of the combiner A and the known signal. A synchronization device comprising a weight coefficient control circuit and a synchronization timing detector for detecting synchronization timing from a correlator output. 6. A combination of an A / D converter operating at N times the symbol timing and a multiplier for multiplying a received signal by a weighting coefficient, a combiner for adding a multiplication result, A correlator for correlating the synthesized signal with the known signal, a buffer for holding information at symbol timing intervals, a timing control circuit for controlling the buffer, and a weighting factor for updating a weighting factor based on a difference between the synthesizer output and the known signal A synchronizing device comprising: a control circuit; and a synchronizing timing detector for detecting synchronizing timing from the correlator output. 7. A combination of a multiplier for multiplying a received signal by a weighting coefficient, a synthesizer for adding a multiplication result, a correlator for correlating the synthesized signal with a known signal, and a symbol timing It operates N times, outputs an input signal to the combiner A at symbol timing intervals, and at other times outputs a switch to the combiner B, and updates the weight coefficient from the difference between the output of the combiner A and the known signal. A synchronization device comprising a weight coefficient control circuit, an interpolator for interpolating an output of a correlator, and a synchronization timing detector for detecting a synchronization timing from the output of the interpolator. 8. A combination of an A / D converter operating at N times the symbol timing and a multiplier for multiplying the received signal by a weighting factor, a combiner for adding the multiplication result, A correlator for correlating the synthesized signal with the known signal, a buffer for holding information at symbol timing intervals, a timing control circuit for controlling the buffer, and a weight for updating a weight coefficient from a difference between the synthesizer output and the known signal A synchronizing device comprising: a coefficient control circuit; an interpolator for interpolating an output of the correlator; and a synchronizing timing detector for detecting synchronizing timing from the interpolator output.