JPH11232799A - Digital information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the deterioration of digital information caused by transmission and to make a processor small in size and light in weight as a whole. SOLUTION: The reproduced signal of an electromagnetic conversion system 14 is inputted to an error correction circuit 34. The error correction circuit 34 corrects an error caused by recording and reproducing in the electromagnetic conversion system 14 based on an error correction code added in an ECC addition circuit 12, and outputs an interpolation flag signal 35 for a correction- disable data. A adding circuit 36 adds an interpolation flag signal 35 to an output of the error correction circuit 34. An ECC adding circuit 38 adds an error correction code to output data of the adding circuit 36, and sends out it to a transmission path 26. In a receiving side, an error correction circuit 40 corrects a transmission error using an error correction code added by the ECC adding circuit 38, and outputs an interpolation flag signal 41 corresponding to the interpolation flag signal 35 and an interpolation flag signal 42 corresponding to correction disable data. The interpolation flag signals 41, 42 are applied to an adding circuit 44. A expanding circuit 30 expands output data of the error correction circuit 40. An interpolation circuit 32 interpolates an output of the expanding circuit 30 conforming to an output of the adding circuit 44.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a digital information processing apparatus.

[0002]

2. Description of the Related Art Hitherto, a transmission apparatus for compressing a digital television signal into a band and recording the signal on a magnetic tape, recompressing a band of a reproduction signal of the magnetic tape and sending the signal to a transmission line is known. FIG. 2 shows an example of the configuration. In FIG. 2, a digital television signal is supplied to a band compression circuit 1.
The band is compressed by 0 and applied to an error correction code (ECC) adding circuit 12. The error correction addition circuit 12 adds an error correction code for detecting and correcting an error accompanying recording and reproduction. The output of the ECC addition circuit 12 is supplied to an error correction circuit 16 via an electromagnetic conversion system 14 including a magnetic head and a magnetic recording medium. The error correction circuit 16 uses the error correction code added by the ECC addition circuit 12 to correct errors due to recording and reproduction in the electromagnetic conversion system 14. The error correction circuit 16 outputs an interpolation flag signal 17 when the correction is impossible. The expansion circuit 18 subjects the output of the error correction circuit 16 to expansion processing that is the reverse of the band compression processing of the band compression circuit 10. Is interpolated. The circuits 10 to 20 are so-called digital VT
The output of the interpolation circuit 20 is a normal digital television signal.

The output of the interpolation circuit 20 is applied to a band compression circuit 22 for transmission, where it is band-compressed,
Error correction code (ECC) for transmission in the C adding circuit 24
Is added. Band compression circuit 22 and ECC addition circuit 2
Reference numeral 4 corresponds to a coder of a so-called codec (CODEC).

The output data of the ECC adding circuit 24 is input to an error correcting circuit 28 on the receiving side via a transmission line 26.
The error correction circuit corrects the transmission error according to the error correction code added by the ECC addition circuit. If the error cannot be corrected, the error correction circuit 28 outputs an interpolation flag signal 29. The decompression circuit 30 receives the output of the error correction circuit 28,
The interpolation circuit 32 performs an expansion process corresponding to the band compression process in the band compression circuit 22, and interpolates the uncorrectable data portion according to the interpolation flag signal 29 from the error correction circuit 28. The circuits 28 to 32 correspond to the decoder section of the codec, and the output of the interpolation circuit 32 is a digital television signal.

[0005]

However, in the conventional example,
Interpolation of data errors occurring in the electromagnetic conversion system 14 and the transmission path 26 is performed separately, and two interpolation circuits 20 and 32 are used.
is necessary. Further, the compressed data is temporarily expanded by the expansion circuit 18 in order to perform the interpolation by the interpolation circuit 20, and the band is compressed again by the band compression circuit 22 for data transmission.

As described above, in the conventional example, due to the system configuration,
There is a lot of waste, and thus the apparatus tends to be large and expensive.

Accordingly, an object of the present invention is to present a digital information processing apparatus having a simpler configuration.

[0008]

According to the present invention, there is provided a digital information processing apparatus comprising: input means for inputting digital information and flag information indicating whether or not an error code exists in the digital information; And an output unit for outputting the digital information processed by the addition unit and the flag information.

[0009]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 1, the same components as those in FIG. 2 are denoted by the same reference numerals. Band compression circuit 10, ECC addition circuit 1
2 and the electromagnetic conversion system 14 are the same as those in FIG. The reproduction output of the electromagnetic conversion system 14 is input to an error correction circuit 34. The error correction circuit 34 corrects an error due to recording and reproduction in the electromagnetic conversion system 14 according to the error correction code added by the ECC addition circuit 12, and cannot correct the error. The interpolation flag signal 35 is output for the data of. The adder circuit 36 adds, for example, an interpolation flag signal 35 to a predetermined amount of data output from the error correction circuit 34, for example. ECC
The adding circuit 38 adds an error correction code to the data from the adding circuit 36 and sends out the data to the transmission line 26.

On the receiving side, the data transmitted on the transmission line 26 is input to an error correction circuit 40, which
The transmission error is corrected using the error correction code added by the CC addition circuit 38. The error correction circuit 40 also outputs an interpolation flag signal 41 corresponding to the interpolation flag signal 35 and outputs an interpolation flag signal 42 for uncorrectable data. The interpolation flag signals 41 and 42 are applied to an adding circuit 44. The addition circuit 44 logically functions as an OR circuit, and applies the flag signal to the interpolation circuit 32 when either interpolation flag signal 41 or 42 indicates the necessity of interpolation.

The expansion circuit 30 performs expansion processing corresponding to the band compression processing in the band compression circuit 10 on the output data of the error correction circuit 40. The interpolation circuit 32 includes the addition circuit 4
In accordance with the output of No. 4, interpolation processing is performed on the output of the decompression circuit 30.

Since the error rate on the transmission line 26 is usually very small, even if the interpolation flag signal output from the error correction circuit 34 is transmitted via the transmission line 26, an error may occur during the transmission. And image quality degradation due to the transmission error of the interpolation flag signal is hardly considered.

In the above embodiment, the image signal is transmitted. However, the present invention is not limited to the image signal, but can be applied to a system for transmitting another information signal such as an audio signal as digital data. Not even.

[0015]

As can be easily understood from the above description, according to the present invention, it is possible to prevent digital information from deteriorating due to transmission and to reduce the size and weight of the entire apparatus.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of an embodiment of the present invention.

FIG. 2 is a configuration block diagram of a conventional example.

[Explanation of symbols]

 10: Band compression circuit 12, 38: Error correction code addition circuit 14: Electromagnetic conversion system 18, 30: Decompression circuit 20, 32: Interpolation circuit 26: Transmission line 34, 40: Error correction circuit 35, 41, 42: Interpolation flag Signal 36: Adder circuit

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H04N 5/92 H04N 5/92 H 7/24 7/13 A

Claims (2)

[Claims] An input unit for inputting digital information and flag information indicating whether or not an error code exists in the digital information; and an addition unit for adding an error check code to the digital information input by the input unit. Means for outputting digital information processed by the adding means and the flag information. 2. The apparatus according to claim 1, wherein the adding unit adds an error check code to the flag information together with the digital information.
2. The digital information processing apparatus according to claim 1.