JPH11225252A - Image reader - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the image quality by stabilizing a CCD drive voltage. SOLUTION: A clock driver 23 outputs a timing signal to drive a CCD 21, based on another timing signal outputted from a timing signal generating section 22. A dummy load 32 connects with an output line of an excess circuit of the clock driver 23. The clock driver 23 outputs a timing signal 'DMY', based on another timing signal '/DMY' outputted from the timing signal generating section 22 when supply of the timing signals 'ϕ1', 'ϕ2' to the CCD 21 takes a short break, so that the dummy load 32 is driven with a power supply consumed so as to supplement a deficient amount of power consumption of the clock driver 23.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus for reading an image with a photoelectric conversion device.

[0002]

2. Description of the Related Art Japanese Patent Application Laid-Open No. Hei 7-131691 discloses that during a period when a load (CCD imaging device) becomes heavy (return line period),
Activate auxiliary power supply to prevent voltage drop,
A technology for stably supplying power to a D imaging device has been disclosed.

[0003]

The driving of the CCD image pickup apparatus is generally performed by a clock driver repeatedly supplying a clock signal for a certain period of time and stopping the clock signal for another predetermined period of time. During this short pause, the load on the clock driver becomes lighter, and the power supply voltage of the clock driver rises. And when the clock signal starts to be supplied again, the load suddenly increases,
As a result, the power supply of the clock driver fluctuates, so that the clock voltage for driving the CCD image pickup device fluctuates, not at a constant voltage.

In recent years, the CCD image pickup device has also been driven at a high speed. Therefore, the convergence of the above-mentioned fluctuation of the voltage is suppressed until the period of the OPB indicated by the symbol B in FIG. May hang. FIG. 8 shows C
The signal "/ SH" input to the clock driver to generate a gate signal for transferring the charge accumulated in the photoresist element of the CD imaging device to the shift register
(The gate signal is an inverted signal “S” of the signal “/ SH”.
H ") and output data of the CCD image pickup device, wherein A of the output data is a period of an invalid pixel, D is a period of an idle transfer pixel, and the clock voltage as described above. Fluctuations also fluctuate the output voltage of the CCD image pickup device, causing a problem that the S / N ratio (image quality) is deteriorated.

[0005] On the other hand, the above-mentioned conventional technique has a load (C
(CCD imaging device) is a means for stabilizing the driving voltage due to the increase in the weight, and as described above, the clock signal for driving the CCD imaging device is paused, that is, the load is reduced. It is not possible to cope with the instability of the driving voltage caused by the above.

An object of the present invention is to provide an image reading apparatus capable of stabilizing a driving voltage for driving a photoelectric conversion device and improving image quality.

Another object of the present invention is to provide an image reading apparatus which can realize the above-described improvement in image quality with a simple circuit configuration.

[0008]

According to a first aspect of the present invention, there is provided a light source for irradiating a document with light, a photoelectric conversion device for receiving reflected light from the document, photoelectrically converting the light, and outputting the analog image signal as an analog image signal; A first driving device that supplies a driving signal to the photoelectric conversion device to drive the photoelectric conversion device, a power supply of the first driving device, and a first driving device that outputs the driving signal when the first driving device is stopped. A dummy load for consuming the power so as to compensate for the shortage of the power consumption.

Therefore, when the output of the drive signal to the photoelectric conversion device is stopped, the dummy load consumes power so as to compensate for the shortage of consumption, so that the load on the first drive device is reduced. However, the power supply voltage does not rise. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again.

According to a second aspect of the present invention, the load is a dummy load that receives power from a power supply in a different system from a line that outputs a drive signal from the first drive device to the photoelectric conversion device, It is assumed that the apparatus includes a second driving device that supplies the power when the output of the drive signal is stopped, and stops the supply of the power when the output of the drive signal is performed. It is.

Therefore, when the output of the drive signal to the photoelectric conversion device is stopped, the second drive device supplies power from the power supply to the dummy load so as to compensate for the shortage of consumption. It is possible to consume power. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again.

According to a third aspect of the present invention, in the first driving device, when the output of the driving signal is paused, a transfer signal for transferring the charge accumulated in the photoelement by the photoelectric conversion device to the shift register is provided. The dummy load is connected to an output line of the transfer signal and consumes a part of the current flowing through the output line.

Therefore, if the transfer signal is output from the first drive device while the output of the drive signal to the photoelectric conversion device is stopped, a part of the transfer signal is transferred from the power supply by the second drive device. By supplying power to the dummy load, it is possible to consume power so as to supplement the shortage of consumption. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again.

Further, by using the existing first driving device and connecting an appropriate load to the output line of the transfer signal, the fluctuation of the power supply can be prevented.

According to the fourth aspect of the invention, the current consumption of the power supply is substantially the same when the drive signal is output and when the drive signal is stopped.

Accordingly, it is possible to effectively prevent the power supply from swaying due to a sudden increase in the load when the drive signal is supplied again after the stop of the drive signal.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment of the Invention] FIG.
1 is a vertical sectional front view showing an outline of an entire image reading apparatus 1 according to a first embodiment of the present invention. As shown in FIG. 1, the image reading apparatus 1 includes a contact glass 2 on which an original G is placed, and a uniform density provided in the main scanning direction of the original G in order to obtain correction data for shading correction. A white reference plate 3 which is a white member, and a light source 4 which irradiates the reading surface at an angle with respect to the white reference plate 3 or the surface of the contact glass 2 are provided. The light source 4 and the mirrors 5, 6, 7 are connected by a motor 11 to
The second carriage moves in the sub-scanning direction. White reference plate 3
Alternatively, the light reflected by the document G is reflected by mirrors 5, 6, and 7 and enters the CCD substrate 9 via the lens 8. C
The CD substrate 9 photoelectrically converts the incident optical image signal and outputs an analog image signal after the photoelectric conversion to the image processing unit 10. The image processing unit 10 performs predetermined image processing on the input analog image signal.

The circuit shown in FIG. 2 is mounted on the CCD substrate 9. As shown in FIG. 2, this circuit is an example of the photoelectric conversion device of the present invention, and includes a CCD 21 which photoelectrically converts an incident optical image signal into an analog image signal.
It includes a timing signal generating section 22 for generating a timing signal for driving the CD 21 and the like, a clock driver 23 which is an example of the first driving device of the present invention and drives the timing signal, and the like.

That is, the timing signal generation unit 22
Timing signals “/ φ1”, “/
φ2 ”,“ / RS ”, and“ / SH ”are generated and output to the clock driver 23. The clock driver 23 is driven by the power supply Vcc (which realizes an example of the power supply of the present invention). , The timing signals “/ φ1”, “/ φ
2 "," / RS "and" / SH ", and the timing signals" .phi.1 "," .phi.2 "," RS "and" SH "are supplied to the CCD via the damping resistors 24, 25, 26 and 27.
21. Note that the timing signals “φ1” and “φ
2 ”,“ RS ”, and“ SH ”correspond to the timing signal“ / φ
1 "," / φ2 "," / RS ", and" / SH ", and the damping resistors 24, 25, 26, and 27.
Are interposed to suppress ringing or to suppress unnecessary radiation of radio waves.

The timing signal "SH" is a gate signal for transferring charges accumulated in the photo element of the CCD 21 to the shift register.
“Φ2” is a drive clock signal for the shift register, and a timing signal “RS” is a reset clock signal for the output section of the CCD 21.

As shown in FIG. 4, the timing signal "/ φ
1 ”,“ / φ2 ”, and“ / RS ”correspond to the timing signal“ /
SH ”is at L level (timing signal“ SH ”
Is an inverted signal of the timing signal “/ SH”,
(H level period) and a predetermined period before and after this period, a small pause is performed, and in the other periods, driving is performed at a constant predetermined frequency. These timing signals “/ φ1”, “/ φ2”, “/
RS "is an example of the drive signal of the present invention.

Here, the input capacitance of each terminal of the CCD 21 is several tens pF for the SH terminal 28 and the RS terminal 29, and several hundred pF for the φ1 terminal 30 and the φ2 terminal 31. During the period when the clock driver 23 drives a heavy load of the timing signals “/ φ1” and “/ φ2” at a constant frequency,
The power supply voltage of the clock driver 23 depends on the capacitance value of the decoupling capacitor, but drops by a certain voltage. On the other hand, the timing signals “/ φ1”, “/ φ1”
When "2" pauses, a heavy load is not driven, so that the power consumption of the power supply of the clock driver 21 is small, and the power supply voltage is high (the waveform of the power supply voltage in this case is shown in FIG. And the timing signal “/ φ1”,
When “/ φ2” and “/ RS” start to be driven at a constant frequency, the load suddenly increases.
The power supply 1 also fluctuates, and the clock voltage for driving the CCD 21 also fluctuates. This fluctuation of the clock voltage is caused by the CCD2
1 also fluctuates to degrade the S / N ratio (image quality).

Therefore, the image reading apparatus 1 employs the following means. That is, as shown in FIG. 2, the dummy load 32 is connected to the remaining circuit of the clock driver 23, the timing signal generator 22 generates the timing signal “/ DMY”, and outputs the generated signal to the clock driver 23. The timing signal “DMY” (which is an inverted signal of the timing signal “/ DMY”) is transmitted from the clock driver 23 to the timing signals “φ1” and “φ
2 ”and“ RS ”are output in a different system from the dummy load 32.
(Thus, the clock driver 23 realizes an example of the second driving device of the present invention).

FIG. 3 shows a specific example of the dummy load 32. The example of FIG. 3A is an RC charging circuit in which a resistor 33 and a capacitor 34 are connected in series (hereinafter, the first dummy load 32). The example of (b) is based on the resistor 35 (hereinafter, referred to as the second dummy load 32).

As shown in FIG. 4, the timing signal "DMY" for driving the first dummy load 32 is the timing signal "/ DMY" during the period when the timing signals "φ1" and "φ2" are paused. By outputting to the clock driver 23, it is output to the first dummy load 32. Thereby, the first dummy load 32 repeatedly charges and discharges the capacitor 34 and consumes the power supply voltage of the clock driver 23. Then, the timing signal “φ1” and “φ2” which are the driving signals of the CCD 21 are paused by setting the capacitor 34 to a load equivalent to the load driven by the timing signals “φ1” and “φ2”. Even during periods other than the above, the current consumption of the power supply of the clock driver 23 is substantially the same as when the timing signals “φ1” and “φ2” are output. In this way, it is possible to supply power to the dummy load 32 from the power supply of the clock driver 23 and to consume the power so as to compensate for the shortage of consumption, whereby the timing signal is again supplied. It is possible to effectively prevent the power supply from fluctuating due to a sudden increase in the load when the supply of “φ1” and “φ2” is started, and the waveform of the power supply voltage in this case is shown in FIG. So flat.

When the second dummy load 32 is used, when the timing signals “φ1” and “φ2” are paused,
The timing signal “DM” output from the clock driver 23
Y so that the timing signal “/ DM” becomes H level.
Y ″ is input, a current flows through the resistor 35 to consume the power supply voltage of the clock driver 23. Since the current consumption value of the second dummy load 32 depends on the resistance value of the resistor 35, this resistance value is By properly determining, CCD2
1 timing signals “φ1” and “φ2”
Can be consumed so that the current consumption of the power supply of the clock driver 23 is almost the same as when the timing signals "φ1" and "φ2" are output even during periods other than the short pause.

[Second Embodiment of the Invention] Next, a second embodiment of the present invention will be described. In this embodiment, items common to the first embodiment are as follows.
The same reference numerals are given and detailed description is omitted.

As shown in FIG. 5, the image reading apparatus 1 of this embodiment is different from the first embodiment in that
One end of the resistor forming the dummy load 32 is connected to the clock driver 2.
3 in that the dummy load 32 is directly driven by the switching element 36. That is, the other end of the dummy load 32 is connected to the collector of the switching element 36, the timing signal generator 22 generates a timing signal “DMY”, and outputs this to the base of the switching element 36, so that the clock driver 23 Are consumed by the dummy load 32. That is,
As shown in FIG. 6, the timing signals “φ1”, “φ2”
, The H level signal, that is, the timing signal “DMY” may be applied to the base of the switching element 36. Then, the timing signal “φ1”,
The dummy load 32 is set so that the current consumption is substantially the same between the period in which “φ2” is slightly paused and the other period.
May be determined.

In this way, it is possible to effectively prevent the power supply from swaying due to a sudden increase in load when the timing signals “φ1” and “φ2” are supplied again.

[Third Embodiment of the Invention] Next, a third embodiment of the present invention will be described. In this embodiment, items common to the first embodiment are as follows.
The same reference numerals are given and detailed description is omitted.

As shown in FIG. 7, the image reading apparatus 1 of this embodiment differs from the first and second embodiments in that
The output line of the drive signal of the CCD 21 and the dummy load 32 are of the same system. That is, the position of the output line 28a of the timing signal SH, which is an example of the transfer signal of the present invention, on the clock driver 23 side with respect to the damping resistor 27,
A dummy load 32, which is a resistor, is interposed between this terminal and GND. During most of the period in which the timing signals “φ1” and “φ2” are paused, the timing signal SH is at the H level. Even when the timing signal SH is at the L level before and after the period during which the timing signal is at the H level, as shown in FIG.
b exists. However, each of the periods a and b is usually about several hundred ns, and is generally shorter than the period when the timing signal SH is at the H level.

Therefore, the timing signals "φ1", "φ1"
Approximately during the period when “2” pauses, dummy load 3
2 consumes power supply current, the periods a and b
In addition, the fluctuation of the reduced source voltage of the clock driver 23 due to the reduction of the load of the timing signals “φ1” and “φ2” only needs to be at an allowable level. To satisfy this, decoupling may be performed.

In this way, it is possible to effectively prevent the power supply from fluctuating due to a sudden increase in the load when the timing signals "φ1" and "φ2" are supplied again.

Since the existing clock driver 23 and the timing signal generator 22 are used as they are, and neither the circuit for generating the timing signals “/ DMY” and “DMY” nor the switching element 36 is required, The circuit configuration can be simplified as compared with the second embodiment.

[0035]

According to the first aspect of the present invention, when the output of the drive signal to the photoelectric conversion device is stopped, the dummy load consumes the power so as to supplement the shortage of consumption.
Even if the load on the first driving device is reduced, the power supply voltage does not increase. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again. Therefore, the drive voltage for driving the photoelectric conversion device is stabilized,
Image quality can be improved.

According to a second aspect of the present invention, in accordance with the first aspect of the present invention, when the output of the drive signal to the photoelectric conversion device is stopped, the second drive device causes the power supply to switch from the power supply to the dummy load. By supplying power, power can be consumed so as to supplement the shortage of consumption. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again. Therefore, the driving voltage for driving the photoelectric conversion device can be stabilized, and the image quality can be improved.

According to a third aspect of the present invention, in accordance with the first aspect of the present invention, when the output of the drive signal to the photoelectric conversion device is stopped, the transfer signal is output from the first drive device. A part of the power is supplied from the power supply to the dummy load by the second driving device, and the power can be consumed so as to compensate for the shortage of consumption. As a result, it is possible to prevent the power supply from swinging due to a sudden increase in the load when the supply of the drive signal is started again. Therefore, the driving voltage for driving the photoelectric conversion device can be stabilized, and the image quality can be improved.

Further, by using the existing first drive device and connecting an appropriate load to the output line of the transfer signal, the fluctuation of the power supply can be prevented. Therefore, an improvement in image quality can be realized with a simple circuit configuration.

The invention according to claim 4 is the invention according to claims 1, 2,
In the invention according to any one of the aspects 3, it is possible to effectively prevent the power supply from swaying due to a sudden increase in load when the drive signal is supplied again after the stop of the drive signal.

[Brief description of the drawings]

FIG. 1 is a vertical sectional front view showing an outline of an entire image reading apparatus according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a circuit mounted on a CCD substrate of the image forming apparatus.

FIG. 3 is a circuit diagram of an example of a dummy load mounted on the CCD substrate, wherein FIG.
(b) is due to the resistance.

FIG. 4 is a timing chart of a timing signal output to a CCD or a dummy load by a clock driver mounted on the CCD substrate and a fluctuation of a power supply voltage of the clock driver.

FIG. 5 is a circuit diagram of a circuit mounted on a CCD substrate of the image reading device according to the second embodiment of the present invention;

FIG. 6 is a timing chart of a timing signal output from a clock driver mounted on the CCD substrate to a CCD or a dummy load and a fluctuation of a power supply voltage of the clock driver.

FIG. 7 is a circuit diagram of a circuit mounted on a CCD substrate of an image reading apparatus according to a third embodiment of the present invention.

FIG. 8 is a timing chart of a timing signal output to a CCD by a clock driver mounted on the CCD substrate.

FIG. 9 shows a signal “/ SH” input to a clock driver and output data of a CCD image pickup device for generating a gate signal for transferring charges accumulated in a photoresist element of a conventional CCD image pickup device to a shift register. It is a timing chart.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Image reading device 4 Light source 21 Photoelectric conversion device 23 First and second drive devices 32 Dummy load 32a Output line G Document φ1, φ2 Drive signal SH transfer signal

Claims (4)

[Claims] 1. A light source for irradiating a document with light, a photoelectric conversion device for receiving reflected light of the document, photoelectrically converting the reflected light to output an analog image signal, and supplying a drive signal to the photoelectric conversion device for driving. A first driving device, a power supply of the first driving device, and a controller configured to replenish a shortage of the power consumption of the first driving device when the output of the driving signal is stopped. An image reading apparatus comprising: a dummy load consuming power. 2. The dummy load receives power from a power supply in a different system from a line for outputting a drive signal from the first drive device to the photoelectric conversion device, and the output of the drive signal is stopped. 2. The image reading apparatus according to claim 1, further comprising a second driving device that supplies the power when the driving is performed, and stops the supply of the power when the driving signal is output. 3. 3. The first driving device outputs a transfer signal for transferring the charge accumulated in the photoelement in the photoelectric conversion device to the shift register to the photoelectric conversion device when the output of the driving signal is paused. The image reading apparatus according to claim 1, wherein the dummy load is connected to an output line of the transfer signal and consumes a part of a current flowing through the output line. . 4. The image reading device according to claim 2, wherein the power consumption of the power supply is substantially the same between when the drive signal is output and when the drive signal is stopped. apparatus.