JPH11218900A - Method and device for correcting mask pattern - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a mask pattern correcting method capable of reducing the load on designer at the time of simulating the correction work of a mask pattern. SOLUTION: Parameters including a mask bias parameter for indicating the enlarging or reducing ratio of the pattern size of a mask pattern and design patterns are inputted (S11), a new design pattern is generated by applying inversion processing and rotation processing to a pattern included in the inputted design patterns in each cell unit at need (S12), a transfer image obtained by executing exposure under a prescribed transfer condition is simulated by using a mask pattern generated from the design patterns (S19), and the mask pattern is corrected based on an evaluation result (S21).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask pattern correcting method and apparatus for correcting a mask pattern of a photomask used for manufacturing, for example, a semiconductor device, and a photomask manufacturing apparatus and a photomask manufacturing apparatus using the correcting method. Regarding the method.

[0002]

2. Description of the Related Art Memory and ASIC (Application-Specifi
The process of transferring a mask pattern to a resist material on a semiconductor wafer using light in the manufacture of semiconductor devices such as c integrated circuits) is called a photolithography process. In recent years, with miniaturization of semiconductor devices, design rules have become finer, and lithography processes have been performed near the limit of theoretical resolution. For this reason, there is a problem that the resolution becomes insufficient, and the influence of the difference between the mask pattern and the resist pattern obtained by transferring the mask pattern with the exposure apparatus using the mask pattern increases. As a result, problems such as deterioration of device characteristics due to deformation of the transfer pattern and reduction in yield due to bridge or disconnection of the pattern are caused. Therefore, in order to obtain a desired resist pattern, a mask pattern is subjected to a trial and error process in consideration of an increase in a process margin, a conversion difference in a processing process, and the like. That is, pattern deformation due to light interference or insufficient resolution of the resist is corrected by deforming the mask pattern.

[0003] Among these correction processes, for example, there is a process in which the pattern size is uniformly increased or decremented uniformly while the pattern arrangement is maintained, and only the size is changed.

[0004] Incidentally, the generation of the above-mentioned mask pattern has been conventionally performed using an optical lithography simulator. This optical lithography simulator outputs a transfer pattern according to the input mask pattern. The designer deforms the mask pattern input to the optical lithography simulator so as to obtain a desired transfer pattern while viewing the output transfer pattern.

[0005]

However, in the above-described conventional optical lithography simulator, the only function of the simulation is to output a transfer pattern corresponding to the input mask pattern. A process such as generating a mask pattern or deforming a line width of the mask pattern cannot be performed. Therefore, when changing the mask pattern itself or changing the line width, it is necessary for the designer to generate a new mask pattern with a modified line width and input this new mask pattern to the optical lithography simulator. is there. Here, there is a problem that generation of the mask pattern is very troublesome, and the burden on the designer is very large.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems of the prior art, and has a mask pattern correction method and apparatus, and a simulation apparatus and method, which can reduce the burden on a designer when simulating a case where a mask pattern is corrected. And a photomask manufacturing apparatus using the correction method.

[0007]

In order to solve the above-mentioned problems of the prior art and achieve the above-mentioned object, a method of correcting a mask pattern according to the present invention uses a mask pattern of a photomask used in a photolithography process. Is a method of correcting a mask pattern that corrects a transfer image close to the design pattern by inputting the design pattern,
A new pattern is generated by performing at least one of inversion processing, rotation processing, and reflection processing on the pattern in the input design pattern as needed, and a design pattern including the new pattern is generated. A plurality of evaluation points are added along the pattern periphery of the designed pattern, a mask pattern is generated from the design pattern to which the evaluation point is added, and exposure is performed under predetermined transfer conditions using the generated mask pattern. Is performed, a difference between the simulated transfer image and the design pattern is evaluated for each of the plurality of evaluation points, and the generated image is generated based on the evaluation result. Correct the mask pattern.

[0008] A mask pattern simulation method according to the present invention is a mask pattern simulation method for simulating a mask pattern of a photomask used in an optical lithography step. A new pattern is generated by performing at least one of inversion processing, rotation processing, and reflection processing as necessary on the pattern in the pattern, and a design pattern including the new pattern is generated, from the generated design pattern Generate a mask pattern, simulate a transfer image obtained when performing exposure under predetermined transfer conditions using the generated mask pattern, and calculate a difference between the simulated transfer image and the design pattern. Evaluate based on

Further, the mask pattern correcting apparatus of the present invention is a mask pattern correcting apparatus for correcting a mask pattern of a photomask used in a photolithography process so as to obtain a transfer image close to a design pattern. Input means for inputting a design pattern, and inversion processing as necessary for a pattern in the input design pattern,
Arranging means for performing at least one of rotation processing and reflection processing to generate a new pattern and generating a design pattern including the new pattern; and a plurality of evaluation points along a pattern outer periphery of the generated design pattern. Evaluation point adding means for adding a mask pattern, mask pattern generating means for generating a mask pattern from the design pattern to which the evaluation point is added, and exposure performed under predetermined transfer conditions using the generated mask pattern. Simulation means for performing a simulation of the transfer image obtained in, a difference between the simulated transfer image and the design pattern, evaluation means for evaluating each of the plurality of evaluation points,
Correction means for correcting the generated mask pattern based on the result of the evaluation.

A mask pattern simulation apparatus according to the present invention is a mask pattern simulation apparatus for simulating a mask pattern of a photomask used in an optical lithography process, comprising: input means for inputting a design pattern; An arrangement unit that performs at least one of inversion processing, rotation processing, and reflection processing as necessary on a pattern in the design pattern that has been generated to generate a new pattern, and generates a design pattern including the new pattern; Mask pattern generation means for generating a mask pattern from the generated design pattern, using the generated mask pattern, simulation means for simulating a transfer image obtained when performing exposure under predetermined transfer conditions, Simulated transcription It has a image, and an evaluation means for evaluating, based on the difference between the design pattern.

Further, the photomask manufacturing apparatus of the present invention corrects a mask pattern of a photomask used in a photolithography process so as to obtain a transfer image close to a design pattern, and uses the corrected mask pattern. A photomask manufacturing apparatus that performs drawing of a photomask, comprising: input means for inputting a design pattern; and at least one of an inversion process, a rotation process, and a reflection process for a pattern in the input design pattern as necessary. Performing a new pattern to generate a design pattern including the new pattern, an arrangement means for adding a plurality of evaluation points along a pattern periphery of the generated design pattern, Mask pattern generation means for generating a mask pattern from a design pattern to which evaluation points are added; Using a mask pattern, and simulation means for simulating the transfer image obtained when exposure was performed at a predetermined transfer condition,
An evaluation unit that evaluates a difference between the simulated transfer image and the design pattern for each of the plurality of evaluation points, a correction unit that corrects the generated mask pattern based on a result of the evaluation, Drawing means for drawing a photomask of the corrected mask pattern.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical lithography simulator according to an embodiment of the present invention will be described below. First Embodiment FIG. 1 shows an optical lithography simulator 1 of this embodiment .
FIG. As shown in FIG. 1, an optical lithography simulator 1 includes an input unit 2, an arrangement unit 3, a mask bias unit 4, an acute angle processing unit 5, a mask error detection unit 6, a mask corner rounding unit 7, a simulation unit 8, an evaluation unit. 9, an output unit 10 and a recording unit 11. FIG. 2 is a configuration diagram of an arithmetic processing system 31 that realizes the optical lithography simulator 1 shown in FIG. As shown in FIG. 2, the arithmetic processing system 31 includes:
The CPU 33, the ROM 34, the RAM 35, the V
(Video) RAM 36, timer 37, CRT (Cathode-
Ray-Tube) Controller 38, Printer interface 39, HDD (Hard Disc Drive) interface 4
0, CD-ROM interface 41, FDD (Flopp
y Disc Drive) interface 42, a mouse interface 43, a keyboard interface 44, and a network interface 45.

A CRT 46 is connected to the CRT controller 38. The printer 47 is connected to the printer interface 39. The HDD 48 is connected to the HDD interface 40. CD-ROM
A CD-ROM 49 is connected to the interface 41. The FDD interface 42 has an FDD 50
Is connected. The mouse 51 is connected to the mouse interface 43. The keyboard 52 is connected to the keyboard interface 44. A network line 53 is connected to the network interface 45.

Here, the input means 2 shown in FIG. 1 is realized by the FDD 50, the mouse 51, the keyboard 54 and the network line 53 shown in FIG. The output unit 10 shown in FIG. 1 is realized by the CRT 46 and the printer 47 shown in FIG. Recording means 1 shown in FIG.
1 is a ROM 34, a RAM 35, and a VRAM 3 shown in FIG.
6, realized by the HDD 48 and the CD-ROM 49. The arrangement means 3, mask bias means 4, acute angle processing means 5, mask error detection means 6, mask corner rounding means 7, simulation means 8 shown in FIG.
The evaluation means 9 is realized, for example, by the CPU 32 executing a program read from the ROM 34 shown in FIG.

Hereinafter, the processing of the optical lithography simulator 1 will be described. FIG. 3 is a flowchart of the process of the optical lithography simulator 1. Step S1: The photolithography simulator 1 inputs a design pattern, an exposure parameter, and a mask parameter via the input unit 2 shown in FIG. .

The following are the exposure parameters. (1) lambda indicating an exposure wavelength (μm) (2) NA indicating a lens numerical aperture, σ indicating an apparent size of a light source (3) focus indicating a focus position (μm) (4) exposure indicating an exposure amount 5) resist indicating the resist process factor
_Factor, which is used when approximating a resist process by performing a convolution with a Gaussian function having the value as a standard deviation with respect to the light intensity distribution. (6) is (7) ring indicating slice level in exposure Annular_ indicating the ratio of the annular zone when using zonal lighting
ratio (8) halftone_annular indicating the intensity of the light source inside the annular zone when using the halftone annular zone illumination (9) spherical indicating the spherical aberration (10) coma indicating the coma (11) astigmatism indicating the astigmatism (12) distortion (13) curvature indicating field curvature (14) m indicating position (image height) of pattern in mask
ask_position (15) flex_pit indicating the pitch of FLEX exposure
There is a channel.

The mask parameters include the following. (A) pattern showing intensity transmittance of mask pattern
n_transmittance (B) bac indicating the intensity transmittance of the background of the mask pattern
kground_transmittance (C) design_ph indicating the phase of the mask pattern
design_g indicating the design grid of the (D) pattern
rid The design_grid is set in units on the wafer. (E) Mask indicating mask pattern bias (μm)
_Bias The mask_bias is set in units on the wafer. (F) prop_length indicating the length (μm) of a side to be added when removing an acute angle The prop_length is set in units on a wafer. (G) mask_er indicating a mask line width error (μm)
The mask_error is set in units on the wafer. (H) mask_corner_rounding indicating the corner rounding (μm) of the mask The mask_corner_rounding is set in units on the wafer. (I) There is an OPC (Optical Proximity Correction: Optical Proximity Correction) indicating whether or not the optical proximity effect correction is applied. here,
When the mask parameter OPC is on, it indicates that OPC is performed, and when it is off, it indicates that OPC is not performed.

Step S2: The photolithography simulator 1 sets a cell area for a design pattern (basic pattern) in the arranging means 3 shown in FIG. A rotation process rotation as shown in FIG.
n_x, rotation processing rotiti as shown in FIG.
on_y, a rotation process rotat as shown in FIG.
ion_c, reflection processing mirr as shown in FIG.
or_x, reflection processing mirro as shown in FIG.
r_y, inversion process reverses as shown in FIG.
e_x, inversion process reverses as shown in FIG.
An arrangement process such as e_y is performed to generate a desired mask pattern. The placement processing is automatically performed based on the size of the cell area so that the new cell area on which the rotation processing, the inversion processing, and the reflection processing have been performed is appropriately arranged in the design pattern.

More specifically, as shown in FIG. 4A, in the rotation process rotation_x, a cell region 60b including patterns 70a and 70b is generated from a cell region 60a including a pattern 70a. Further, as shown in FIG. 4B, in the rotation process rotation_y, the pattern 7
From the cell region 61a including the pattern 1a, patterns 71a and 71
Then, a cell region 61b containing b is generated. FIG. 4 (C)
As shown in the figure, in the rotation process rotation_c, the pattern 72 is shifted from the cell region 62a including the pattern 72a.
A cell region 62b including the cells a and 72b is generated.

As shown in FIG. 5A, the reflection processing mir is performed.
In lor_x, the cell region 63a including the pattern 73a
Then, a cell region 63b including the patterns 73a and 73b is generated. In addition, as shown in FIG.
In the error_y, the cell region 6 including the pattern 74a
4a, the cell region 64 including the patterns 74a and 74b
Generate b. As shown in FIG. 5C, the inversion processing re
In the version_x, the cell region 6 including the pattern 75a
5a, the cell region 65 including the patterns 75a and 75b
Generate b. As shown in FIG. 5D, the inversion processing re
In the case of reverse_y, the cell region 6 including the pattern 76a
6a, the cell region 66 including the patterns 76a and 76b
Generate b.

The mask pattern and the design pattern are obtained by using a grid obtained by dividing a wafer in units of a calculation area for performing a numerical calculation, using a mask parameter de.
Specified (grid) by sign_grid.

For example, as shown in FIG. 6, a rotation process rotation_c is performed on a cell region 80 including patterns 81a and 81b in a design pattern, and a cell region 82 including a total of four patterns 81a and 81b is masked. Generate within the pattern. Next, reflection processing mirror_x is performed on the cell region 82, and a total of eight patterns 8
A cell region 83 including 1a and 81b is generated in the mask pattern. Next, the reflection process mi is performed on the cell region 83.
rr_y, and a total of 16 patterns 81a, 8
A cell region 84 including 1b is generated in the mask pattern.

Step S3: The optical lithography simulator 1 uses the mask bias means 4 shown in FIG.
Mask parameter mask_b input in step S1
A bias process is performed on the mask pattern generated in step S2 at a magnification based on ias. Specifically, the mask pattern generated in step S2 is enlarged (incremented) or reduced (decremented). At this time,
A bias process is performed on all edges (boundary lines) of the mask pattern, on condition that it is specified by the mask parameter design_grid. In the bias processing, the mask parameter mask_bias
Is a positive value, the mask pattern is enlarged; if the value is negative, the mask pattern is reduced; if it is zero, neither the expansion nor the reduction is performed on the mask pattern.

Step S4: The optical lithography simulator 1 uses the acute angle processing means 5 shown in FIG. 1 to remove an acute angle existing in the mask pattern obtained in step S3 with the length of the side indicated by the mask parameter prop_length.

Step S5: The optical lithography simulator 1 uses the mask error detecting means 6 shown in FIG. 1 to generate a mask pattern in which a line width error indicated by the mask parameter mask_error has occurred in the mask pattern obtained in step S4. I do. At this time, a line width error occurs for all edges existing in the design pattern. Therefore, in the case of the line width, twice as many errors as in the case of the edge occur.

Step S6: The photolithography simulator 1 uses the mask corner rounding means 7 shown in FIG.
In, the mask parameter mask_corner_
Based on the rounding, the roundness of the corner existing in the mask pattern obtained in step S5 is approximated by a right-angled isosceles triangle. Note that the mask parameter mask_c
If the owner_rounding is 0.0,
Processing is performed assuming that there is no rounded corner.

Step S7: The optical lithography simulator 1 uses the simulation means 8 shown in FIG. 1 for the mask pattern obtained in step S6.
The simulation is performed, and the simulation result is output from the output unit 10 shown in FIG. Specifically, the simulation means 8 generates a transfer resist pattern indicating a transfer image of the mask pattern.

Step S8: The optical lithography simulator 1 uses the evaluation means 9 shown in FIG.
The mask pattern obtained in step 7 is evaluated. Specifically, the evaluation unit 9 detects a deviation between the transfer resist pattern and the design pattern.

As described above, according to the photolithography simulator 1, the designer can freely set the bias of the mask pattern to be simulated only by setting the mask_bias indicating the mask bias in the mask parameter. Therefore, the bias of the mask pattern is changed to the mask parameter mask_bias.
It can be easily changed only by changing s. Therefore, the process development efficiency can be greatly improved.

Second Embodiment Hereinafter, a process in a case where OPC (Optical Proximity Effect Correction) is applied to the optical lithography simulator of the present embodiment will be described. FIG. 7 is a configuration diagram of the optical lithography simulator 21 of the present embodiment. As shown in FIG. 7, the optical lithography simulator 21 includes an input unit 2, an arrangement unit 3, a mask bias unit 4, an acute angle processing unit 5, a mask error detection unit 6, a mask corner rounding unit 7, a simulation unit 8, and an evaluation unit. 9, an output unit 10, a recording unit 11, a correction unit 12, an OPC pattern generation unit 13, a design pattern generation unit 14, and an evaluation point addition unit 15.

Hereinafter, the optical lithography simulator 21
Will be described. FIG. 8 is a flowchart of the process of the optical lithography simulator 21. Step S11: Optical lithography simulator 21
Inputs a design pattern, an exposure parameter and a mask parameter via the input means 2 shown in FIG.

Step S12: The photolithography simulator 21 sets a cell area for a design pattern (basic pattern) in the arranging means 3 shown in FIG. The above-described arrangement processing is performed on the region to generate a desired mask pattern.

Step S13: The optical lithography simulator 21 uses the mask bias means 4 shown in FIG.
The bias processing described above is performed on the mask pattern generated in step S12 at a magnification based on k_bias.

Step S14: The optical lithography simulator 21 obtains a design pattern which is the processing result of step S13.

Step S15: The optical lithography simulator 21 uses the evaluation point adding means 15 shown in FIG.
Evaluation points will be added based on the rules below. 1) An evaluation point is added to each corner of the design pattern. 2) Evaluation points are added to the remaining sides by a predetermined number from the corner at predetermined small intervals, and evaluation points are added to the remaining sides at predetermined large intervals. 3) No evaluation point is added to the corner that contacts the minute side.
An evaluation point is not added to a minute side. 4) A side in contact with the repetition area is not recognized as a side. 5) An evaluation point is added to a middle point of a relatively small side of the side to which the evaluation point is added. 6) An evaluation point is added at a relatively large interval to an end of a side where an evaluation point is not added to a corner in contact with a minute side.

Step S16: The photolithography simulator 21 uses the acute angle processing means 5 shown in FIG. 7 to determine the acute angle existing in the mask pattern (design pattern) obtained in step S14 with the length of the side indicated by the mask parameter prop_length. Is removed.

Step S17: The optical lithography simulator 21 uses the mask error detecting means 6 shown in FIG. 7 to generate a mask pattern in which a line width error indicated by a mask parameter mask_error has occurred in the mask pattern obtained in step S16. I do.

Step S18: The photolithography simulator 21 sets the mask parameter mask_corn in the mask corner rounding means 7 shown in FIG.
Based on er_rounding, the roundness of the corner present in the mask pattern obtained in step S17 is approximated by a right-angled isosceles triangle.

Step S19: The optical lithography simulator 21 performs the above-described simulation on the mask pattern obtained in step S18 in the simulation means 8 shown in FIG. 7, and outputs the simulation result from the output means 10 shown in FIG. I do.

Step S20: The optical lithography simulator 1 uses the evaluation means 9 shown in FIG. 7 to evaluate all the evaluation points added in step S15 of the mask pattern obtained in step S19. Specifically, the evaluation unit 9 detects a shift between the transfer resist pattern and the design pattern for all evaluation points.

Step S21: The photolithography simulator 21 deforms the mask pattern in the correcting means 12 shown in FIG. 7 so as to correct the displacement evaluated in step S20.

Step S22: The optical lithography simulator 21 uses the OPC pattern generation unit 13 shown in FIG.
Generate a PC pattern.

Steps S23 to S27: For the OPC pattern obtained in step S22,
The same processing as in steps S16 to S20 is performed.

Step S28: If the evaluation result in step S27 is better than the evaluation result of the previously stored optimal OPC pattern, the OPC pattern newly obtained in step S25 is determined as the optimal OPC pattern.
The information is recorded in the recording means 11 shown in FIG.

Step S29: The optical lithography simulator 21 terminates the processing of steps S21 to S28 when predetermined conditions are satisfied, and sets the OPC pattern finally recorded in the recording means 11 as an optimal OPC pattern. After the determination, for example, the optimum OPC pattern is output from the output unit 10 shown in FIG.

Steps S30 to S33: Step S29
Step S for the optimal OPC pattern obtained in
The same processing as in steps 17 to S20 is performed to make a final evaluation.

As described above, according to the photolithography simulator 21, the designer can freely set the bias of the mask pattern to be simulated only by setting the mask_bias indicating the mask bias in the mask parameter. Therefore, the bias of the mask pattern is changed to the mask parameter mask_bi.
It can be easily changed simply by changing as. Further, according to the optical lithography simulator 21, it is possible to simulate the processing when OPC (optical proximity correction) is applied. Therefore, the process development efficiency can be greatly improved. Further, as shown in FIG. 7, the photomask manufacturing apparatus of the present embodiment has a configuration in which a drawing unit 200 for drawing a photomask of an optimal OPC pattern stored in the recording unit 11 is added to an optical lithography simulator 21. doing.

Hereinafter, the optical lithography simulator 21
An example will be described. Embodiment 1 In this embodiment, the processing shown in FIG. 3 is performed. That is, OPC
No correction is made. Also, no bias processing is performed. The exposure parameters and mask parameters used in this embodiment will be described. lambda = 0.365, NANA = 0.550, sigma = 0.550, focus = 0.000, exposure = 0.000, resist_factor = 0.000, it = 0.271420, annual_ratio = 0.000, halftone_annular = 0.000, spatial = 0.000, comma = 0.000, astigmatism = 0.000, distortion = 0.000, curvatures = 0.000, mask_position = 0.000, flex_pitch = 0.000, pattern_transport.tance = 0. 0
00, background_transmittance =
1.000, pattern_phase = 0.000, design_grid = 0.010, mask_bias = 0.000, prop_length = 0.150, mask_error = 0.000, mask_corner_rounding = 0.00
0, OPC = off

In this case, the mask pattern includes, for example, the pattern 100a shown in FIG.
a becomes a pattern 100b in the transfer image.

Example 2 The following parameters were changed to evaluate the effect of decrement. Among the parameters of the first embodiment, the mask parameter mask_bias was changed as shown below. mask_bias = −0.010 In this case, as shown in FIG. 10, the pattern 100a in the case where the mask bias is not performed becomes the pattern 101a when the decrement is performed.
This becomes the pattern 101b.

Embodiment 3 In this embodiment, the processing shown in FIG. 8 is performed. That is, OPC
Make corrections. In addition, decrement processing is also performed. In this embodiment, the same parameters as those of the first embodiment described above are used except that OPC of the mask parameter is turned off. In this case, as shown in FIG. 10, the pattern 100a when no mask bias is performed becomes a pattern 102a when decrement is performed, and the transferred image becomes a pattern 102b.

The present invention is not limited to the above embodiment. For example, in the above-described embodiment, the arrangement unit 3, the acute angle processing unit 5, the mask error detection unit 6, and the mask corner rounding unit 7 do not always need to be provided in the optical lithography simulators 1, 21 shown in FIGS. . Further, the evaluation method in the evaluation means 9 and the correction method in the correction means 12 are not limited to those described above, and can be variously modified.

[0053]

As described above, according to the method and apparatus for correcting a mask pattern of the present invention, for example, the burden on a designer involved in correcting a mask pattern can be reduced.
For example, a mask pattern can be simulated using a new pattern obtained by rotating, inverting, and reflecting a pattern included in a design pattern as needed, and the mask pattern can be easily corrected using the simulation result. Further, according to the mask pattern simulation method and apparatus of the present invention, it is possible to easily perform a mask pattern simulation using a new pattern obtained by rotating, reflecting, and inverting a pattern included in a design pattern as necessary. Can be. Further, according to the photomask manufacturing apparatus of the present invention, the simulation of the mask pattern when a new pattern obtained by rotating, reflecting, and inverting the pattern included in the design pattern as necessary can be easily performed. The burden on the designer involved in manufacturing the mask can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an optical lithography simulator according to a first embodiment of the present invention.

FIG. 2 is a configuration diagram of an arithmetic processing system that realizes the optical lithography simulator shown in FIG. 1;

FIG. 3 is a flowchart of processing of an optical lithography simulator.

FIG. 4 is a diagram for explaining an arrangement process in step S2 shown in FIG. 3;

FIG. 5 is a diagram for explaining an arrangement process in step S2 shown in FIG. 3;

FIG. 6 is a diagram for explaining an arrangement process in step S2 shown in FIG. 3;

FIG. 7 is a configuration diagram of an optical lithography simulator according to a second embodiment of the present invention.

FIG. 8 is a flowchart of processing of the optical lithography simulator.

FIG. 9 is a diagram for explaining a mask pattern and a transfer pattern thereof when decrement is performed as a mask bias without performing OPC correction.

FIG. 10 is a diagram for explaining a mask pattern and its transfer pattern when OPC correction is performed.

[Explanation of symbols]

1, 21 photolithography simulator, 2 input means, 3 placement means, 4 mask bias means, 5 acute angle processing means, 6 mask error detection means, 7 mask corner rounding means, 8 simulation means, 9
... Evaluation means, 10 ... Output means, 11 ... Recording means, 12 ...
Correction means, 13 OPC pattern generation means, 14 design pattern generation means, 15 evaluation point adding means, 100a,
101a, 102a: mask pattern, 100b, 10
1b, 102b: Transfer resist pattern

Claims (17)

[Claims] 1. A mask pattern correction method for correcting a mask pattern of a photomask used in an optical lithography process so as to obtain a transfer image close to a design pattern, comprising: inputting a design pattern; A new pattern is generated by performing at least one of inversion processing, rotation processing, and reflection processing as necessary on the patterns in the pattern, and a design pattern including the new pattern is generated, and a pattern of the generated design pattern is generated. A plurality of evaluation points are added along the outer circumference, a mask pattern is generated from the design pattern to which the evaluation points are added, and a mask pattern is generated by using the generated mask pattern and performing exposure under predetermined transfer conditions. Simulation of the transferred image to be transferred, and the simulated transferred image and the design The difference between the over emissions, and evaluated for each of the plurality of evaluation points, based on a result of the evaluation, a correction method for a mask pattern for correcting a mask pattern that is generated. 2. The method according to claim 1, wherein the inversion, rotation, and reflection of the pattern is performed in units of cells of a predetermined size including one or a plurality of patterns. 3. The method according to claim 2, wherein the design pattern is generated by arranging the new pattern based on the size of the cell. 4. The method according to claim 1, wherein the correction is an optical proximity effect correction. 5. The method according to claim 1, wherein the generated mask pattern is corrected based on a result of the evaluation so as to reduce a difference between the transfer image and the design pattern. 6. A mask pattern simulation method for simulating a mask pattern of a photomask used in an optical lithography step, comprising: inputting a design pattern; and inverting a pattern in the input design pattern as necessary. Performing at least one of a rotation process and a reflection process to generate a new pattern; generating a design pattern including the new pattern; generating a mask pattern from the generated design pattern; A simulation method of a mask pattern, in which a transfer image obtained when exposure is performed under predetermined transfer conditions is simulated by using the above, and an evaluation is performed based on a difference between the simulated transfer image and the design pattern. 7. The mask pattern simulation method according to claim 6, wherein the pattern inversion processing, the rotation processing, and the reflection processing are performed in units of cells of a predetermined size including one or a plurality of patterns. 8. The mask pattern simulation method according to claim 7, wherein the design pattern is generated by arranging the new pattern based on the size of the cell. 9. A mask pattern correction apparatus for correcting a mask pattern of a photomask used in an optical lithography process so as to obtain a transfer image close to a design pattern, comprising: input means for inputting a design pattern; Arranging means for performing at least one of an inversion process, a rotation process, and a reflection process on a pattern in the design pattern as needed to generate a new pattern, and generating a design pattern including the new pattern; Evaluation point adding means for adding a plurality of evaluation points along the pattern periphery of the generated design pattern; mask pattern generation means for generating a mask pattern from the design pattern to which the evaluation points are added; and the generated mask pattern. Simulation of a transfer image obtained when exposure is performed under predetermined transfer conditions using Simulation means for performing a simulation, a difference between the simulated transfer image and the design pattern, an evaluation means for evaluating each of the plurality of evaluation points, and the generated mask pattern based on a result of the evaluation. A correction device for a mask pattern, comprising: a correction unit configured to perform correction. 10. The mask pattern correcting apparatus according to claim 9, wherein said arranging means performs said pattern inversion, rotation, and reflection in units of cells of a predetermined size including one or more patterns. . 11. The mask pattern correction device according to claim 10, wherein said arrangement means arranges said new pattern and generates said design pattern based on a size of said cell. 12. The mask pattern correcting apparatus according to claim 9, wherein said correction is an optical proximity effect correction. 13. A method for reducing a difference between the transferred image and the design pattern based on a result of the evaluation,
10. The mask pattern correcting device according to claim 9, wherein the generated mask pattern is corrected. 14. A mask pattern simulation apparatus for simulating a mask pattern of a photomask used in an optical lithography process, comprising: input means for inputting a design pattern; and if necessary, a pattern in the input design pattern. An arrangement unit that generates a new pattern by performing at least one of inversion processing, rotation processing, and reflection processing, and generates a design pattern including the new pattern; and a mask that generates a mask pattern from the generated design pattern. Pattern generating means, using the generated mask pattern, simulation means for simulating a transfer image obtained when exposure is performed under predetermined transfer conditions, and the simulated transfer image and the design pattern Rating based on difference Simulation apparatus of a mask pattern and a evaluation means for performing. 15. The mask pattern simulation apparatus according to claim 14, wherein said arrangement means performs said pattern inversion processing, rotation processing and reflection processing in units of cells of a predetermined size including one or a plurality of patterns. . 16. The mask pattern simulation apparatus according to claim 15, wherein said arrangement means arranges said new pattern and generates said design pattern based on a size of said cell. 17. A photomask manufacturing method for correcting a mask pattern of a photomask used in a photolithography process so as to obtain a transfer image close to a design pattern, and drawing a photomask using the corrected mask pattern. In the apparatus, input means for inputting a design pattern, and performing at least one of inversion processing, rotation processing, and reflection processing on a pattern in the input design pattern as necessary to generate a new pattern, Arranging means for generating a design pattern including a simple pattern, evaluation point adding means for adding a plurality of evaluation points along a pattern periphery of the generated design pattern, and mask pattern from the design pattern to which the evaluation point is added. A mask pattern generating means for generating a mask pattern; Simulation means for simulating a transfer image obtained when exposure is performed under transfer conditions; evaluation means for evaluating a difference between the simulated transfer image and the design pattern for each of the plurality of evaluation points; A photomask manufacturing apparatus, comprising: a correction unit that corrects the generated mask pattern based on a result of the evaluation; and a drawing unit that draws a photomask of the corrected mask pattern.