JPH11212954A - Chaos generation nonlinear measurement device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To take out the one-to-multiple order of chaos and to improve the healthiness of a communication system including a computer and also a data processing system. SOLUTION: In this chaos generation circuit, a primary mapping circuit consisting or MOS transistors TR 1 to 6 and a primary mapping circuit consisting of MOS TR 7 to 12 compose a flip-flop loop via a CMOS switch consisting of MOS TR 13, 14, 15 and 16. The channel conductance of each of MOS TRs forming the primary mapping circuits is weighted by the channel width, channel length, etc., and the nonlinearity of each mapping circuit is controlled by the external control voltage 18. The output y(t) of the chaos internal state is obtained against a discrete time string (t) by turning on and off the CMOS switch via the clock signals which are not overlapping with each other. The output y(t) is outputted from an A/D converter 17 having the nonlinear weight as a digital code Z(t). The converter 17 is weighted to linrarize the transmission characteristics of both mapping circuits.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION In the information society, it is necessary to enhance the robustness of communication systems including computers and data processing systems. Chaotic order provides a one-to-many correspondence. The present invention relates to a non-linear quantization measurement method for obtaining a one-to-many correspondence from chaos.

[0002]

2. Description of the Related Art Sequence y (t) -t for discrete time t
The behavior of chaos represented by (y (t) is an internal state) can be generated using the non-linear characteristics of the MOS transistor. CMOS source follower increasing function and CM
One example is a chaos generation circuit in which a one-dimensional mapping circuit in which a decreasing function of an OS inverter is synthesized is formed into a flip-flop loop via a CMOS switch.

The measurement of the internal state y (t) is performed using an ADC. A general-purpose ADC is a linear quantizer that guarantees linearity.

[0004]

The input / output transfer characteristic y (t) -y (t + 1) of the one-dimensional mapping circuit is non-linear. When the non-linear characteristic is linearly quantized at regular intervals, that is, measured by a general-purpose linear ADC, the quantum size after repeating the mapping varies. Chaos always diverges and converges.

[0005] Non-linearly weighted scales are prepared so that the quantum size does not vary even if the mapping is repeated. By doing so, an ordered one-to-many relationship can be extracted from chaos.

The purpose of the present invention is to acquire a one-to-many order utilizing the complexity of the past based on chaos bifurcation. On the discrete time axis, not only the relationship between adjacent internal states but also the transfer characteristic between internal states separated by a discrete time τ, y
Make available (t) -y (t-τ) or y (t) -y (t + τ) and combinations between them.
Even in the predictable range, divergence according to the Lyapunov exponent cannot be avoided by moving on the discrete time axis.
Nonlinear quantization is an essential technology for extracting order from chaos.

[0007]

SUMMARY OF THE INVENTION The design of a chaotic loop and the design of an ADC with nonlinear weights are closely related. The chaos generation loop gives C
A CMOS source follower and a CMOS inverter that provides a decreasing function are made into a one-dimensional mapping circuit by function synthesis using a common input / output terminal, and a flip-flop is fed back via a CMOS switch to form a one-dimensional mapping circuit.
It is an example.

The discrete time t (0, 1, 2,...) Is defined by opening and closing the CMOS switch in response to an external clock.

The transfer characteristic y (t) -y of the one-dimensional mapping circuit
In order to adjust the nonlinearity of the nonlinear function represented as (t + 1), a CMOS source follower or a CMOS inverter can be connected in parallel, and an external voltage can be applied thereto to adjust the nonlinearity.

In order to design a non-linear ADC having non-linear weights, a time series y (t)-using a general-purpose ADC having a resolution as high as 16 bits, for example, is used.
t is measured. The distribution of the internal state y (t) is obtained.
The distribution of the internal state y (t) indicates the nonlinearity of the one-dimensional mapping circuit.

The measurement data of the time series y (t) -t is taken into the memory of the computer. Internal state y
The calculation for obtaining a new quantum partition based on the distribution of (t) is performed by performing data processing on the data using a computer.

When the quantization resolution of the nonlinear quantization is determined, the total number of quanta is determined. For example, when the resolution is 8 bits, the total number of quanta is 256. High resolution eg 1
For a time series that is measured linearly with 6 bits, the distribution of states will be 25 again as a result.
There is a section that decomposes into 6 quanta. The partition gives a non-linear weight.

[0013] The design method of the nonlinear weight is not limited to the method of forming quantum partitions so that the distribution of internal states is uniform as a result. For example, a numerical calculation process in which the static input / output transfer characteristic of the one-dimensional mapping circuit is measured and a new section is created based on the gradient at each point so that the gradient becomes a straight line as a result may be adopted. .

In designing a non-linear ADC, it is desirable to leave an adjustment function such as using a variable resistor or trimming the resistor.

[0015]

A time series in which a chaos generation circuit including a flip-flop loop of a one-dimensional mapping circuit is measured by an ADC having a non-linear weight is written as Z (t) -t. For example, the internal state z (t) obtained by performing the non-linear 8-bit AD conversion takes any value from 0 to 255.

The transfer characteristics of Z (t) -Z (t-4) include:
Multivalued degeneration has occurred due to the branching of chaos into the past. The number of degenerate quantum is 16 at the maximum when τ = 4. The number of valid and significant input codes is limited to 16 and the output Z (t−t) corresponding to each degenerated quantum
4) has a maximum of 16 items.

The transfer characteristic of Z (t) -Z (t + 4) is Z
The relationship of (t) -Z (t-4) is obtained by inverting the graph of the transfer characteristic along the diagonal line. Z (t) -Z (t-4) is 1
While giving a many-to-many (16 or less) relationship, Z (t) −
Z (t + 4) gives a many-to-one relationship.

Such a relationship can be determined for various τ. If "1" is regarded as an input corresponding to the divided digital code string, the output "many" will be an encryption code. The many-to-one relationship corresponds to the process of restoring an input code from an encryption code.

[0019]

FIG. 1 is a conceptual diagram of a chaos occurrence measuring device.
Two one-dimensional mapping circuits, MOS transistors 1 to 6 and 7 to 12, are CMOS switches 13, 14, and 1
A flip-flop loop is formed through 5 and 16,
It is a chaos generation circuit. MOS of one-dimensional mapping circuit
The channel conductance of the transistors 1 to 12 is weighted by the width W and the length L of the channel.

An external adjustment voltage 18 is applied to adjust the nonlinearity of the one-dimensional mapping circuit. External adjustment voltage 18
Converts the digital value set in the computer into a DAC
(Digital-to-analog converter). The CMOS switches are opened and closed by external clocks that do not overlap each other, and their timing is synchronized with the nonlinear ADC 17. The sampling rate is on the order of MHz. CM
Opening and closing the OS switch creates a discrete time sequence t = 0, 1, 2,. Note that the circuit for inputting the initial value y (0) is omitted in the conceptual diagram of FIG.

The internal state y (t) of chaos is measured by the ADC 17 having a non-linear weight. The measured digital code is sequentially taken into the memory of the computer.

FIG. 2 shows the internal configuration of the ADC 17 having nonlinear weights in the case of 6 bits (2 ⁶ = 64). In a general-purpose linear ADC, R ₀ = R ₁ =... = R ₆₃ . In the case of the non-linear weight of the present invention, the resistance values R ₀ , R ₁ ,
, _R63 are determined so as to linearize the transfer characteristics of the one-dimensional mapping circuit. Alternatively, the ADC 17 is measured linearly using a high-resolution ADC, the distribution of the internal state is determined, the quantum division is determined again so that the distribution of the internal state is uniform, and the resistance value is adjusted and determined. May be.

Each of the resistors R ₀ , R ₁ ,..., R ₆₃ may be composed of a fixed resistor and a variable adjusting resistor, and fine adjustment of the variable resistor may be performed to extract 64 stable states (base numbers). Good.

When the chaos generation measuring device is formed on a printed circuit board, the resistors R ₀ , R ₁ ,..., R ₆₃ may be formed by print-printing resistors that can be trimmed.

The resistors R ₀ , R ₁ ,..., R connected in series
_The potential difference VM-VL applied to both ends of ₆₃ is adjusted and given to a potential difference corresponding to a dynamic range of a region where chaos occurs.

The outputs of resistors R ₀ , R ₁ ,..., R ₆₃ provide a non-linear reference potential. These reference potential and chaotic internal state y (t) is a comparator _{C 0, C 1, ...,} compared with _{C 63,} digital output _{D 0, D 1, ...,} obtaining _{D 63.}
The digital code strings D ₀ , D ₁ ,..., D ₆₃ can be converted into 6-bit codes by passing through a decoder circuit.
This part is omitted in FIG.

Assuming that the 6-bit digital code is Z (t), a time series Z (t) -t is measured, and a transfer characteristic Z (t) -Z (t ± τ) included therein is one-to-many or Many-to-one chaotic order is obtained. If the ADC having the non-linear weight shown in FIG. 2 is constituted by 256 resistor strings, an 8-bit time series is measured, and 1 to 16 or 16
One-to-one chaos order is taken out.

[0028]

The technique for extracting the order of chaos from non-existent chaos in an electronic circuit that can be realized as an integrated circuit by nonlinear quantization has been described in detail and specifically. Non-linear quantization is an effective technique for measuring the behavior of chaos, which is said to be unpredictable, so that it can be predicted. It will be a new industrial technology for developing computers and electronics.

An encryption restoration method for generating an encryption code by searching for a chaotic time series in which order can be extracted by nonlinear quantization and then searching the same time series for the encryption code again to obtain a restoration code is as follows. It is a specific example to know the effect of the present invention. Compared with RSA or DES encryption that depends on a large number of calculations, the encryption recovery method of the present invention that does not perform calculations is simpler and faster. Although it can be used as software, the chaos time series is RO
If a database is created in M, it is easy to implement hardware.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a chaos occurrence measuring device.

FIG. 2 is an internal configuration diagram of an ADC having a nonlinear weight.

[Explanation of symbols]

2,3,5,8,9,11,13,15 PMOS transistor 1,4,6,7,10,12,14,16 NMOS transistor 17 ADC with nonlinear weight R0, R1, ..., R63 Nonlinear weight resistance C0, C1,..., C63 Comparator y (t) Chaos loop output Z (t) Digital code D0, D1,..., D63 Digital output VM, VL Adjusted voltage 18 Adjusted voltage

Claims (3)

[Claims] 1. A one-dimensional mapping circuit in which a common input is applied to a CMOS source follower for providing an increasing function and a CMOS inverter for providing a decreasing function, and an output is taken out in common, is referred to as a CM.
The internal state of a discrete-time chaos generation circuit configured as a flip-flop loop via an OS switch is nonlinearly quantized and measured using a nonlinear ADC (analog-to-digital converter) having nonlinear weights, and the order of chaos is extracted. A chaos generation nonlinear measurement device characterized by the following. 2. A discrete-time chaos generating circuit in which a one-dimensional mapping circuit added to a CMOS source follower for providing an increasing function and a CMOS inverter for providing a decreasing function is formed as a flip-flop loop via a CMOS switch. A chaotic generation non-linear measurement apparatus characterized in that a non-linear quantization measurement is performed using a non-linear ADC having a characteristic, and the order of chaos is extracted. 3. A one-dimensional mapping circuit in which a common input is applied to a CMOS source follower that provides an increasing function and a CMOS inverter that provides a decreasing function, and a common output is taken out, is a CMO.
The internal state y (t) of the discrete-time chaos generation circuit configured as a flip-flop loop via the S switch is equal to the distribution of the internal state y (t) having a non-linear weight for each quantum defined by the quantization resolution. Chaos generation nonlinear measurement device characterized by taking out the order of chaos by making quantum division so that