JPH11212493A - Light emission display device - Google Patents

Light emission display device

Info

Publication number
JPH11212493A
JPH11212493A JP10016288A JP1628898A JPH11212493A JP H11212493 A JPH11212493 A JP H11212493A JP 10016288 A JP10016288 A JP 10016288A JP 1628898 A JP1628898 A JP 1628898A JP H11212493 A JPH11212493 A JP H11212493A
Authority
JP
Japan
Prior art keywords
light emitting
display device
film transistor
thin film
signal lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10016288A
Other languages
Japanese (ja)
Inventor
Takashi Ogura
隆 小倉
Hitoshi Takeda
均 竹田
Noritaka Kawase
徳隆 川瀬
Kazuo Ban
和夫 伴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP10016288A priority Critical patent/JPH11212493A/en
Publication of JPH11212493A publication Critical patent/JPH11212493A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To conduct uniform display by preventing variance in light emission luminance even when thin-film transistors have variance in characteristics by connecting >=2 scanning lines and signal lines to one unit pixel forming a light emitting element through thin-film transistors. SOLUTION: Scanning lines Dn1 to Dn4 are connected to the gates of thin- film transistor TFTs 1 to 4, signal lines Sm1 to Sm4 are connected to the sources, and light emitting elements (m, n) are connected to the drains. Constant currents Im1 to Im4 are connected to the signal lines Sm1 to Sm4. The constant currents Im1 to Im4 are set so as to increase according to an exponential function like 1:2:4:8 proportion and then the currents of the light emitting elements (m, n) can be controlled in 16 ways, so that 16 gradations of light emission luminance can be obtained. Further, the constant current sources Im1 to Im4 are used and variance in characteristics among the thin-film transistor TFTs 1 to 4 does not affect the light emission luminance of the light emitting elements (m, n), thereby reducing variance in the light emission luminance of a display panel.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、アクティブマト
リックス型発光表示装置に関し、薄膜トランジスタを用
いて階調表示を行う発光表示装置に関する。
[0001] 1. Field of the Invention [0002] The present invention relates to an active matrix type light emitting display device, and more particularly to a light emitting display device which performs gradation display using thin film transistors.

【0002】[0002]

【従来の技術】パソコン、携帯情報端末及び情報通信機
器やこれらの複合商品は、軽量、薄型、低消費電力の表
示装置を必要とし、液晶表示装置あるいはエレクトロル
ミネッセンスのような表示装置が用いられている。特
に、自発光型の表示装置は視認性がよく、視角度特性も
広い等の特長がある。
2. Description of the Related Art Personal computers, portable information terminals, information communication devices, and composite products thereof require light, thin, and low power consumption display devices, and display devices such as liquid crystal display devices or electroluminescence are used. I have. In particular, a self-luminous display device has features such as good visibility and wide viewing angle characteristics.

【0003】薄膜トランジスタを駆動素子とするアクテ
ィブマトリックス型エレクトロルミネッセンスが、例え
ば特開平7−122360号公報に開示されている。こ
れは図6に示すように、2つの薄膜トランジスタTFT
1、TFT2と1つの蓄積コンデンサCで構成されるア
クティブマトリックス回路により、有機エレクトロルミ
ネッセンスの発光輝度を制御するものである。
An active matrix type electroluminescence using a thin film transistor as a driving element is disclosed in, for example, JP-A-7-122360. This is, as shown in FIG. 6, two thin film transistors TFT
1. An active matrix circuit composed of a TFT 2 and one storage capacitor C controls the emission luminance of organic electroluminescence.

【0004】[0004]

【発明が解決しようとする課題】上記特許公報に記載さ
れたアクティブマトリックス型エレクトロルミネッセン
スにより、発光輝度を制御して表示することができる
が、薄膜トランジスタを表示装置の全領域に亙って均一
な特性を持つように作成することは非常に困難で、ばら
つきを生じる。特に電流により輝度が制御される自発光
型の発光素子の場合は、薄膜トランジスタのゲート電圧
−ソース・ドレイン電流特性やゲートのスレッショルド
電圧のばらつきにより同一電圧をゲートに印加しても発
光輝度にばらつきを生じる。
The active matrix type electroluminescence disclosed in the above-mentioned patent publication enables display to be performed by controlling light emission luminance. However, the thin film transistor has a uniform characteristic over the entire area of the display device. It is very difficult to create such a shape with a variation, and a variation occurs. In particular, in the case of a self-luminous light-emitting element whose luminance is controlled by current, even if the same voltage is applied to the gate due to variations in the gate voltage-source / drain current characteristics of the thin film transistor and variations in the threshold voltage of the gate, the luminance varies. Occurs.

【0005】[0005]

【課題を解決するための手段】本発明の特許請求の範囲
の請求項1に記載の発光表示装置は、絶縁性基板上に複
数の走査線と複数の信号線をマトリックス状に配置し、
上記走査線と信号線との交差点近傍に形成した薄膜トラ
ンジスタによって発光素子の印加電流を制御する発光表
示装置において、上記走査線又は信号線に接続された定
電流源を、発光素子を形成する単位画素1つに2以上の
走査線と信号線を薄膜トランジスタを介して接続したこ
とを特徴とする。
According to a first aspect of the present invention, there is provided a light emitting display device comprising: a plurality of scanning lines and a plurality of signal lines arranged in a matrix on an insulating substrate;
In a light-emitting display device that controls an applied current to a light-emitting element by a thin film transistor formed near an intersection between the scanning line and the signal line, a constant current source connected to the scanning line or the signal line is used as a unit pixel forming the light-emitting element. Two or more scanning lines and signal lines are connected to each other via a thin film transistor.

【0006】本発明の特許請求の範囲の請求項2に記載
の発光表示装置は、請求項1記載の複数の定電流源が指
数関数で増加する電流比に設定されていることを特徴と
する。本発明の特許請求の範囲の請求項3に記載の発光
表示装置は、請求項1記載の複数の走査線と信号線は、
上記発光素子の上下、左右両側に配置されていることを
特徴とする。
According to a second aspect of the present invention, there is provided a light emitting display device, wherein the plurality of constant current sources according to the first aspect are set to a current ratio increasing in an exponential function. . According to a third aspect of the present invention, there is provided a light emitting display device, wherein the plurality of scanning lines and the signal lines according to the first aspect are arranged as follows.
It is characterized by being arranged on the upper, lower, left and right sides of the light emitting element.

【0007】本発明の特許請求の範囲の請求項4に記載
の発光表示装置は、絶縁性基板上に上記複数の走査線と
複数の信号線と薄膜トランジスタを形成し、上記走査
線、信号線、薄膜トランジスタ上に絶縁膜を介して発光
素子を形成したことを特徴とする。
According to a fourth aspect of the present invention, in the light emitting display device, the plurality of scanning lines, the plurality of signal lines, and the thin film transistor are formed on an insulating substrate, and the scanning lines, the signal lines, A light-emitting element is formed over a thin film transistor with an insulating film interposed therebetween.

【0008】本発明は、定電流源から発光素子に電流を
供給するので、薄膜トランジスタの特性にばらつきがあ
っても発光輝度のばらつきとして現れず、均一な表示を
行うことができる。発光素子が有機エレクトロルミネッ
センスの場合は定電流源による直流駆動できるので都合
がよい。
According to the present invention, since a current is supplied from the constant current source to the light emitting element, even if the characteristics of the thin film transistor vary, they do not appear as variations in the light emission luminance, and uniform display can be performed. When the light emitting element is an organic electroluminescence, it can be conveniently driven by a direct current with a constant current source.

【0009】また、本発明は定電流源を指数関数で増加
する電流比に設定したので、例えば電流源が4つの場合
は、16階調の発光輝度が得られる。
Further, in the present invention, since the constant current source is set to a current ratio increasing in an exponential function, for example, when there are four current sources, light emission luminance of 16 gradations can be obtained.

【0010】また、本発明は走査線、信号線、薄膜トラ
ンジスタを形成する層と発光素子を形成する層を絶縁膜
で分離しているので、発光素子の形成面積は走査線、信
号線、薄膜トランジスタによって減少しない。
Further, according to the present invention, the layer forming the scanning line, the signal line and the thin film transistor and the layer forming the light emitting element are separated by an insulating film. Does not decrease.

【0011】[0011]

【発明の実施の形態】図1は本発明の発光表示装置の等
価回路図を示し、単位画素に4本の信号線と4本の走査
線を配置した例を示す。図1に示すように、発光素子
(m、n)に対し、それぞれ4本の信号線(Sm,1〜
Sm,4)と4本の走査線(Dn、1〜Dn、4)が薄
膜トランジスタ(TFT1〜TFT4)を介して接続さ
れる。他の発光素子(m+1、n)(m、n+1)(m
+1、n+1)もそれぞれ4本の信号線と4本の走査線
が4つのTFTを介して接続される。薄膜トランジスタ
のゲートに走査線が接続され、ソースに信号線が接続さ
れ、ドレインに発光素子が接続される。信号線(Sm,
1〜Sm,4)に定電流源(Im、1〜Im、4)が接
続される。定電流源として、例えば電流比が1:2:
4:8のように、指数関数で増加するように設定してお
くことにより、定電流源が4つの場合は発光素子の電流
を16通りに制御することができ、16階調の発光輝度
が得られる。また、定電流源を用いているので、薄膜ト
ランジスタの特性のばらつきが発光素子の発光輝度に影
響せず、表示パネルの発光輝度のばらつきを少なくす
る。
FIG. 1 is an equivalent circuit diagram of a light emitting display according to the present invention, showing an example in which four signal lines and four scanning lines are arranged in a unit pixel. As shown in FIG. 1, four signal lines (Sm, 1 to Sm,
Sm, 4) and the four scanning lines (Dn, 1 to Dn, 4) are connected via thin film transistors (TFT1 to TFT4). Other light emitting elements (m + 1, n) (m, n + 1) (m
+1 and n + 1), four signal lines and four scanning lines are connected via four TFTs. The scanning line is connected to the gate of the thin film transistor, the signal line is connected to the source, and the light emitting element is connected to the drain. Signal lines (Sm,
1 to Sm, 4) are connected to constant current sources (Im, 1 to Im, 4). As a constant current source, for example, a current ratio of 1: 2:
By setting so as to increase by an exponential function as in 4: 8, when there are four constant current sources, the current of the light emitting element can be controlled in 16 ways, and the light emission luminance of 16 gradations can be increased. can get. Further, since a constant current source is used, variations in the characteristics of the thin film transistors do not affect the light emission luminance of the light emitting element, and variations in the light emission luminance of the display panel are reduced.

【0012】本発明に使用される薄膜トランジスタは、
従来公知の材料、構造を用いることが可能である。例え
ば、非晶質シリコン、多結晶シリコン、微結晶シリコン
を半導体材料に使用することができ、ゲート絶縁膜には
SiO2,SiN(Si34),TaO(Ta25)を
使用することができ、また信号線、走査線にはTa,A
l,Cu等を使用することができる。薄膜トランジスタ
の構造にはスタガ型、逆スタガ型、トップゲート型を使
用することができる。
The thin film transistor used in the present invention comprises:
Conventionally known materials and structures can be used. For example, amorphous silicon, polycrystalline silicon, and microcrystalline silicon can be used for the semiconductor material, and SiO 2 , SiN (Si 3 N 4 ), and TaO (Ta 2 O 5 ) are used for the gate insulating film. And Ta, A for signal lines and scanning lines.
1, Cu or the like can be used. The structure of the thin film transistor can be a staggered type, an inverted staggered type, or a top gate type.

【0013】発光素子は、有機エレクトロルミネッセン
ス(EL)、薄膜エレクトロルミネッセンス(EL)や
発光ダイオードを使用することができ、有機EL素子
は、金(Au)やインジウム(In)と錫(Sn)の酸
化物(ITO)よりなる陽極電極と、マグネシウム(M
g)と銀(Ag)の合金、アルミニウム(Al)とリチ
ウム(Li)の合金等よりなる陰極電極との間に有機発
光層を挟んで構成される。発光層は特性改善のためホー
ル輸送層、ホール注入層や電子輸送層、電子注入層が必
要に応じてそれぞれ陽極電極と発光層の間、陰極電極と
発光層の間に挿入される。有機材料には公知の材料が使
用可能で、例えばホール輸送層、ホール注入層には芳香
族アミン系化合物、ヒドラゾン化合物やポリビニルカル
バゾール等が用いられる。発光層には8−ヒドロキシキ
ノリンのアルミニウム錯体等の金属錯体やビススチリル
ベンゼン誘導体等が用いられる。電子輸送層、電子注入
層にはオキサジアゾール誘導体が用いられる。
As the light emitting device, organic electroluminescence (EL), thin film electroluminescence (EL), and light emitting diode can be used. As the organic EL device, gold (Au), indium (In) and tin (Sn) can be used. An anode electrode made of oxide (ITO) and magnesium (M
g) and a silver (Ag) alloy, or a cathode electrode made of an aluminum (Al) and lithium (Li) alloy or the like with an organic light emitting layer interposed therebetween. In the light emitting layer, a hole transporting layer, a hole injecting layer, an electron transporting layer, and an electron injecting layer are inserted between the anode electrode and the light emitting layer and between the cathode electrode and the light emitting layer, respectively, as required, in order to improve characteristics. Known materials can be used as the organic material. For example, an aromatic amine compound, a hydrazone compound, polyvinyl carbazole, or the like is used for the hole transport layer and the hole injection layer. For the light emitting layer, a metal complex such as an aluminum complex of 8-hydroxyquinoline, a bisstyrylbenzene derivative, or the like is used. An oxadiazole derivative is used for the electron transport layer and the electron injection layer.

【0014】図1の等価的回路図において、信号線、走
査線は発光素子の左側、上側に4本配線されているが、
左右、上下に2本づつに分けて配線するのが望ましい。
In the equivalent circuit diagram of FIG. 1, four signal lines and scanning lines are arranged on the left and upper sides of the light emitting element.
It is desirable that the wiring is divided into two lines, left, right and up and down.

【0015】(実施例1)実施例1の平面図を図2に示
し、図2のA−A’断面図を図3に示す。実施例1は2
本の信号線を発光素子の左側に配線し、走査線を発光素
子の上下に配線している。
(Embodiment 1) FIG. 2 is a plan view of Embodiment 1, and FIG. 3 is a sectional view taken along the line AA 'of FIG. Example 1 is 2
The signal lines are arranged on the left side of the light emitting element, and the scanning lines are arranged above and below the light emitting element.

【0016】この発光表示装置はガラスのような絶縁性
基板上に、半導体膜としてアモルファスシリコン(a−
Si)層1をプラズマCVD法により全面に成膜し、フ
ォトリソグラフィ法により薄膜トランジスタ(TFT)
11の形成領域にのみ残すよう露光及びエッチングを行
う。次に窒化シリコン(Si34)からなるゲート絶縁
膜2をプラズマCVD法で形成し、アモルファスシリコ
ン(a−Si)層1上のゲート領域にのみフォトリソグ
ラフィ法を用い、エッチングにより残す。そして、タン
タル(Ta)をスパッタ法により蒸着し走査線3、信号
線4の部分、ゲート電極、ドレイン電極の部分のみをフ
ォトリソグラフィ法を用い、エッチングして残す。走査
線3と信号線4の交差部は絶縁層で分離した。
In this light emitting display device, amorphous silicon (a-) is used as a semiconductor film on an insulating substrate such as glass.
An Si) layer 1 is formed on the entire surface by a plasma CVD method, and a thin film transistor (TFT) is formed by a photolithography method.
Exposure and etching are performed so as to remain only in the formation region of No. 11. Next, a gate insulating film 2 made of silicon nitride (Si 3 N 4 ) is formed by a plasma CVD method, and only the gate region on the amorphous silicon (a-Si) layer 1 is left by etching using a photolithography method. Then, tantalum (Ta) is deposited by a sputtering method, and only the scanning line 3, the signal line 4, the gate electrode, and the drain electrode are etched and left using photolithography. The intersection of the scanning line 3 and the signal line 4 was separated by an insulating layer.

【0017】その後、インジウムと錫の酸化物であるI
TOをスパッタ法により蒸着し、画素電極部分のみを透
明電極5としてエッチングして残す。透明電極5の表面
を露出させ、その周囲及び透明電極5以外の部分を酸化
シリコンのような絶縁層8で覆う。この露出した透明電
極5の上にEL層6及び陰極電極7を積層する。EL層
は、有機ELにより形成し、ホール輸送層として4、
4’−ビス〔N−(1−ナフチル)−N−フェニルアミ
ノ〕ビフェニル(NPD)、発光層としてトリス(8−
キノリノール)アルミニウム(Alq3)を抵抗加熱蒸
着法により、この順で形成する。ホール輸送層、発光層
の膜厚はそれぞれ500Åとした。陰極電極はマグネシ
ュウム(Mg)と銀(Ag)の合金を用い、抵抗加熱に
よる共蒸着法により、マグネシュウム(Mg)と銀(A
g)の蒸着レート比を10:1にして作成した。
Thereafter, the oxide of indium and tin, I
TO is deposited by a sputtering method, and only the pixel electrode portion is etched and left as a transparent electrode 5. The surface of the transparent electrode 5 is exposed, and its surroundings and portions other than the transparent electrode 5 are covered with an insulating layer 8 such as silicon oxide. An EL layer 6 and a cathode electrode 7 are laminated on the exposed transparent electrode 5. The EL layer is formed of organic EL, and has a hole transport layer of 4,
4'-bis [N- (1-naphthyl) -N-phenylamino] biphenyl (NPD), and tris (8-
(Quinolinol) aluminum (Alq3) is formed in this order by a resistance heating evaporation method. The thicknesses of the hole transport layer and the light emitting layer were each 500 °. The cathode electrode is made of an alloy of magnesium (Mg) and silver (Ag). Magnesium (Mg) and silver (A
g) was prepared at a deposition rate ratio of 10: 1.

【0018】この実施例では信号線を2本発光素子の左
側に配置しているが、左右両側に配置するのが望まし
い。
In this embodiment, two signal lines are arranged on the left side of the two light emitting elements, but it is desirable to arrange them on the left and right sides.

【0019】以上のようにして作成されたアクティブマ
トリックス型発光表示装置は、信号線4に定電流源(図
示しない)に接続し、走査線3に順次走査信号を印加す
ることにより、表示データ、表示画像に応じて走査線3
及び信号線4を選択し、薄膜トランジスタ(TFT)1
1をオン状態にして、定電流源から電流を供給する。こ
の電流が透明電極5により形成された陽極電極からEL
層6、陰極電極7を流れることにより発光素子を動作さ
せ、発光を得る。定電流源の電流比を1:2に設定する
ことにより4階調を表示することができる。
The active matrix type light emitting display device manufactured as described above is connected to a constant current source (not shown) to the signal line 4 and sequentially applies a scanning signal to the scanning line 3 to display data, Scan line 3 according to the displayed image
And the signal line 4 are selected, and the thin film transistor (TFT) 1 is selected.
1 is turned on to supply a current from the constant current source. This current is applied from the anode electrode formed by the transparent electrode 5 to EL.
The light emitting element is operated by flowing through the layer 6 and the cathode electrode 7 to emit light. By setting the current ratio of the constant current source to 1: 2, four gradations can be displayed.

【0020】(実施例2)本発明の実施例2の平面図を
図4に示し、図4のB−B’断面図を図5に示す。実施
例2は2本の信号線を発光素子の左右にそれぞれ配線
し、2本の走査線を発光素子の上下にそれぞれ配線し
て、4本線駆動するものである。
(Embodiment 2) FIG. 4 is a plan view of Embodiment 2 of the present invention, and FIG. 5 is a sectional view taken along the line BB 'of FIG. In the second embodiment, four signal lines are driven by arranging two signal lines on the left and right sides of the light emitting element and two scanning lines on the upper and lower sides of the light emitting element.

【0021】ガラス等の絶縁性基板上に、アモルファス
シリコン(a−Si)層1、ゲート絶縁膜2、走査線
3、信号線4よりなるアクティブマトリックス回路を作
成する。アモルファスシリコン(a−Si)層1、ゲー
ト絶縁膜2、走査線3、信号線4の作成方法は、走査
線、信号線の交差箇所が多く絶縁層の形成箇所が多くな
るが、その他は実施例1と同様である。アモルファスシ
リコン(a−Si)層1、ゲート絶縁膜2、走査線3、
信号線4よりなるアクティブマトリックス回路を形成し
た後、これら表面上に紫外線硬化型樹脂を塗布し、薄膜
トランジスタ(TFT)のドレイン領域にコンタクトホ
ール9を形成して、アモルファスシリコン(a−Si)
層1、ゲート絶縁膜2、走査線3、信号線4が形成する
凹凸を吸収して表面を平坦化し、絶縁層8を形成する。
絶縁層8の上に、コンタクトホール9を介してドレイン
領域と接続するように陰極電極7をマグネシュウム(M
g)と銀(Ag)の合金を用い、実施例1と同様に作成
しパターニングして形成する。この陰極電極7の上にE
L層6、透明電極5を積層する。EL層は実施例1と同
様に、有機ELにより形成し、NPDとAlq3で構成
する。
An active matrix circuit including an amorphous silicon (a-Si) layer 1, a gate insulating film 2, a scanning line 3, and a signal line 4 is formed on an insulating substrate such as glass. The method of forming the amorphous silicon (a-Si) layer 1, the gate insulating film 2, the scanning lines 3, and the signal lines 4 is as follows. Same as Example 1. Amorphous silicon (a-Si) layer 1, gate insulating film 2, scanning line 3,
After forming an active matrix circuit composed of the signal lines 4, an ultraviolet curable resin is applied on these surfaces, and a contact hole 9 is formed in a drain region of a thin film transistor (TFT) to form amorphous silicon (a-Si).
The insulating layer 8 is formed by absorbing the unevenness formed by the layer 1, the gate insulating film 2, the scanning lines 3, and the signal lines 4 and flattening the surface.
On the insulating layer 8, a cathode electrode 7 is formed of magnesium (M) so as to be connected to the drain region via the contact hole 9.
Using an alloy of g) and silver (Ag), it is formed and patterned in the same manner as in Example 1. E on the cathode electrode 7
The L layer 6 and the transparent electrode 5 are laminated. The EL layer is formed of an organic EL as in the first embodiment, and is composed of NPD and Alq3.

【0022】以上のようにして作成されたアクティブマ
トリックス型発光表示装置は、信号線4に定電流源(図
示しない)に接続し、走査線3に順次走査信号を印加す
ることにより、表示データ、表示画像に応じて走査線3
及び信号線4を選択し、薄膜トランジスタ(TFT)1
1をオン状態にして、定電流源から電流を供給する。こ
の電流が透明電極5により形成された陽極電極からEL
層6、陰極電極7を流れることにより発光素子を動作さ
せ、発光を得る。信号線に接続した4つの定電流源の電
流比を1:2:4:8に設定することにより16階調を
表示することができる。
The active matrix type light emitting display device manufactured as described above is connected to a constant current source (not shown) to the signal line 4 and sequentially applies a scanning signal to the scanning line 3 to display data, Scan line 3 according to the displayed image
And the signal line 4 are selected, and the thin film transistor (TFT) 1 is selected.
1 is turned on to supply a current from the constant current source. This current is applied from the anode electrode formed by the transparent electrode 5 to EL.
The light emitting element is operated by flowing through the layer 6 and the cathode electrode 7 to emit light. By setting the current ratio of the four constant current sources connected to the signal line to 1: 2: 4: 8, 16 gradations can be displayed.

【0023】[0023]

【発明の効果】本発明の発光表示装置は、定電流源から
発光素子に電流を供給するので、薄膜トランジスタの特
性にばらつきがあっても発光輝度のばらつきとして現れ
ず、均一な表示を行うことができる。
According to the light-emitting display device of the present invention, current is supplied from a constant current source to the light-emitting element. it can.

【0024】また、本発明は定電流源を指数関数で増加
する電流比に設定したので、例えば電流源が4つの場合
は、16階調の発光輝度が得られる。
In the present invention, since the constant current source is set to a current ratio that increases in an exponential function, for example, when there are four current sources, light emission luminance of 16 gradations can be obtained.

【0025】また、本発明は走査線、信号線、薄膜トラ
ンジスタを形成する層と発光素子を形成する層を絶縁膜
で分離しているので、発光素子の形成面積は走査線、信
号線、薄膜トランジスタによって減少しない。
Further, according to the present invention, the layer for forming the scanning line, the signal line, and the thin film transistor and the layer for forming the light emitting element are separated by the insulating film. Does not decrease.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の発光表示装置を説明する等価図回路図
である。
FIG. 1 is an equivalent circuit diagram illustrating a light emitting display device of the present invention.

【図2】実施例1の発光表示装置の平面図である。FIG. 2 is a plan view of the light emitting display device according to the first embodiment.

【図3】実施例1の発光表示装置の断面図である。FIG. 3 is a cross-sectional view of the light emitting display device according to the first embodiment.

【図4】実施例2の発光表示装置の平面図である。FIG. 4 is a plan view of a light emitting display device according to a second embodiment.

【図5】実施例2の発光表示装置の断面図である。FIG. 5 is a sectional view of a light emitting display device according to a second embodiment.

【図6】従来例の発光表示装置を説明する駆動回路であ
る。
FIG. 6 is a driving circuit illustrating a conventional light emitting display device.

【符号の説明】[Explanation of symbols]

1 アモルファスシリコン(a−Si)層 2 ゲート絶縁膜 3 走査線 4 信号線 5 透明電極 6 EL層 7 陰極電極 8 絶縁膜 9 コンタクトホール 11 薄膜トランジスタ(TFT) DESCRIPTION OF SYMBOLS 1 Amorphous silicon (a-Si) layer 2 Gate insulating film 3 Scanning line 4 Signal line 5 Transparent electrode 6 EL layer 7 Cathode electrode 8 Insulating film 9 Contact hole 11 Thin film transistor (TFT)

フロントページの続き (72)発明者 伴 和夫 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内Continued on the front page (72) Inventor Kazuo Ban 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka Inside Sharp Corporation

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 絶縁性基板上に複数の走査線と複数の信
号線をマトリックス状に配置し、上記走査線と信号線と
の交差点近傍に形成した薄膜トランジスタによって発光
素子の印加電流を制御する発光表示装置において、上記
走査線又は信号線に接続された定電流源を、上記発光素
子を形成する単位画素1つに2以上の走査線と信号線を
薄膜トランジスタを介して接続したことを特徴とする発
光表示装置。
1. A light emitting device comprising: a plurality of scanning lines and a plurality of signal lines arranged in a matrix on an insulating substrate; and a thin film transistor formed near an intersection between the scanning lines and the signal lines to control a current applied to the light emitting element. In the display device, the constant current source connected to the scan line or the signal line is connected to one or more unit pixels forming the light emitting element by connecting two or more scan lines and a signal line via a thin film transistor. Light-emitting display device.
【請求項2】 上記複数の定電流源は、指数関数で増加
する電流比に設定されていることを特徴とする請求項1
記載の発光表示装置。
2. The apparatus according to claim 1, wherein the plurality of constant current sources are set to a current ratio that increases in an exponential function.
The light-emitting display device according to claim 1.
【請求項3】 上記複数の走査線と信号線は、上記発光
素子の上下、左右両側に配置されていることを特徴とす
る請求項1記載の発光表示装置。
3. The light emitting display device according to claim 1, wherein the plurality of scanning lines and signal lines are arranged on the upper, lower, left and right sides of the light emitting element.
【請求項4】 絶縁性基板上に上記複数の走査線と複数
の信号線と薄膜トランジスタを形成し、上記走査線、信
号線、薄膜トランジスタ上に絶縁膜を介して発光素子を
形成したことを特徴とする請求項1記載の発光表示装
置。
4. A plurality of scanning lines, a plurality of signal lines, and a thin film transistor are formed on an insulating substrate, and a light emitting element is formed on the scanning line, the signal line, and the thin film transistor via an insulating film. The light emitting display device according to claim 1.
JP10016288A 1998-01-29 1998-01-29 Light emission display device Pending JPH11212493A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10016288A JPH11212493A (en) 1998-01-29 1998-01-29 Light emission display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10016288A JPH11212493A (en) 1998-01-29 1998-01-29 Light emission display device

Publications (1)

Publication Number Publication Date
JPH11212493A true JPH11212493A (en) 1999-08-06

Family

ID=11912370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10016288A Pending JPH11212493A (en) 1998-01-29 1998-01-29 Light emission display device

Country Status (1)

Country Link
JP (1) JPH11212493A (en)

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