JPH11205752A - Picture noise reducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To fetch a picture in which noise included in a picture signal is reduced by giving inter-frame processing through the use of a circulating noise reducing circuit at the time of detecting that an inputted picture is a still picture. SOLUTION: At this device 1, a still picture detecting circuit 2 judges that the inputted picture is a still picture based on the motion detecting result of the picture and the detecting result of a color frame, a color belt, etc., showing the still picture. A still picture fetching control circuit 3 makes the circulating noise reducing circuit 4 into operating state based on a still picture detecting output 2a. A product obtained by multiplying the inputted picture by (1-K) by a multiplier 7 and a product obtained by multiplaying the output of a picture memory 9 by K by a multiplier 10 are added by an adder 8 to house the adding result in the memory 9. By repeating the processing through plural frames, noise included in the inputted picture is reduced to obtain a still picture with the reduced noise in the memory 9. A parameter K has a value satisfying 1>K>0.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image noise reduction device suitable for use in a video printer, a still image display device, and the like. The present invention relates to an image noise reduction device that obtains a still image with reduced noise by capturing an input image signal via a mold noise reduction circuit.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram of a video printer. The video printer 100 includes an analog signal processing unit 101, an A / D conversion unit 102, an image memory (frame memory) 103, and a printer unit 104.
A video signal (composite signal) output from a VTR (video tape recorder), a VTR-integrated video camera, or the like is input to the analog signal processing unit 101. The analog signal processing unit 101 converts (decodes) a video signal (composite signal) into a component signal 101a composed of a luminance signal Y and two color difference signals RY, BY or a component signal 101a composed of R, G, B signals. ). The A / D converter 102 A / D converts and codes the component signal 101a. The digital image signal 102a separated and encoded by the analog signal processing unit 101 and the A / D conversion unit 102 is
3 is stored. The video printer 100 captures a digital image signal for one screen (frame or field image) from the input video signal into the image memory 103 and supplies the digital image signal captured into the image memory 103 to the printer unit 104 to perform printing. Do.

FIG. 11 is an explanatory view of a still picture mode (commemorative picture mode) of a VTR integrated video camera. Some VTR-integrated video cameras have a still image mode (commemorative photo mode) in which a captured image is converted to a still image, and a color frame (for example, a white frame), a color band, and the like are attached, and recording is performed for several seconds. If there is a scene to be printed (scene), the scene to be printed is recorded as a still image using the still image mode (commemorative photo mode). Then, at the time of reproduction, a screen of a still image recorded in the still image mode (commemorative photo mode) is taken into the image memory of the printer, so that the image can be printed.

FIG. 12 is a block diagram of a cyclic noise reduction circuit. 7.3.3 Image digital signal processing (author Takahiko Fukinuki published by Nikkan Kogyo Shimbun) 7.3.3 Two multipliers 111 and 112 and adder 11
3, a cyclic noise reduction circuit (noise reducer) including a frame memory (image memory) 114 is described. In addition, the following is described. The image signal has motion, and if the addition is performed as it is, the moving image portion is temporally blurred. The point of the system is to limit this blur to the range of the afterimage of the visual so as not to obstruct the visual. Therefore, the parameter K is set to 1 according to the movement.
>K> 0. That is, K
→ Set 1 (K is a value close to 1) to reduce noise (blur does not occur in principle). In the moving image section, K → 0 is set, and blur is reduced (noise reduction is given up).

[0005]

In an analog VTR such as a VHS, the SN ratio (signal-to-noise ratio) of an image deteriorates during recording and reproduction. For this reason, when the reproduced image is captured on one screen and printed, horizontal streak-like noise or color unevenness may appear. Also, if the timing of image capture is bad, a screen containing a dropout during playback may be captured. As described above, in the conventional video printer, there is a problem that the timing of image capturing is difficult. Further, in the reproduction of the analog VTR, the vertical line of the captured image may be curved due to jitter.

An image recorded in the above-described still image mode (commemorative photo mode) and an image which does not use the still image mode but has no motion such as a landscape, a building, or a painting are continuous over a plurality of frames. When capturing an image equivalent to an image (a series of image signals in which the same image extends over a plurality of frames) for printing or the like, if it is known that the image to be captured is a still image, the above-described cyclic type is used. By performing temporal inter-frame processing using a noise reduction circuit (noise reducer), noise included in an image signal can be reduced. However, since a conventional video printer, still image display device, or the like is configured to capture an image for one screen from an input image signal, it includes noise included in the image signal and noise accompanying recording / reproduction such as a VTR. The image will be captured as is. For this reason,
An image containing noise is printed or displayed.

The present invention has been made to solve such a problem. When an input image signal is a still image, the noise is reduced by taking in the input image signal via a cyclic noise reduction circuit. It is an object of the present invention to provide an image noise reduction device capable of obtaining a still image.

[0008]

According to the present invention, there is provided an image noise reduction apparatus comprising: a still image detection circuit for detecting that an input image is a still image;
A cyclic noise reduction circuit having an adder and an image memory; and a stationary noise reducing noise by taking an input image through the cyclic noise reduction circuit for a predetermined time based on a still image detection output of the still image detection circuit. A still image capturing control circuit for obtaining an image.

An image noise reduction apparatus according to the present invention includes a color frame detection circuit for detecting that an input image includes still image information such as a color frame and a color band indicating a still image, a multiplier, and an adder. And a cyclic noise reduction circuit having an image memory, wherein the noise is reduced by taking in the input image via the cyclic noise reduction circuit for a predetermined time based on the still image detection output of the color frame detection circuit. It is characterized by obtaining an image.

[0010] An image noise reduction apparatus according to the present invention comprises: a still image code detection circuit for detecting that an input image is a still image by detecting a still image code superimposed during a vertical blanking period; , A cyclic noise reduction circuit having an adder and an image memory, wherein the input image is input for a predetermined time based on the still image detection output of the still image code detection circuit or while the still image code is detected. It is characterized in that a still image with reduced noise is obtained by taking it in through a cyclic noise reduction circuit.

An image noise reduction apparatus according to the present invention detects a motion of an input image and detects a motion of the input image as a still image based on the detected motion. A cyclic noise reduction circuit having a detector and an image memory, wherein the input image is taken in through the cyclic noise reduction circuit for a predetermined time based on the still image detection output of the motion detection still image detection circuit. A still image with reduced noise is obtained.

In the image noise reduction apparatus according to the present invention, when the still image detection circuit detects that the input image is a still image, the input image is fetched through the cyclic noise reduction circuit. Can be obtained.

An image noise reduction apparatus according to the present invention detects that an input image is a still image based on a color frame and a color band of the input image, and captures the still image via a cyclic noise reduction circuit. . Therefore, an operation of designating a reproduced image (still image) of an image captured by the VTR-integrated video camera in the still image mode (commemorative photo mode) as a still image or operating the cyclic noise reduction circuit is performed. The noise can be reduced and taken in by the cyclic noise reduction circuit without performing any operation or the like.

An image noise reduction apparatus according to the present invention detects a still image based on a still image code superimposed during a vertical blanking period and takes in the still image via a cyclic noise reduction circuit. Therefore, a still image in which noise has been reduced by the cyclic noise reduction circuit can be captured without performing an operation of instructing that the image is a still image or an operation of operating the cyclic noise reduction circuit.

The image noise reduction apparatus according to the present invention detects a still image based on the motion of the input image and takes in the still image via the cyclic noise reduction circuit. Even if information indicating a still image, such as a frame or a still image code, is not included, a still image with reduced noise can be captured via the cyclic noise reduction circuit.

The image noise reduction apparatus according to the present invention has a V
Even when an image deteriorated due to dropout is input in a reproduction system such as a TR / VTR integrated video camera or the like, the image is taken in via a cyclic noise reduction circuit, thereby suppressing the effect of image deterioration and providing a good static image. Images can be obtained. Even when an image having vertical line distortion due to jitter or the like is input in a reproduction output of an analog VTR or the like, the image is captured through the cyclic noise reduction circuit, thereby distorting the vertical line due to jitter or the like. And a good still image can be obtained. Since the still image is taken in through the cyclic noise reduction circuit, only the noise component of the input image is reduced, and a clear still image can be obtained.

[0017]

Embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 is a block diagram of an image noise reduction device according to the first embodiment. The image noise reduction device 1 shown in FIG. 1 includes a still image detection circuit 2, a still image capture control circuit 3, and a cyclic noise reduction circuit 4. The still image capture control circuit 3 includes a switching control circuit 5 and a switch circuit 6. The cyclic noise reduction circuit 4 includes a first (input side) multiplier 7, an adder 8, an image memory 9, and a second (output side) multiplier 10. The digital input image DI is supplied to the still image detection circuit 2, one input terminal 6a of the switch circuit 6, and the first multiplier 7.

The still image detecting circuit 2 is a digital image input
Whether or not I is a still image is detected, and if it is detected as a still image, a still image detection output 2a is output. When the digital input image DI includes still image information such as a color frame and a color band indicating a still image, the still image detection circuit 2 detects the color frame and the color band to detect a still image. Detect that. The still image detection circuit 2 detects motion between frames or between fields, and determines that the image is a still image when the detected motion is equal to or less than a predetermined threshold value or when no motion is detected. It may be configured to output the detection output 2a. When a still image code indicating that the input image is a still image is superimposed during the vertical blanking period of the television video signal, the still image detection circuit 2 performs the vertical blanking instead of the digital input image DI. Still image detection output 2a by detecting a still image code superimposed on the period
May be output. The still image detection output 2a is
It is supplied to the switching control circuit 5.

When the still image detection output 2a is not supplied, the switching control circuit 5 switches the switch circuit 6 to a state shown by a solid line in the figure, and converts the digital input image DI supplied to one input terminal 6a into an image. The data is supplied to the memory 9. When the still image detection output 2a is supplied, the switching control circuit 5 receives the still image detection output 2a from the point in time when the still image detection output 2a is supplied or from the point in time when the still image detection output 2a is supplied. During this time, the switch circuit 6 is switched to the state shown by the dotted line in the figure, and the output signal of the adder 8 supplied to the other input terminal 6b is supplied to the image memory 9.

The first multiplier 7 outputs a digital input image DI
Is multiplied by (1-K), and a multiplication result is output. The second multiplier 10 multiplies the output DO of the image memory 9 by K and outputs a result of the multiplication. The adder 8 adds the multiplication results of the multipliers 7 and 10 and outputs the addition result. The addition result is supplied to the other input terminal 6b of the switch circuit 6. Note that the parameter K is a value of 1>K> 0 (for example, 0.5).

When the switch circuit 6 is switched to the dotted line side in the figure, the result of adding the digital input image DI multiplied by (1-K) and the output of the image memory 9 by K times the image memory. 9 is repeated for each frame (or field). This allows
The cyclic noise reduction circuit 4 acts as a low-pass filter in the time direction (between frames or between fields) and can reduce noise having no correlation between frames.

The writing to the image memory 9 and the reading from the image memory 9 are controlled by a memory control circuit (image memory write / read control circuit) not shown. When the switch circuit 6 captures a moving image in the state shown by the solid line in the figure, a memory control circuit (not shown) stops new writing when the image for one frame (or one field) is captured in the image memory 9. As a result, an image for one frame (or one field) of a moving image is stored in the image memory 9 as a still image, and the image stored in the image memory 9 is supplied to a printer unit or an image display unit (not shown). Can be printed or an image can be displayed.

When the switch circuit 6 captures a still image in a state indicated by a dotted line, a memory control circuit (not shown) operates for a preset image capture time from the time when the still image detection output 2a is supplied, or for a still image. Writing and reading of the image memory 9 are controlled while the detection output 2a is being supplied, and thereafter, new writing is stopped. As a result, a still image with reduced noise can be stored in the image memory 9 while using the image memory 9 for storing the image as delay means of the cyclic noise reduction circuit 4. Then, by supplying the image held in the image memory 9 to a printer unit or an image display unit (not shown), an image with reduced noise can be printed or displayed.

When the capture of a new image is started in a state where the previously captured image is stored in the image memory 9, the newly captured image is first multiplied by (1−K) to K The result of the multiplication is stored in the image memory 9, but the above operation is repeated over a plurality of frames (or a plurality of fields). , K, K ² , K ³ ,... Become smaller, so that the effect of the previously captured image is eliminated. For example, if the parameter K = 0.
If it is set to 5, the image component captured last time is １ ／
In the next round (acquisition of a new image), the previously acquired image component is further reduced by half, so that the previously acquired image component is 1 / 2, 1/4, 1/8, 1/16,
1/32, 1/64, 1/128, 1/256, 1/5
Every time the tour repeats, the number is reduced by half. When the gradation of the image is 256 gradations (8 bits) from 0 to 255,
The number of rounds (image capture) is ninth, and the image component captured last time is 1/512, which is smaller than 1 bit which is the minimum unit (LSB) of an 8-bit image, and is a negligible level. . Therefore, the capture of a new image may be terminated when the previously captured image component has reached a negligible level.

It should be noted that the contents of the image memory 9 may be all cleared to 0 when the output of the image fetched into the image memory 9 (for example, a printing operation) is completed by a memory control circuit (not shown). The memory control circuit (not shown) stores all the contents of the image memory 9 when a preset image holding time (for example, several minutes to several tens of minutes) elapses from the time when a new image is fetched into the image memory 9. You may make it clear to 0. By adopting such a configuration, it is possible to reduce the time (the number of rounds) required to capture a new image while reducing noise.

FIG. 2 is a block diagram of another image noise reduction apparatus according to the first embodiment. The image noise reduction device 11 shown in FIG. 2 includes a still image detection circuit 12, a multiplication coefficient setting circuit 13, a cyclic noise reduction circuit 14, and an image memory write / read control circuit 15. The cyclic noise reduction circuit 14 includes a first multiplier 7, an adder 8, and an image memory 9.
And a second multiplier 10. Multiplication coefficient setting circuit 1
Reference numeral 3 denotes a still image capturing control circuit described in the claims.

The configuration of the still picture detection circuit 12 is the same as that of the still picture detection circuit 2 shown in FIG. Still image detection circuit 12
Generates a still image detection output 12a when detecting that the digital input image DI is a still image. The still image detection output 12a is supplied to the multiplication coefficient setting circuit 13 and the image memory write / read control circuit 15.

When the multiplication coefficient setting circuit 13 recognizes that the digital input image DI is a still image based on the still image detection output 12a, the multiplication coefficient setting circuit 13 supplies the first multiplier 7 with a multiplication coefficient for the still image (1-K). And supplies the second multiplier 10 with a multiplication coefficient (K) for a still image. Note that the multiplication parameter K
Is a value of 1>K> 0 (for example, 0.5). When the still image detection output 12a is not supplied, the multiplication coefficient setting circuit 13 determines that the digital input image DI is a moving image, and supplies the first multiplier 7 with a multiplication coefficient (1) for a moving image. The still image multiplication coefficient (0) is supplied to the second multiplier 10.

The structure of the cyclic noise reduction circuit 14 is shown in FIG.
This is the same as the cyclic noise reduction circuit 4 shown in FIG. When the multiplication coefficient of the first multiplier 7 is set to (1-K) and the multiplication coefficient of the second multiplier 10 is set to (K), the digital input image DI is multiplied by (1-K). Things and image memory 9
Is stored in the image memory 9 repeatedly for each frame (or field). Thereby, the cyclic noise reduction circuit 4
It acts as a low-pass filter in the time direction (between frames or between fields) and can reduce noise without correlation between frames. When the multiplication coefficient of the first multiplier 7 is set to (1) and the multiplication coefficient of the second multiplier 10 is set to (0), the digital input image DI is stored in the image memory 9 as it is. .

The image memory write / read control circuit 15 performs a moving image capturing operation when an image capturing request is input when the still image detection output 12a is not supplied. In this moving image capturing operation, the image memory write / read control circuit 15
Causes the image memory 9 to fetch an image for one frame or one field immediately after the image fetch request is input.
The image memory write / read control circuit 15 identifies a frame or a field based on a synchronization clock indicating frame synchronization or field synchronization timing, sets a memory address based on a pixel clock, and sets an image of each pixel. Write a signal to a predetermined memory address.

The image memory write / read control circuit 15 performs a still image capturing operation when an image capturing request is input while the still image detection output 12a is being supplied. In this still image capturing operation, the image memory write / read control circuit 15
Controls writing and reading to and from the image memory 9 during a preset image capturing time from the time when the image capturing request is input or while the still image detection output 12a is being supplied. This allows the image memory 9 to hold a noise-reduced still image while using the image memory 9 as a delay unit of the cyclic noise reduction circuit 14.
Thus, a still image with reduced noise can be loaded into the image memory 9.

FIG. 3 is a block diagram of an image noise reduction device according to a second embodiment. An image noise reduction device 21 shown in FIG. 3 includes a color frame detection circuit 22 and a still image capture control circuit 2.
3, a cyclic noise reduction circuit 24, an analog signal processing unit 27, and an A / D conversion unit 28. The still image capture control circuit 23 includes an image capture control circuit 25 and a switch circuit 2.
6 The cyclic noise reduction circuit 24 includes a first multiplier 7, an adder 8, an image memory 9, and a second multiplier 10. The configuration of the cyclic noise reduction circuit 24 is as follows.
This is the same as the cyclic noise reduction circuit 4 shown in FIG.

A video signal reproduced by a VTR-integrated video camera (not shown) is input to the image noise reduction device 21 as a video input signal. The video input signal is supplied to a color frame detection circuit 22, and the video input signal is converted into a digital input image DI via an analog signal processing unit 27 and an A / D conversion unit. The digital input image DI is supplied to a color frame detection circuit 22 and a cyclic noise reduction circuit 24.

The color frame detection circuit 22 detects that the input image is a still image by detecting a color frame, a color band, and the like indicating a still image in the image based on the video input signal. An output (color frame or the like detection output) 22a is generated. The still image detection output (color frame etc. detection output) 22a is the image capture control circuit 2
5.

The image capture control circuit 25 is provided with a switch circuit 26 based on a still image detection output (color frame or the like detection output) 22a.
Is turned on. When the switch circuit 26 is turned on, the cyclic noise reduction circuit 24 is activated. The first multiplier 7 multiplies the digital input image DI by (1-K) and outputs a multiplication result. The second multiplier 10 multiplies the output DO of the image memory 9 by K and outputs a result of the multiplication. The adder 8 adds the multiplication results of the multipliers 7 and 10 and outputs the addition result. The addition result is
It is stored in the image memory 9 via the switch circuit 26.

When the switch circuit 26 is on, the result of adding the digital input image DI multiplied by (1-K) and the image memory 9 output multiplied by K is the image memory 9
Is repeated for each frame (or field). Thereby, the cyclic noise reduction circuit 4
Acts as a low-pass filter in the time direction (between frames or between fields) and can reduce noise without correlation between frames.

The image capture control circuit 25 determines when the still image detection output (color frame detection output) 22a is no longer supplied (when the color frame is no longer detected) or when the switch circuit 26 is turned on. At a point in time when a predetermined time elapses (at the point in time when the cyclic noise reduction circuit 24 starts operating and the effect of the first video input signal disappears), the switch circuit 26 is turned off. Thus, the capture of the still image into the image memory 9 ends. By supplying the still image captured in the image memory 9 to a printer unit (not shown), a still image with reduced image noise can be printed.

The image noise reduction device 21 shown in FIG.
When the color frame detection circuit 22 detects that the video input signal is a still image, the still image can be automatically captured. Therefore, in the video printer equipped with the image noise reduction device 21 shown in FIG. 3, a printout request is input after reproducing an image photographed in a still image mode (commemorative photo mode) with a VTR integrated video camera. Thus, an image shot using the still image mode (commemorative photo mode) can be printed. The conventional video printer has a problem that the timing of image capture is difficult. However, the video printer including the image noise reduction device 21 shown in FIG. 3 can solve the problem that the timing of image capture is shifted. .

FIG. 4 is an explanatory diagram showing an example of a color frame detection position. The color frame detection circuit 22 determines whether or not the frame is a color frame by detecting the luminance level or the color level at several points (marked by X in FIG. 4) where the color frame at the time of recording can be detected.

FIG. 5 is a block diagram showing a specific example of a color frame (white frame) detection circuit for detecting a white frame. A video signal reproduced by a VTR-integrated video camera (not shown) is supplied to the sync separation circuit 31 as a video input signal. The synchronization separation circuit 31 separates horizontal and vertical synchronization signals from the video input signal, outputs the separated synchronization signals 31a, and generates and outputs a frame pulse signal 31b. Each synchronization signal 31a is supplied to a counter 32. The counter 32 increments a counter that counts the horizontal scanning position of the image based on each synchronization signal 31a, and increments a counter that counts the horizontal scanning line number. The decode 33 outputs the count output 3 of the counter 32.
Based on 2a, a color frame (white frame) detection position pulse signal 33a is output at a preset color frame (white frame) detection pixel position (for example, the position indicated by a cross in FIG. 4).

A digital input image DI obtained by digitizing a video input signal is supplied to a 3 × 3 pixel filter 34. The 3 × 3 pixel filter 34 removes reproduction noise and the like of the VTR-integrated video camera, obtains a luminance level, and outputs the luminance level as a luminance signal 34a. Brightness signal 34a
Is supplied to the comparison circuit 35. The comparison circuit 35 is 3 × 3
The luminance level (luminance signal) 34a output from the pixel filter 34 is compared with a preset white level (for example, 220 LSB when the digital input image is 8 bits), and the luminance level (luminance signal) 34a is equal to or higher than the white level. In the case of, an H-level comparison result 35a is output, and when the luminance level (luminance signal) 34a is less than the white level, an L-level comparison result 35a is output. The comparison result 35a is supplied to the data input terminal of the first stage D-type latch circuit 361.

The four D-type latch circuits 361 to 364 are connected in cascade, and each of the D-type latch circuits 361 to 364 is connected.
Are supplied to the clock input terminals of the respective color frames (white frame), and the comparison result 35a output from the comparison circuit 35 is sequentially shifted for each color frame (white frame) detection position. . Therefore, when the comparison results 35a at the four color frame (white frame) detection positions are all equal to or higher than the white level, each of the D-type latch circuits 361 to 36
4 are all at H level. The output (Q output) of each of the D-type latch circuits 361 to 364 is ANDed (logical product) by the 4-input AND circuit 37, so that the comparison result 35a at the four color frame (white frame) detection positions is obtained. If all are at the white level or higher, the color frame of the H level (white frame)
The detection signal 37a is output. With the above configuration, the color frame (white frame) is detected for each frame or each field, and the detection result is output via the 4-input AND circuit 37. Color frame (white frame) detection signal 3
7a is supplied to the output timing control circuit 38.

When the output timing control circuit 38 recognizes that the video input signal is a still image mode image having a color frame (white frame) based on the color frame (white frame) detection signal 37a, the synchronization separation circuit 31 A white frame (white frame) detection output 22a is generated in synchronization with the start timing of a frame based on the frame pulse signal 31b supplied from. The output timing control circuit 38 outputs the frame pulse signal 31b
Is counted, the output of the white frame (white frame) detection output 22a is stopped after a predetermined time (when the predetermined number of frames is reached). When the color frame (white frame) detection signal 37a changes from the H level to the L level (color frame non-detection state), the output timing control circuit 38 synchronizes with the end timing of the frame. The output of the detection output 22a is stopped.

Although FIG. 5 shows a configuration in which a white frame is detected based on a luminance level, not only the luminance level but also the chrominance signal level is supplied to the comparison circuit, and the luminance level is compared with the luminance threshold level. In addition, by comparing the color signal level with the color signal threshold level, the detection accuracy of the white frame may be improved. FIG. 5 shows an example in which a white frame is detected. However, when the still image mode is indicated by a specific color frame such as a black frame, the specific color frame is detected.

FIG. 6 is an explanatory view showing another example of the still image determination mark. Color frame (white frame) as a mark indicating a still image
Instead of using a color band, a color band or a color mark can be used. FIG. 6A shows an example in which a color band (for example, a white band) is provided at the upper part of the image. The color band may be provided at the bottom, right end, and left end of the image. FIG. 6B shows an example in which a rectangular color mark (for example, a white mark) is provided at a corner of an image. FIG.
(B) shows an example in which the color mark is provided at the upper left corner of the image, but the color mark may be provided at another corner. Further, color marks may be provided at a plurality of corners such as upper left and right corners, lower left and right corners, and two opposite corners. The still image detection circuit (color frame detection circuit) may have any configuration as long as it can detect a still image based on the shape, position, and color of the still image determination mark.

FIG. 7 is a block diagram of an image noise reduction apparatus according to a third aspect. An image noise reduction device 41 shown in FIG. 7 is provided with a still image code detection circuit 42 instead of the color frame detection circuit 22 shown in FIG. 3, and the other configuration is the same as that shown in FIG. is there. When the still image code detection circuit 42 detects a still image code superimposed within a vertical blanking period of a video input signal supplied from a VTR integrated video camera (not shown), the still image code detection output (still image detection output) ) 42a. When the still image code is no longer detected, the still image code detection circuit 42 stops the output of the still image code detection output (still image detection output) 42a. The still image capture control unit 23 switches the switch circuit 2 based on the still image code detection output (still image detection output) 42a.
6 is turned on, so that the cyclic noise reduction circuit 24 is operated to store the noise-reduced still image in the image memory 9.
Can be captured.

The image noise reduction device 41 shown in FIG.
When the still image code detection circuit detects that the video input signal is a still image, the still image can be automatically captured. Therefore, in the video printer equipped with the image noise reduction device 41 shown in FIG.
After playing back an image shot in the still image mode (commemorative photo mode) with the R-integrated video camera, inputting a printout request prints the image shot in the still image mode (commemorative photo mode). can do. The conventional video printer has a problem that the timing of image capture is difficult. However, the video printer including the image noise reduction device 21 shown in FIG. 3 can solve the problem that the timing of image capture is shifted. .

FIG. 8 is an explanatory diagram showing a superimposed position of a still picture code. When a video camera integrated with a VTR (not shown) is recorded in a still image mode (commemorative photo mode), a video signal on which a still image code indicating the still image mode is superimposed within a vertical blanking period is superimposed. Is generated and recorded. The still image code is, for example, a horizontal scanning line 1 within the character signal superimposable period within the vertical blanking period.
4H to 16H and 277H to 279H.

In FIGS. 7 and 8, a still picture code indicating that the picture is a still picture is superimposed in the character signal superimposable period in the vertical blanking period, and the still picture code is detected to detect the video input signal. Has been described as a still image, but a VTR-integrated video camera (not shown) has a white level indicating a still image when recorded in a still image mode (commemorative photo mode). The video signal of the pedestal level (black level) at the time of other moving images is, for example, the horizontal scanning lines 14H to 16H and 27.
7H to 279H may be superimposed and recorded.
In this case, the still image detection circuit on the image noise reduction device side
Horizontal scanning lines on which still image information is superimposed (for example, horizontal scanning lines 14H to 16H and 277H to 279H)
Is a white level or a pedestal level (black level) to determine a still image / moving image. If the image is a still image, a still image detection output is output. If the image is a moving image, a still image is output. The detection output is configured to be stopped.

FIG. 9 is a block diagram of an image noise reduction apparatus according to a fourth aspect. The image noise reduction device 51 shown in FIG. 9 is provided with a motion detection type still image detection circuit 52 instead of the still image detection circuit 12 shown in FIG. 2, and the other configuration is the same as that shown in FIG. Is the same. The motion detection still image detection circuit 52 includes an image memory, a motion detection circuit, and the like. The motion detection still image detection circuit 52 detects motion between frames or between fields, and determines that the image is a still image when the detected motion is equal to or smaller than a preset threshold value or when no motion is detected. The motion detection still image detection circuit 52 generates a still image detection output 52a when determining that the input image is a still image, and detects a still image when determining that the input image is not a still image (moving image). The output of the output 52a is stopped. The motion detection type still image detection circuit 52 may be configured using, for example, a camera shake correction circuit of a video camera.

The image noise reduction device 51 shown in FIG.
Since the configuration is such that motion detection of the input image is detected to determine whether or not the image is a still image, the signal input to the image noise reduction device includes a color frame or a still image code indicating that the image is a still image,
The image signal need not be a multiplexed image signal of a white level video signal indicating a still image, but may be a normal television signal, a reproduction signal from a VTR, a reproduction signal from a VTR integrated video camera, or the like. When the input image is a still image, the image noise reduction device 51 shown in FIG. 9 automatically sets the image to be captured via the cyclic noise reduction circuit 14, so that a noise-reduced still image is obtained. be able to.

[0052]

As described above, the image noise reduction apparatus according to the present invention has a configuration in which when detecting that the input image is a still image, the input image is taken in through the cyclic noise reduction circuit. In addition, a still image in which noise has been reduced by the cyclic noise reduction circuit can be captured without performing an operation of designating a still image or an operation of operating the cyclic noise reduction circuit. Therefore, a still image with reduced noise can be printed out or displayed on a screen or the like.

An image noise reduction apparatus according to the present invention detects that an input image is a still image based on a color frame and a color band of the input image, and takes in the input image via a cyclic noise reduction circuit. Therefore, an operation for instructing that a reproduced image (still image) of an image captured by the VTR integrated video camera using the still image mode (commemorative photo mode) as a still image and a cyclic noise reduction circuit are provided. It is possible to capture a still image in which noise is reduced by the cyclic noise reduction circuit without performing an operation or the like for operating. Therefore, it is possible to print out a good image with reduced reproduction noise in a VTR-integrated video camera.

The image noise reduction apparatus according to the present invention detects that the image is a still image based on the still image code superimposed during the vertical blanking period, and takes in the still image via the cyclic noise reduction circuit. Therefore, a still image in which noise has been reduced by the cyclic noise reduction circuit can be captured without performing an operation of instructing that the image is a still image or an operation of operating the cyclic noise reduction circuit.

The image noise reduction apparatus according to the present invention detects a still image based on the motion of the input image and takes in the still image via the cyclic noise reduction circuit. Even if information indicating a still image, such as a frame or a still image code, is not included, a still image with reduced noise can be captured via the cyclic noise reduction circuit. In addition, a still image in which noise has been reduced by the cyclic noise reduction circuit can be captured without performing an operation of instructing that the image is a still image or an operation of operating the cyclic noise reduction circuit.

The image noise reduction apparatus according to the present invention
Even when an image deteriorated due to dropout is input in a reproduction system such as a TR / VTR integrated video camera or the like, the image is taken in via a cyclic noise reduction circuit, thereby suppressing the effect of image deterioration and providing a good static image. Images can be obtained. Even when an image having vertical line distortion due to jitter or the like is input in a reproduction output of an analog VTR or the like, the image is captured through the cyclic noise reduction circuit, thereby distorting the vertical line due to jitter or the like. And a good still image can be obtained. Since the still image is taken in through the cyclic noise reduction circuit, only the noise component of the input image is reduced, and a clear still image can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram of an image noise reduction apparatus according to claim 1;

FIG. 2 is a block diagram of another image noise reduction device according to claim 1.

FIG. 3 is a block diagram of an image noise reduction apparatus according to claim 2;

FIG. 4 is an explanatory diagram showing an example of a color frame detection position.

FIG. 5 is a block diagram showing a specific example of a color frame (white frame) detection circuit for detecting a white frame.

FIG. 6 is an explanatory diagram showing another example of a still image determination mark.

FIG. 7 is a block diagram of an image noise reduction device according to claim 3;

FIG. 8 is an explanatory diagram showing a superimposed position of a still image code.

FIG. 9 is a block diagram of an image noise reduction device according to claim 4.

FIG. 10 is a block diagram of a video printer.

FIG. 11 is an explanatory diagram of a still image mode (commemorative photo mode) of the VTR integrated video camera.

FIG. 12 is a block diagram of a cyclic noise reduction circuit.

[Explanation of symbols]

1, 11, 21, 41, 51 ... image noise reduction device,
2, 12: Still image detection circuit, 3, 23: Still image capture control circuit, 4, 14, 24: Cyclic noise reduction circuit, 7: First multiplier, 8: Adder, 9: Image memory, 10 ... second
A multiplier for setting a still image capture control circuit; an image memory write / read control circuit (memory control circuit); a color frame detection circuit; an analog signal processing unit; 28: A / D converter, 42: Still image code detection circuit, 52: Motion detection still image detection circuit.

Claims (4)

[Claims] 1. A still image detection circuit for detecting that an input image is a still image, a cyclic noise reduction circuit having a multiplier, an adder and an image memory, and a still image detection output of the still image detection circuit A still image capture control circuit for obtaining a still image with reduced noise by capturing the input image via the cyclic noise reduction circuit for a predetermined time based on the input image. . 2. A cyclic noise having a color frame detecting circuit for detecting that an input image includes still image information such as a color frame and a color band indicating a still image, a multiplier, an adder and an image memory. A configuration that obtains a still image in which noise is reduced by capturing the input image via the cyclic noise reduction circuit over a predetermined time based on a still image detection output of the color frame detection circuit. An image noise reduction device, characterized in that: 3. A still image code detection circuit for detecting that an input image is a still image by detecting a still image code superimposed during a vertical blanking period, a multiplier, an adder, and an image memory. A cyclic noise reduction circuit,
By taking in the input image over a predetermined time based on the still image detection output of the still image code detection circuit or through the cyclic noise reduction circuit while the still image code is being detected. An image noise reduction device, wherein a still image with reduced noise is obtained. 4. A circuit comprising a motion detection still image detection circuit for detecting the motion of an input image and detecting that the input image is a still image based on the detected motion, a multiplier, an adder, and an image memory. A noise reduction circuit that captures the input image through the cyclic noise reduction circuit for a predetermined time based on a still image detection output of the motion detection still image detection circuit. An image noise reduction device, wherein an image is obtained.