JPH11191826A - Linear image sensor, its driving method and image reader - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the mismatch of linearity characteristics by providing first and second charge transfer registers and a charge sweeping part for sweeping charges in the first charge transfer register. SOLUTION: A photodiode(PD) 4501 is composed of a light shielding (OB) area 4514 and a read area 4515, and its odd-numbered pixel charges are further distributed to odd and even numbers inside, respectively transferred to transfer registers 4504 and 4505 and outputted from output amplifiers 4518 and 4519. Besides, the even-numbered pixel charges of the PD 4501 are similarly further distributed to odd and even numbers as well, respectively transferred to transfer registers 4503 and 4502 and outputted from output amplifiers 4517 and 4516. Besides, change sweep parts 101 and 102 are adjacent to the respective outside transfer registers 4502 and 4505, are controlled by external impressed voltages and simultaneously sweep away all the charges stored in the outside transfer registers 4502 and 4505 wen operation is in a ON state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a linear image sensor having an image reading device such as a CCD linear sensor used for an image reading device such as a digital copying machine or a flatbed scanner or an image processing device, and more particularly to a photoelectric conversion device for a photodiode. The present invention relates to a linear image sensor that corrects the linearity of an output of a CCD area sensor that performs transfer between registers from a conversion unit, a driving method thereof, and an image reading device.

[0002]

2. Description of the Related Art In recent years, in image reading apparatuses and image processing apparatuses such as digital copiers and flatbed scanners, demands for the quality and high speed of read images have been increasing, and new products satisfying such demands have been developed. It is increasing over many types.

FIG. 19 is a conceptual diagram showing an example of a single-row CCD linear sensor mounted on a conventional digital copying machine or the like. In FIG. 19, the CCD linear sensor 40
00 denotes a photodiode 4001 (hereinafter referred to as a PD), two transfer registers 4003 and 4004 arranged on both sides of the PD 4001, and a shift for transferring charges from the PD 4001 to the transfer registers 4003 and 4004 at one time. Gates 4002 and 4005 (hereinafter referred to as SH gates) and an output amplifier 400 for sequentially outputting charges horizontally transferred from the transfer registers 4003 and 4004
6,4007.

Here, the PD 4001 has a light-shielded area 4008 (hereinafter referred to as an OB area) which is physically shielded from light.
ack area) and an area 40 for reading an image.
09.

[0005] The PD 4001 is composed of a plurality of pixels. In general, the longitudinal direction of A4 size paper is 400 dpi.
When reading with, the reading area 4009 is 5,000
In the case of 600 dpi, it is composed of 7,500 pixels.

The odd-numbered pixels among the pixels constituting the PD 4001 are transferred to the transfer register 4003, and the even-numbered pixels are transferred to the transfer register 4004. The odd-numbered and even-numbered pixel signals are output from the output amplifiers 4006 and 4007, respectively. Each is output.

[0007] Such a CCD linear sensor is generally manufactured in cross section by a manufacturing process using two layers of aluminum wiring. The first layer of aluminum is used for wiring and the second layer of aluminum is used for light shielding. Often.

FIG. 20 shows an example of an image processing circuit when the CCD linear sensor 4000 is used. The odd-numbered pixel signal and the even-numbered pixel signal output from the CCD linear sensor 4000 have their DC components removed by coupling capacitors 4101 and 4102, and the clamp circuits 4103 and 4104.
(Hereinafter referred to as a CP circuit), and after being amplified to a predetermined level by gain control amplifiers 4105 and 4106 (hereinafter referred to as AMP),
After being clamped to a predetermined level again by P circuits 4110 and 4111, AD converters 4107 and 4108 (hereinafter, AD converters)
), And the digital image processing circuit 4109 performs processing such as scaling, color processing, and error diffusion.

The clamping performed by the CPs 4103 and 4104 is for securing a dynamic range of the amplification processing of the AMPs 4105 and 4106.
The clamp processing at 110 and 4111 is for setting a black reference at the time of AD conversion.
8 based on the eight image levels. This is CCD40
This is to correct the influence of the thermal noise generated at 00.

However, with the advent of high image quality, which is a characteristic of digital copiers, and low-priced digital copiers in line with analog copiers in recent years, digital image readers (such as digital copiers and flatbed scanners) have rapidly spread to the market. Is coming.

In order to improve productivity, there is a strong demand for higher speed in the market, and in order to realize this, parallel processing is the simplest and effective means.

FIG. 21 shows an example of a CCD linear sensor which achieves high speed based on such a background. In FIG. 21, a CCD linear sensor 4500 includes a PD 450
1 and four transfer registers 4502, 4503, 4504, 4505 arranged two on each side of the PD 4501.
, SH gates 4506, 4507, inner transfer registers 4503, 4504, and outer transfer register 450
Store 4 gates 4509 and 4510 for distributing electric charges to 24,505 and Store 2 gates 4508,45.
11 (hereinafter referred to as ST1 and ST2 gates), transfer gates 4512 and 4513 (hereinafter referred to as TG gates) for controlling charge transfer between the inner and outer transfer registers, and four output amplifiers 4516 and 45 for the inner and outer transfer registers.
17, 4518 and 4519.

The PD 4501 is composed of an OB area 4514 and a reading area 4515. The odd-numbered pixel charges are further divided into odd-numbered and even-numbered charges and transferred to transfer registers 4504 and 4505, respectively, and output from output amplifiers 4518 and 4519. Is done.

Similarly, even-numbered pixel charges of the PD 4501 are further divided into odd-numbered and even-numbered charges, transferred to transfer registers 4503 and 4502, respectively, and output from output amplifiers 4517 and 4516.

In summary, the odd-numbered charges of the odd-numbered pixels → the inner transfer register 4
504: Even-numbered charges of odd pixels → outside transfer register 4
505 further odd-numbered charges of even-numbered pixels → inner transfer register 4
503: Even-numbered charges of even-numbered pixels → outer transfer register 4
502.

FIG. 22 shows the transfer register 4 from the PD 4501.
5 schematically illustrates the transfer of charges to 502, 4503, 4504, and 4505.

Transfer registers 4502, 4503, 450
Since 4,4505 is transferred by two-phase driving of clock pulses φ1 and φ2, φ1 gates and φ2 gates are alternately arranged.

The TG gate is provided adjacent only to the φ1 gate, and the ST1 gates 4509, 4510, ST2
The gates 4508 and 4511 are alternately arranged at a rate of one gate for two pixels of the PD 4501.

In FIG. 22, (1) shows an initial state (PD
4501), only the charge of four pixels is shown for explanation. The charge is represented by ●.

In FIG. 22 (2), an SH gate 450
6,4507 and ST1, ST2 gates 4508,4
509, 4510, 4511 are turned ON, and as shown in FIG.
The charge moves to 09, 4510, 4511.

In FIG. 22C, ST1 gate 4
508, 4510 are OFF, φ1 gate is ON, ST
From one gate 4508, 4510 to the inner transfer register 45
The charge moves to the φ1 gate of 03,4504.

Since the ST2 gates 4509 and 4511 remain ON, no charge is transferred from the ST2 gate.

In FIG. 22D, φ1 gate is O
FF is performed and the TG gates 4512 and 4513 are turned ON, and the TG gate 45 is output from the inner transfer registers 4503 and 4504.
The charge moves to 12,4513. Even at this timing, since the ST2 gates 4509 and 4511 remain ON, no charge is transferred from the ST2 gate.

In FIG. 22 (5), the TG gate 45
12, 4513 are turned off, φ1 gate is turned on, and TG
Outer transfer register 450 from gates 4512 and 4513
The charge moves to the 24505 φ1 gate. At the same time, ST2 gates 4509 and 4511 are turned off,
T2 gate 4509, 4511 to inner transfer register 4
Charge transfer to the φ1 gate of 503, 4504 is also performed,
At this timing, the charge transfer from the PD 4501 to the four transfer registers 4502, 4503, 4504, and 4505 is completed.

Thus, the transfer registers 4502, 450
The image charge transferred to 3,4504,4505 is φ
Horizontal transfer is performed by two-phase driving in which the 1 and φ2 gates alternately turn on and off alternately, and are output from the output amplifier.

The CCD linear sensor 4500 repeats the above operation to read an image. Since a CCD having a complicated structure such as the CCD linear sensor 4500 has a complicated structure to cope with high speed, the wiring is also complicated. Therefore, in the manufacturing process using the two-layer aluminum wiring, the first and second layers of aluminum are both used for wiring. May be used.

[0027]

However, FIG.
In a CCD photoelectric conversion device having a complicated structure as described in the above section, there is a possibility that the light shielding by the aluminum wiring may be insufficient, and thus a problem due to light leakage may be caused.

More specifically, a CC that performs inter-register transfer like the CCD linear sensor 4500 described with reference to FIG.
When light leakage occurs in the D linear sensor, there arises a problem that the linearity characteristics are different between the inner and outer transfer registers.

This is from the PD 4501 to the transfer register 45.
02, 4503, 4504, and 4505, at the stage of FIG.
This occurs because the residual charge remaining in the transfer registers 03, 4504 is also transferred to the outer transfer registers 4502, 4505.

FIGS. 23, 24, 25, 26 and 27
The problem of the light leakage charge, the residual charge, and the linearity will be described with reference to FIG.

FIG. 23 shows a portion of the CCD linear sensor 4500 where light leaks. In the same drawing, SH gates 4506 and 4507 indicated by “A”, store 1 gates 4508 and 4510, and store 2 gates 4509 and 4
The two regions 511 are light leaking portions, and light leaking charges generated by the light leaking always leak into the inner transfer registers 4503 and 4504.
Therefore, even if the horizontal transfer described above is completed, a certain amount of charge due to light leakage corresponding to the amount of light remains in the inner transfer registers 4503 and 4504. This becomes "residual charge".

FIG. 23 (2) shows the incident light amount and the output waveforms of the inside and outside. When attention is paid to the signal in the OB area, it can be seen that the output of the outside transfer register fluctuates according to the incident light amount.

This is a phenomenon that occurs after the horizontal transfer because charges remaining in the inner transfer register due to light leakage are transferred to the outer transfer register by inter-register transfer performed prior to the horizontal transfer. That is, the influence of the light leakage affects not only the inner transfer registers but also the outer transfer registers.

Light leakage charge is also transferred to the transfer register and output in the same manner as the charge read by the PD 4501.

FIG. 24 is a diagram showing how the light leakage charge is distributed to the outer transfer register 4502 and the inner transfer register 4503.

FIG. 24A shows the state of the outer transfer register 4502 and the inner transfer register 4503 at the time when the charge transfer from the PD 4501 to each transfer register is completed.
A portion corresponding to the B area 4514 is illustrated as an OB area. In addition, for simplicity of description, the state after the completion of the charge transfer from the PD 4501 to the transfer register without light leakage is shown in this state.

FIG. 24 (2) shows a distribution of residual charges in each register after the charges shown in FIG. 24 (1) have been horizontally transferred. The reason for this distribution is as follows.

In the CCD linear sensor 4500,
The number of pixels of the PD 4501 is 50 in the reading area 4515.
00 pixels, OB area 4514 is 1000 pixels total 60
Assuming that there are 00 pixels, four transfer registers 4502 and 45
Each of 03, 4504, and 4505 performs 1500 stages of horizontal transfer, which includes 1250 read pixels per transfer register and 250 stages in the OB area.

Light leakage charge is uniformly generated in each stage by Δn, and is added and transferred for each horizontal transfer stage. Also,
Since light leakage charge does not occur in the OB area, the noise of light leakage charge (1250-1) × Δn added in the 1250-stage read area is uniformly distributed in the OB area of the transfer register. (1
250-1) .times..DELTA.n noise, which is sequentially reduced backward by .DELTA.n for each stage, and becomes 0 at the final stage.

The outer transfer register 2502 has a uniform distribution because there is no leakage of surplus charges due to light leakage.

FIG. 24 (3) shows an inner transfer register 450.
3 shows the distribution after inter-register transfer from No. 3 to the outer transfer register 4502.

It can be seen that all the light leakage charges in the inner transfer register have been transferred to the outer transfer register by the inter-register transfer.

Actually, the signal charges read by the PD 4501 are added to the distribution shown in FIG.

In FIG. 24, the transfer registers 2502,
The transfer register 2504 has been described.
The same applies to 2505.

FIG. 25 shows the generation characteristic of light leakage charge with respect to the amount of incident light. The generation characteristic of the light leakage charge does not necessarily show a linear characteristic with respect to the incident light amount. In FIG. It has become.

One cause is the photoelectric conversion characteristic of the portion where the light leaks, which is considered to have a saturation characteristic like a photodiode. In this conventional example, the characteristics shown in FIG. 25 will be described below as light leakage characteristics.

FIG. 26 is a circuit block diagram in the case where the CCD linear sensor 4500 is used. The circuit block shown in FIG.

In FIG. 26, reference numerals 4112 to 4122 denote parts added to the circuit block diagram of FIG. 20, and four transfer registers 4502, 4503, 4504 and 450 output from the CCD linear sensor 4500.
5 are coupling capacitors 4101,
After the DC components are removed in 4102, 4112, and 4113, the CP circuits 4103, 4104, 4114, and 4115 are used.
Is clamped for post-processing by the AMP 410
5, 410, 4116, and 4117, the signal is amplified to a predetermined level, and the CP circuits 4110, 4111, 4118, and 41 are amplified.
At 19, it is clamped to a predetermined level based on the OB area 4514, and AD4107, 4108, 4120, 41
The digital data is converted into digital data at 21 and various processes are performed at the digital image processing circuit 4122.

As described above, the light leakage noise shown in FIG. 25 with respect to the incident light amount exists in the OB area of the outer transfer register due to the light leakage, so that the OB area is changed by the CP circuits 4110 and 4119 in FIG. The outputs of the outer transfer registers 4502 and 4505 clamped as the reference and the outputs of the inner transfer registers 4503 and 4504 clamped by the CP circuits 4111 and 4118 are shown in FIG.
As shown in the figure, up to 10% is the black level, 10 to 100%
Up to this point, the characteristics have the same slope as the inner transfer register.

Further, in FIG. 24, an example was described in which uniform light was applied to the entire surface. However, the light leakage charge level affecting the OB area of the outer transfer register changes depending on the distribution of the incident light amount. The difference in the linearity characteristics between the outputs also depends on the incident light amount distribution.

As a countermeasure for this, it is conceivable to perform correction using a look-up table before the digital image processing circuit 4122.

However, the output of the outer transfer register is shown in FIG.
As shown in (1), since blackout occurs up to the 10% light amount, correct look-up table data cannot be created only by the output of the outer transfer register.

Further, since data near the black level greatly affects the print image, it is difficult to use a single look-up table for both a character original emphasizing contrast and an image original emphasizing gradation. It is.

[0054]

According to the present invention, in order to solve the above-mentioned problems, at least one row of photodiodes, a first charge transfer register provided on one side of the photodiode row, A second charge transfer register provided between the diode array and the first charge transfer register; and a charge sweeping unit for sweeping out the charge of the first charge transfer register. We propose a linear image sensor.

In the driving method of the linear image sensor, the signal charge from the photodiode array to the second charge transfer register is transferred, and the signal charge is transferred from the second charge transfer register to the first charge transfer register. The remaining charge is transferred, the charge remaining in the first charge transfer register is swept away by a charge sweeping section, and the signal charges of the first and second charge transfer registers are horizontally transferred.

Further, at least one photodiode row and two photodiode rows provided on one side of the photodiode row are provided.
In an image reading apparatus having a charge transfer register of at least one row and a linear image sensor for transferring charges between the charge transfer registers of at least two rows, the photodiode array of the two or more charge transfer registers may be provided. Detecting means for detecting the amount of light incident on the linear image sensor from the output of the first charge transfer register disposed at a position close to the first charge transfer register, and a detector other than the first transfer register among the two or more charge transfer registers. A control means for controlling the clamp level of the output of the transfer register in accordance with the result of the detection means is provided.

Also, in the image reading apparatus, a CCD linear sensor having photoelectric conversion means for converting light from a document into an electric signal and a plurality of charge transfer means for transferring electric charges from the photoelectric conversion means to an output unit as an electric signal. An A / D converter for converting an analog signal from the CCD linear sensor into digital data; an image area separating unit for separating image data from the A / D converter into areas having different image characteristics; Lookup table correction means having table data, and lookup table correction means for performing lookup table correction in accordance with the characteristics of the areas having different image characteristics separated by the image area separation means. Features.

Also, in the image reading apparatus, photoelectric conversion means for converting light from the original into an electric signal, first charge transfer means for transferring the electric charge from the photoelectric conversion means as an electric signal to an output unit, From the photoelectric conversion means to the first
Charge transfer means for transferring charges as an electric signal to an output unit in parallel with the first charge transfer means through the charge transfer means, and the first charge transfer means and the second charge transfer means A that converts the signal output from the
/ D conversion means, and a first correction means for correcting the linearity of the digital data A / D converted from the first charge transfer means.
And a second look-up table for correcting the linearity of the digital data A / D-converted by the second charge transfer means, wherein the second look-up table is the first look-up table. It is characterized by being determined by correction data corresponding to an output from the charge transfer means and the second charge transfer means.

[0059]

Embodiments of the present invention will be described below in detail with reference to the drawings.

[First Embodiment] FIG. 1 is a view showing a CCD linear sensor 100 according to a first embodiment of the present invention. In FIG. 1, the CCD linear sensor 100 is
Conventional example CCD linear sensor 4500 shown in FIG.
In FIG. 21, the same portions as those in FIG. 21 are denoted by the same reference numerals.

That is, the CCD linear sensor 100 includes a PD 4501 including an OB area 4514 and a reading area 4515, and four transfer registers 4502 to 4505 arranged two on each side of the PD 4501.
SH gates 4506, 4507, inner transfer registers 4503, 4504, and outer transfer registers 4502, 4
Store 1 gate 450 for distributing charge to 505
8, 4510 and store 2 gate 4509, 4511
(Hereinafter referred to as ST1 and ST2 gates) and a transfer gate 4 for controlling charge transfer between the inner and outer transfer registers.
512, 4513 (hereinafter referred to as a TG gate) and four output amplifiers 4516 to 451 for inner and outer transfer registers.
9 are configured.

Further, the PD 4501 has an OB area 451
4 and a reading area 4515. The odd-numbered pixel charges are further divided into odd-numbered and even-numbered charges, and transferred to the transfer registers 4504 and 4505, respectively.
Output from output amplifiers 4518 and 4519.

The even-numbered pixel charges of the PD 4501 are similarly further divided into odd-numbered and even-numbered charges, transferred to the transfer registers 4503 and 4502, respectively, and output from the output amplifiers 4517 and 4516.

The charge sweeping units 101 and 102
Adjacent to the outer transfer registers 4502 and 4505, respectively, and controlled by an externally applied voltage (not shown).
It has a function of sweeping out all the electric charges accumulated in the 4505 at the same time. Further, when the operation is OFF, the electric charges stored in the outer transfer registers 4502 and 4505 are not affected at all. Structurally, ST1, ST
It may have the same structure as either two gates or TG gate,
No special process is required in the manufacturing process.

FIG. 2 shows an example of the drive timing for one cycle of the CCD linear sensor 100, and an image is read by repeating this timing. That is, during one horizontal synchronization period, the outer transfer registers 4502, 4505
Is transferred to the charge sweeping units 101 and 102 having a register or a gate structure, and then the charge sweeping unit 10 is transferred.
An externally applied voltage is applied to 1, 102 to sweep out residual charges. Thereafter, signal charges of the PD 4501 are accumulated in the outer transfer registers 4502 and 4505 as odd or even charges, and are sequentially horizontally transferred from the amplifiers 4519 and 4516.

FIG. 3 shows the CCD linear sensor 100 in FIG.
Inner transfer register 4 when driven at the timing shown in FIG.
503 and the state of the outer transfer register 4502.

FIG. 3A shows the inner transfer register 4503 and the outer transfer register 4502 at the start of the horizontal transfer period in FIG.
In this state, the influence of light leakage does not appear in the OB area.

FIG. 3B shows the state after the end of the horizontal transfer period shown in FIG. 2. As described in the conventional example, the inner transfer register 4503 has noise uniformly distributed in the OB area 4514 due to light leakage, and the read area 4515. , Noise charges having a distribution that decreases gradually toward the rear of the transfer register remain. There is no residual charge due to light leakage in the outer transfer register 4502.

FIG. 3C shows a state after the transfer (residual charge) between the registers in FIG. 2 is completed. During this period, PD4501
Since no signal charge transfer is performed from the first transfer register to each transfer register, in FIG. 3B, all residual charges in the inner transfer register 4503 are transferred to the outer transfer register 4502, and the charge in the inner transfer register 4503 becomes zero.

FIG. 3D shows the state after the end of the sweeping operation in FIG. 2, and the charge is swept from the outer transfer register 4502 to the sweeping unit 101.
The residual charge of both the outer transfer register 4502 is zero.

Next, charge transfer from the PD 4501 in FIG. 2 to each transfer register is performed, and the state in the transfer register after the transfer is completed is as shown in FIG. 3A again, and the above operation is repeated.

Therefore, in the horizontal transfer start state, as shown in FIG. 3A, the light leakage charge does not enter or remain in the OB area 4514. No inconsistency occurs.

[Second Embodiment] FIG. 4 shows a conventional example shown in FIG.
FIG. 14 is a block diagram of an image processing circuit using the CCD linear sensor 4500 indicated by.

In FIG. 4, the CCD linear sensor 45
The charge transferred by the inner transfer register 4503 of 00 is output from the output amplifier 4517 and input to the CP (clamp) circuit 103 via the coupling capacitor 91.

In the CP circuit 103, a bias is set for the subsequent processing, and the amplified signal is amplified to a predetermined level by the AMP 105.

Thereafter, the signal is clamped to the black reference level at the time of AD conversion by the CP circuit 107, converted into digital data by the AD 109, and input to the digital image processing circuit 116.

The signal clamped by the CP circuit 107 is
The signal level of the OB area is detected by the OB sampling circuit 111, compared with the reference voltage 113 set as a black reference by the comparator 112, clamped by the CP circuit 107 based on the comparison result, and subjected to feedback control.

On the other hand, the electric charge transferred by the outer transfer register 4502 of the CCD linear sensor 4500 is output from the output amplifier 4516,
2. The same processing is performed up to the CP circuit 104 and the AMP 106. After being clamped to the black reference level by the CP circuit 108, the data is converted into digital data by the AD 110 and input to the digital image processing circuit 116.

The clamp level set value of the CP circuit 108 is controlled by the output of the inner transfer register 4503. Specifically, the output of the AD 109 is set to the incident light amount detection circuit 1
14 and input the result to the clamp DC conversion circuit 11
5 and the comparator 116 converts the reference voltage 1
13 and feedback control is performed on the CP circuit 108.

The same processing is performed on the other set of outputs (the inner transfer register 4504 and the outer transfer register 4505) output from the CCD linear sensor 4500, and the clamp levels in the CP circuits 127 and 128 are determined by the OB sampling circuit. 111 and incident light amount detection circuit 1
A difference level detected at 14 and compared with the reference voltage 113 is set.

FIG. 5 shows the effect of suppressing the OB level fluctuation due to light leakage. FIG. 5A shows an outer register 450 due to light leakage.
This represents the OB level fluctuation of the output of 24,505, and there is a fluctuation of about 10 mV with respect to the incident light amount of 100%.

FIG. 5 (2) shows the output level with respect to the incident light amount.
A signal output of 4501 is obtained. AD109,1
The A / D conversion of 30 is mainly 8 bits. Generally, the input range of the 8 bit A / D converters 109 and 130 is as follows.
Many are used at 2 V, and the AMPs 105 and 106 are set so that a four-fold amplification is performed and the width of the dynamic range is kept to the maximum.

Therefore, as shown in FIG.
The OB fluctuation due to light leakage at the output of the outer transfer register 4502 input to the P circuit 108 is 40 mV for an incident light amount of 100%.

FIG. 5D shows a control signal level fed back to the CP circuit 108 from the output data of the inner transfer register 4503 converted by the AD 109 via the incident light amount detection circuit 114, the clamp DC conversion circuit 115, and the comparator 116. And, for 100% incident light amount,
40 mV is fed back. Thus, CP10
The OB fluctuation at the output of No. 8 is represented by the sum of FIG. 5 (3) and FIG. 5 (4).

FIG. 5 (5) shows the OB fluctuation of the signal of the outer transfer register 4502 input to the AD 110, detects the amount of incident light from the output of the inner transfer register 4503, and feeds it back to the CP circuit of the signal of the outer transfer register 4502. By performing control, CC that transfers between registers
In the D area sensor 4500, it is possible to correct a mismatch in linearity characteristics between the inner transfer register 4503 and the outer transfer register 4502 due to light leakage.

The above-described light leakage elimination processing is performed by the other inner transfer register 4504 and the outer transfer register 4505.
The same can be said for, and the mismatch of the linearity characteristics can be corrected.

[Third Embodiment] A third embodiment of the present invention will be described with reference to FIGS. FIG. 6 adds an area designating circuit 301 to FIG.
The purpose of this is to improve the correction accuracy.
Reference numeral 01 designates an area for detecting the light amount for the incident light amount detection circuits 114 and 134. The other configuration shown in FIG. 6 is the same as that of FIG. 4, and the blocks with the same reference numerals have the same functions, and overlapping description will be omitted.

This embodiment will be specifically described with reference to FIG. FIG. 7 shows the reading area 4515 and the OB area 45.
14 shows a pattern of light to be incident on the PD 4501 including the light amount level and the output waveform of each of them.

FIG. 7A shows a uniform pattern over the entire reading area 4515 of the PD 4501. The output waveform at this time is the same as the relationship between the incident light amount VS transfer register waveform shown in FIG. It is. Inside transfer register 45
03 and the output of the outer transfer register 4502
The output levels at the incident light amounts of 100%, 50%, and 20% are shown, and the output level of the 0B area 4514 of the outer transfer register 4502 is detected as shown in the figure.

FIG. 7 (2) shows the last one in the transfer direction.
This is the output level of the pattern in which no light hits 00 pixels. The charge caused by the light leakage causes a level change in the outer OB part because the charge remaining in the OB part of the inner transfer register 4503 after the horizontal transfer is transferred to the outer transfer register 4502 between the registers. , And more generally, the efficiency per transfer register stage is 99.99.
% Or more, the OB of the inner transfer register 4503
As for the charge remaining in the portion, the light in the portion located rearward in the transfer direction greatly affects the level fluctuation of the OB portion of the outer transfer register 4502.

Therefore, in FIG. 7 (2), the output at the output of the outer transfer register 4502 with respect to the incident light amount level
The fluctuation in the portion B is smaller than that in FIG.

FIG. 7 (3) shows a pattern in which light shines only on the last 100 pixels. For the above-mentioned reason, in this case, the level change of the OB section of the outer transfer register 4502 is shown in FIG. 7 (1). It is smaller than the case, but larger than the case of FIG.

The area designating circuit 301 shown in FIG. 6 designates the area of the rear 100 pixels of the transfer register, and according to the incident light amount of the rear 100 pixels, the CP circuits 108 and 128 respectively.
By performing the feedback control, more accurate linearity correction can be performed. That is, the charge level of the light leakage signal is determined by the amplifier 4 during the output of the outer transfer register 4502.
Since the large amount appears on the 516 side and the charge of the last pixel hardly appears, an image signal from which the light leakage level is removed can be obtained by limiting the area of the last 100 pixels to the reference of the amount of incident light. Can be.

The respective voltage levels and the like in the above embodiment are examples, and are not limited to the above numbers. In the above embodiment, the same applies to the outer transfer register 4505 side, and the influence of the light leakage signal on the clamp level in the CP circuits 107 and 128 can be almost eliminated.

[Fourth Embodiment] The C according to the present invention will be described below.
A fourth embodiment showing a method of correcting CD linearity deterioration will be described with reference to the drawings.

FIG. 8 is a schematic block diagram showing the configuration of the image area separating means and the LUT correcting means according to the present embodiment using the CCD linear sensor 4500 shown in FIG. In this embodiment, a configuration for correcting the degradation of the CCD linearity of the output after the transfer to the outer register 4502 will be described. However, the other three registers 4503 to 4505 have the same configuration.

The embodiment of FIG. 8 shows a CCD line sensor 4500, a coupling capacitor 149, a CP circuit 1
50, AMP 151, AD 141, image area separation circuit 14
2, selector 143, character LUT 144, photograph LUT1
47, character LUT correction 145, photo LUT correction 146,
It is composed of an image processing circuit 148.

In the above-described configuration, the signal output from the CCD line sensor 4500 has its DC component removed by the coupling capacitor 149, clamped to a predetermined level by the CP circuit 150, amplified to a predetermined level by the AMP 151, and Is converted into a digital signal.
Next, the digital signal is supplied to an image area separation circuit 1 including an image memory.
42 determines whether the image is a character or a photograph. The image area separation circuit 142 outputs an image area separation result signal and video data. The image area separation result signal is input to a subsequent-stage selector and used for switching control of a look-up table. The image area separating circuit 142 stores the image in the frame memory, and determines the image area by comparing the memory data with the reference character. Although not shown, the image area separation 14
In parallel with 2, the histogram data is stored in the histogram memory in order to obtain a histogram of the character area, and the threshold value of the character LUT 144 is determined by the CPU.

The selector 143 selects the character data A or the photograph data B for each element using the character or photograph discrimination signal output from the image area separation 142 as a select signal. If it is determined to be character data, the character L
The character LUT correction 145 is performed using the UT 144. If it is determined that the data is photo data, a photo LUT correction 146 is performed using the photo LUT 147. Outputs from the character LUT correction 144 and the photo LUT correction 146 are subjected to processing such as shading and color processing by a common image processing circuit 148.

FIG. 9 shows a case in which the output of the outer transfer register is crushed in the vicinity of black where the amount of incident light is smaller than the output of the inner transfer register.
FIG. 4 is a schematic diagram of a character LUT correction unit 145 using No. 4;

That is, it is assumed that the output of the outer transfer register is crushed in the vicinity of black as compared with the output of the inner transfer register, and the signal output can be detected when the amount of incident light is equal to or more than a predetermined amount of incident light. . This causes the character LUT correction 104 to change the black in both the inner and outer transfer registers from a certain threshold value to the crushed image curve 202. This means that if the input values are distributed near zero, the output is set to zero. If the input is anything else, it is output as is. The threshold value near 0 is determined in advance by the bias of the luminance distribution of the image output from the outer register. With this characteristic, the ridge line of the character can be clearly distinguished, and character recognition can be performed accurately.

FIG. 10 is a photograph LUT according to the present embodiment.
FIG. 4 is a schematic diagram of a photograph LUT correction unit using the image. Similarly to the case shown in FIG. 9, it is assumed that the output of the outer transfer register is crushed in the vicinity of black as compared with the output of the inner transfer register. This causes the photo LUT correction 106 to change the image curve so that the crushed black vicinity of the outer register matches the inner register output. This is because when the output of the position of the outer transfer register corresponding to the position of the inner transfer register is small or absent, the output of the outer transfer register is corrected by the value of the inner transfer register, so that the output value is This is for outputting a gradation linearly. This photo LUT 147 is a stepless chart in which the gradation changes smoothly in advance.
The output level is set in accordance with the input signal, a look-up table is created in consideration of the value of each register of the inner transfer register, and the output of each register of the transfer register is determined.

FIG. 11 shows the structure of the character LUT 144.
The above operation is performed through the RAM. RA in advance
A value obtained by correcting the linearity with respect to each luminance value is stored in M. When the luminance value of the image data is input as an input, an address indicating the luminance value of the image data indicated by the input is accessed to output the value. The corrected value of the luminance value of the image data is output as an output. In addition, photograph L
Since the UT has the same configuration, the description is omitted. However, if the amount of incident light is less than the threshold value, image data is input as 0.
Create T.

FIG. 12 shows a character LUT 1 in this embodiment.
It is the schematic of the histogram which determines the threshold value of 44.
The horizontal axis shows the output of the outer transfer register in 8-bit luminance levels, and the vertical axis shows a histogram curve indicating the appearance frequency of the character image. The portion where the preset threshold value Th overlaps the histogram curve is the zero threshold value of the character LUT 144.

In the above embodiment, an example has been described in which an image signal is processed by being separated into character data and photograph data. However, a photograph includes a pattern other than a character, a background figure, and the like, and the outline of the character is clearly defined. In addition, the linearity characteristics of a photograph can be corrected, and a smooth image can be obtained.

[Fifth Embodiment] FIG. 13 is a schematic block diagram showing a configuration of a fifth embodiment using a CCD line sensor 4500. In the present embodiment, a configuration will be described in which the CCD linearity deterioration of the amplifier output that sequentially outputs the value of each register after the image signal charge is transferred to the outer transfer register 4502 and the inner transfer register 4503 is corrected. Since the other two transfer registers 4504 and 4505 have the same configuration, the description is omitted.

The embodiment of FIG. 13 shows a CCD line sensor 4500, coupling capacitors 601, 602,
CP circuits 603, 604, AMP 605, 606, AD
607, 608, image area separation 609, 610, selector 6
11,612, Character LUT 613, Photo LUT 614,
It comprises a character LUT correction 615, a photo LUT correction 616, and an image processing circuit 617.

In the above configuration, the amplifier 4 from the outer transfer register 4502 of the CCD line sensor 4500
516, Amplifier 451 from inner transfer register 4503
7 is coupled to the coupling capacitor 60
The DC components are removed at 1,602 and the CP circuits 603,6
04, clamped to a predetermined level, and AMP605, 60
After being amplified to a predetermined level in step 6, the signals are converted into digital signals in AD 607 and AD 608. Next, the digital signal is
Image area separation 609, 6 with at least frame memory
According to 10, it is determined whether it is a character or a photograph. The selectors 611 and 612 select the character data A or the photograph data B for each element (arbitrarily for each pixel, each block, etc.) using the signals output from the image area separations 609 and 610 as select signals. If the selector 611 determines that the data is character data, the pixel processing circuit 4 outputs the signal from the output terminal A as it is.
If the image data is determined to be photo data, the photo LU
The correction according to the photo LUT is performed by the photo LUT correction 616 using T614. When the selector 612 determines that the data is photo data, the data is output from the output terminal B as it is, and when it is determined that the data is character data, it is input to the character LUT correction 615, and the character LUT correction is performed using the character LUT 613. The character LUT 613 is created based on the image data determined by the selector 611 as a character. Also a photo LUT
Reference numeral 614 is created based on the image data determined to be a photograph by the selector 612. This corrects linearity degradation by matching one register output with the linearity of the other register output depending on whether it is a character or a photograph.

In the above-described embodiment, the method of generating each LUT for one set of the inner and outer registers has been described. However, a method of generating the LUT from the output average of the inner or outer transfer registers of all channels may be considered. .

The contents described in the above embodiment can be similarly applied to the case of the other transfer register, and the linearity characteristic can be corrected according to the outputs of the inner and outer transfer registers.

[Sixth Embodiment] The C according to the present invention will be described below.
An embodiment of an image reading apparatus having means for correcting CD linearity deterioration will be described with reference to the drawings. In this embodiment, the outer transfer register 4502, the inner transfer register 45
A configuration for correcting the degradation of the CCD linearity of the output after 03 will be described. Since the other two registers 4504 and 4505 have the same configuration, the description is omitted.

FIG. 14 is a schematic block diagram showing the configuration of the image reading apparatus according to the present embodiment using the CCD line sensor 4500 shown in FIG.

FIG. 14 shows an embodiment in which a CCD line sensor 4500, coupling capacitors 161, 162,
CP circuits 163, 164, AMP 165, 166, AD
167, 168, LUT1 (169), LUT2 (17
0) and an image processing circuit 171.

In the above configuration, the signals output from the outer transfer register 4502 and the inner transfer register 4503 of the CCD line sensor 4500 have their DC components removed by the coupling capacitors 161, 162, and the CP circuit 1
It is clamped to a predetermined level at 63, 164 and AMP16
After being amplified to a predetermined level at 5,166, AD167,
At 168, it is converted to a digital signal. The linearity of the digital signal from the inner transfer register 4503 is corrected by the LUT 1 (169). LUT1 (16
In 9), by accessing the address indicated by the luminance value of the output of the inner transfer register 4503, a value corrected to ideal linearity is output as an output.
As shown in FIG. 2, when image data 2 is input, LU
T1 (169) uses the input level of the digital data as an address, outputs data of an ideal value corresponding to the address, and outputs corrected image data. The digital signal from the outer transfer register 4502 is stored in LUT2 (1
70) performs linearity correction. LUT
2 (170) is the luminance value of the output of the outer transfer register 4502 and the inner transfer register 4503 as shown in FIG.
By accessing the 16-bit address indicated by the output luminance value, a value corrected to an ideal linearity characteristic is output as an output. Each LUT1 (1
69), the output from the LUT 2 (170) is subjected to processing such as shading and color processing by a common image processing circuit 171.

Referring to FIG. 17, the LUT generation method will be described. An image signal obtained by reading an image by the PD 4501 is divided into the output of the inner transfer register and the output of the outer transfer register, and the ideal linearity correction value (L
The UT1 (169)) reads in advance a stepless chart or the like in which the gradation changes smoothly, and performs low-pass filter 1
It is created from image data from which noise has been removed by 81 or averaging 182. Also, the correction value (LUT2 (170)) of the ideal linearity of the output of the outer transfer register (LUT2 (170)) is the output of the inner transfer register (outer transfer register 4502) that is paired with the output because the output of the outer transfer register is crushed near black. In case of, 4503, outer transfer register 4
In the case of 505, 4504) is set as an ideal linearity correction value. At that time, the correction value of the linearity is put into a 16-bit address corresponding to the output value of the outer transfer register and the output value of the inner transfer register.

In the above-described embodiment, the method of generating each LUT for one set of the inner and outer transfer registers has been described. However, a method of generating the LUT from the output average of the inner or outer transfer registers of all channels may be considered. Can be

In the present invention, one photodiode PD
Described the linearity correction of the output with the inner and outer transfer registers.
This is true even when there are three PDs of B. That is, FIG.
To explain, the three-line photodiode is P
D4501, the odd and even pixel charges for each color are transferred to both sides, and the odd and even pixel charges are further transferred. The signals are sequentially read out through an amplifier, and thereafter, the three-color signals are corrected to ideal linearity and output by using the LUTs 1 and 2 for each color or for each color.

[0118]

By implementing the present invention as described above, it is possible to prevent the inconsistency in the linearity characteristic which can occur in the CCD area sensor performing the transfer between registers.

Further, by implementing the present invention, the specifications for light leakage can be reduced, and a more complex and high-speed CCD can be used.
It enables the development of linear sensors, further improves manufacturing yield, and enables cost reduction.

Further, in the image reading device using the CCD, it is possible to correct the image quality deterioration due to the linearity mismatch, and to provide a higher-speed and higher-quality image reading device at a lower cost.

In addition, for the problem that the linearity differs between the inner and outer registers due to light leakage, image quality is prevented from deteriorating due to lack of linearity by performing LUT correction according to image characteristics by separating image areas. .

Further, by using the LUT for correcting the linearity of the output of the outer register and by referring to the output of the inner transfer register, the optimum linearity is corrected, thereby preventing the deterioration of the image quality due to the linearity mismatch. .

[Brief description of the drawings]

FIG. 1 is a structural diagram of a CCD according to an embodiment of the present invention.

FIG. 2 is a timing chart of the embodiment of the present invention.

FIG. 3 is a diagram illustrating a register state according to the embodiment of the present invention.

FIG. 4 is a circuit block diagram according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a light leakage level according to the first embodiment of the present invention.

FIG. 6 is a circuit block diagram according to a second embodiment of the present invention.

FIG. 7 is a diagram illustrating an incident light amount distribution according to the second embodiment of the present invention.

FIG. 8 is a schematic block diagram of linearity correction using an LUT according to the first embodiment of the present invention.

FIG. 9 is a schematic diagram of a character LUT correction unit using the character LUT of the present invention.

FIG. 10 is a schematic diagram of a photograph LUT correction unit using the photograph LUT of the present invention.

FIG. 11 is a configuration diagram of a character LUT of the present invention.

FIG. 12 is an example of a method of determining a threshold value of a character LUT according to the present invention.

FIG. 13 is a schematic block diagram of Embodiment 2 of the present invention.

FIG. 14 is a schematic block diagram of linearity correction using an LUT according to the first embodiment of the present invention.

FIG. 15 is a configuration diagram of an LUT 1 for correcting output data of an inner transfer register according to the present invention.

FIG. 16 is a configuration diagram of an LUT 2 for correcting output data of an outer transfer register according to the present invention.

FIG. 17 is an example of the LUT generation method of the present invention.

FIG. 18 is a schematic diagram showing a conventional CCD.

FIG. 19 is a circuit block diagram of a conventional example.

FIG. 20 is a diagram illustrating a conventional CCD.

21 is a diagram showing transfer between registers of the CCD shown in FIG. 21;

FIG. 22 is a diagram illustrating a light leakage portion.

FIG. 23 is a diagram illustrating residual charges due to light leakage.

FIG. 24 is a diagram illustrating a light leakage level with respect to a light amount.

FIG. 25 is a circuit block diagram of a conventional example.

FIG. 26 is a diagram illustrating linearity degradation due to light leakage.

[Explanation of Signs] 100 CCD 101, 102 Charge sweeping part 91, 92, 121, 122 Coupling capacitor 103, 104, 123, 124 Clamp circuit 107, 108, 127, 128 Clamp circuit 105, 106, 125, 126 Gain Control amplifier 109, 110, 129, 130 A / D converter 111, 131 OB area sampling circuit 113, 133 Reference voltage 112, 116, 132, 136 Comparator 114, 134 Incident light amount detection circuit 115, 135 Clamp DC conversion circuit 116 Digital image processing Circuit 141, 607, 608 AD converter 142, 609, 610 Image area separation circuit 143, 611, 612 Selector 144, 613 Character LUT 145, 615 Character LUT correction 146, 6 16 Photo LUT correction 147,614 Photo LUT 148,4109 Pixel processing circuit 149,601,602 Coupling capacitor 150,603,604 Clamp circuit 151,605,606 Gain control amplifier 161,162 Coupling capacitor 163,164 Clamp circuit 165 , 166 Gain control amplifier 167, 168 AD converter 169 Lookup table 1 170 Lookup table 2 171 Image processing circuit 180 Image reading means 181 Low pass filter 182 Averaging circuit 183, 185 Address section 184, 186 Data section 301 Area designating circuit 4000,4500 line sensor 4501 photodiode array 4502, 4503, 4504, 4505 charge transfer register 450 , 4507 SH gate 4508,4509,4510,4511 ST gate 4512,4513 TG gate 4514 OB area 4515 reading area 4516,4517,4518,4519 output amplifier

Claims (13)

[Claims] 1. A photodiode array comprising: at least one photodiode array; a first charge transfer register provided on one side of the photodiode array; and a first charge transfer register provided between the photodiode array and the first charge transfer register. A second charge transfer register, and a charge sweeping-out unit for sweeping out the charge of the first charge transfer register. 2. The method for driving a linear image sensor according to claim 1, wherein signal charges are transferred from said photodiode array to said second charge transfer register, and said signal charge is transferred from said second charge transfer register to said first charge transfer register. Transferring the remaining charge to the first charge transfer register, sweeping out the charge remaining in the first charge transfer register by a charge sweeping section, and horizontally transferring the signal charges of the first and second charge transfer registers. A method for driving a linear image sensor, comprising: 3. A linear device having at least one photodiode row and two or more charge transfer registers provided on one side of the photodiode row, and performing charge transfer between the two or more charge transfer registers. In an image reading device equipped with an image sensor, the amount of light incident on the linear image sensor from an output of a first charge transfer register located closer to the photodiode row among the two or more charge transfer registers is determined. Detecting means for detecting, and control means for controlling a clamp level of an output of a transfer register other than the first transfer register among the two or more charge transfer registers in accordance with a result of the detection means. Image reading device. 4. The image reading apparatus according to claim 3, wherein said detecting means detects the amount of incident light of said first charge transfer register, converts the amount of incident light into a DC voltage to be a clamp voltage, and outputs a reference voltage. An image reading apparatus wherein a voltage difference between the image reading signal and the reference voltage is set to the clamp level. 5. The image reading apparatus according to claim 3, wherein said detecting means detects an incident light amount in a specified specific area. 6. The image reading device according to claim 4, wherein the specific area includes a pixel located at the rearmost position in a transfer direction of the first charge transfer register. 7. A CCD linear sensor having photoelectric conversion means for converting light from a document into an electric signal, and a plurality of charge transfer means for transferring electric charges from the photoelectric conversion means as an electric signal to an output unit. An A / D converter for converting analog data from the sensor to digital;
The image data from the A / D converter is divided into regions having different image characteristics, and a plurality of look-up tables having different characteristics for each region obtained by the image region separating unit; A linear image sensor comprising a look-up table correcting means for performing a look-up table correction according to characteristics of regions having different image characteristics. 8. The linear image sensor according to claim 7, wherein the areas having different image characteristics separated by the image area separating means can be separated into at least a character and a photograph area. 9. The linear image sensor according to claim 7, wherein the look-up table correction means includes at least a look-up table of characters or photographs, and the table is constituted by a RAM. 10. A photoelectric conversion unit for converting light from a document into an electric signal, a first charge transfer unit for transferring electric charges from the photoelectric conversion unit as an electric signal to an output unit, and A second charge transfer means for transferring a charge as an electric signal to the output unit in parallel with the first charge transfer means through the first charge transfer means; the first charge transfer means and the second charge A / D conversion means for converting a signal output from the transfer means into a digital signal, a first look-up table for correcting the linearity of the digital signal A / D converted from the first charge transfer means, A second look-up table for correcting the linearity of the digital signal A / D-converted from the second charge transfer means, wherein the second look-up table is provided with the first charge transfer means. An image reading device which is determined by correction data corresponding to an output from the second charge transfer unit and the second charge transfer unit. 11. The first charge transfer means, wherein
The image reading apparatus according to claim 10, wherein the charge adjacent to the charge transferred by the charge transfer unit is transferred to the output unit as an electric signal. 12. The first charge transfer means, wherein the first charge transfer means
The image reading device according to claim 10, wherein the image reading device is disposed outside the photoelectric conversion unit with respect to the charge transfer unit. 13. The apparatus according to claim 10, wherein the first and second look-up tables are configured by a RAM having an address and data corresponding to the address. Image reading device.