JPH11177442A - Output control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To allow an output control circuit to control voltage, current and power or the like precisely in broad range, with simple configuration. SOLUTION: A first output control section 10 changes output in small scale, and an output detection section 30 detects the output of the output control circuit after changed, and the output is stored in a second output control section 20. Then the change in the first output control section 10 is restored to the original value, and the second output control section 20 changes its own output signal level for keeping the output signal level to the stored output signal level. The small scale output change by the first output control section 10 is performed with comparatively high precision, and the second output control section 20 accumulates (or decreases) the output changes in a small scale with high precision to conduct output control over a broad range with high accuracy.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an output control circuit, and more particularly to an output control circuit capable of variably controlling the output of an electric quantity (voltage, current, power, etc.). In recent years, for example, in the field of mobile communication, wireless devices using CDMA (code spread multiple access system) have been developed. Especially CD
In the MA, if the spreading code between users is asynchronous, communication interference between users occurs, so that it is necessary to control transmission power in a fine and wide control range. Therefore, a method of estimating the amount of interference with high accuracy has been considered. On the other hand, a power control circuit that changes the transmission power based on the estimated amount is also required to have a wide control range and perform accurate power control.

[0002]

2. Description of the Related Art FIG.
3 shows a partial configuration of a transmission unit capable of changing transmission power.
In the figure, 1₁~ 1_nCorresponds to the input signal level (power).
Power variable unit that changes the output signal level (power)
2₁~ 2_nIs a voltage-controlled variable attenuator, 3₁~ 3_nIs increased
Width (AMP), 4 is a mixer, 5₁~ 5_nIs D / A conversion
And 6 correspond to power control input (address input) in advance.
Each power variable unit 1₁~ 1 _nControl output (data output)
Is stored in the ROM.

[0003] Power variable part 1 ₁ of the example is composed of a combination of a variable attenuator 2 ₁ and the amplifier 3 _1, the desired power conversion (amplification or attenuation) is obtained. Power changing section 1 _2-1
The same applies to _n . According to such a constitution, the input transmitted wave after being power conversion by the power variable unit 1 _1, it is frequency-converted into a predetermined high-frequency signal by a local signal LO by the mixer 4. It is converted to the desired transmission signal power further power changing unit 1 ₂ to 1 _n, are transmitted from the antenna (not shown). The power variable unit 1 ₁ to 1 _n may be constituted by a variable attenuator and or variable amplifier.

[0004] In general, the transmission power control is performed in a control range.
Using one power variable section (attenuator) with a wide
When the entire power range is covered by a variable number of power variable units (attenuators)
There is a match. FIG. 20 shows the latter case, in which the ROM
6 are D / A converters 5 ₁~ 5_nD / A conversion
Variable attenuator 2₁~ 1_nIs added to ROM6 is
The information of each control voltage corresponding to the control input is stored in advance.
In the transmission power control, the control amount (attenuation amount) is input to the ROM 6.
Read the corresponding control data from ROM6
And precise power control is performed. Note that the required range
The ROM can also be used in the case of performing the operation with one power variable unit.

[0005]

However, when the required range is varied by one power variable unit, the control voltage per unit power control amount (for example, 1 dB) becomes small.
The control is an individual deviation (variation in characteristics) in the power variable section,
Precise power control is difficult because it is easily affected by temperature characteristics, voltage fluctuations, and the like. On the other hand, if a method of covering the required range of variation with a plurality of power variable units is adopted, the control voltage per unit power control amount in each power variable unit can be increased, so that the individual deviation of each power variable unit, temperature characteristics, Precise power control becomes possible by suppressing voltage fluctuation and the like. However, providing a plurality of power variable units having good characteristics naturally has limitations in terms of price, operating frequency, device design, and the like.

An object of the present invention is to provide an output control circuit capable of precisely controlling a wide range of output with a simple configuration.

[0007]

The above-mentioned problem is solved, for example, by referring to FIG.
Is solved. That is, the output control circuit of the present invention (1) changes the output signal level with respect to its own input signal level in accordance with the control input, and thereafter returns the output signal level to the original level. An output detection unit 30 for detecting the output signal level of the first output control unit 10 is connected in series with the first output control unit 10, and the output detection unit 30 detects the change of the output signal level in the first output control unit. The output signal level of the present circuit is held, and the output signal level of the present circuit is maintained at the held output signal level when the output signal level of the first output control unit returns thereafter. And a second output control section 20 for changing the level.

In the present invention (1), first, the first output control unit 10 performs a small-scale output change, and the output after the change of the present circuit at that time is detected by the output detection unit 30, and this is detected by the first output control unit 10. 2
Is held in the output control unit 20. Thereafter, the above change in the first output control unit 10 is restored, and the second output control unit 20 changes its own output signal level so as to maintain the output signal level of the circuit at the held output signal level. .

According to the present invention (1), the small-scale output change by the first output control unit 10 can be performed with relatively high precision, and the second output control unit 20 can perform the small-scale high-precision change in each of the small-scale outputs. By accumulating (or decrementing) output changes, output control in a high range can be performed with high accuracy. FIG.
(A) The connection order of the first and second output control units 10 and 20 may be reversed. Further, the output detection unit 30 detects a change in the output signal level of the present circuit due to a temporary change in the output of the first output control unit 10, and uses the result of the cumulative addition as an output signal level of the present circuit. Is also good.

[0010] Preferably, in the present invention (2), in the above-mentioned present invention (1), the first output control unit 10 has a high accuracy, a relatively narrow range of output variable characteristics, and a second output control unit. The control unit 20 has a relatively wide range of output variable characteristics. Therefore, the first output control unit 10 with high accuracy,
The output signal level of the present circuit can be controlled over a wide range with high accuracy by combination with the second output control unit 20 which does not require much accuracy.

Preferably, in the present invention (3), in the above-mentioned present invention (1), for example, as shown in FIG. 8, the second output control units 20 are connected in series with each other and adjust their own input signal levels. A plurality of level converters 21a to 21c having the same or different conversion characteristics for converting to a corresponding output signal level according to the common control signal V2 are provided. In general, it is difficult to configure an output variable section (power variable section or the like) having a linear characteristic over a wide control range with one circuit, but according to the present invention (3), a plurality of conversion characteristics having the same or different conversion characteristics can be obtained. A wide and linear output variable characteristic can be easily obtained by connecting the level converters 21a to 21c in series.

The output control circuit according to the present invention (4) comprises, as shown in FIG. 2 or 5, for example, the first and second output control units 10 and 20 according to the present invention (1), And an output detection unit 30 for detecting an output signal level of the first signal.
Or a second output control unit 10/20 and the output detection unit 30
Any one of a modulation circuit, a frequency conversion circuit, an amplifying circuit, an attenuating circuit, a multiplying circuit, an adding circuit, and the like for converting its own input signal level to its own output signal level.
Alternatively, it is provided with two or more level conversion circuits (the power variable unit in the figure) 7.

For example, in FIG. 2, when the output P2 of the power variable unit 21 is 2 dB and the gain of the power variable unit 7 is 3 dB, the output of the power variable unit 7 is 5 dB. Now, assuming that the output P1 of the power variable unit 11 increases by 1 dB, P2 =
3 dB, the output of the power variable unit 7 = 6 dB. The power control unit 20 detects the output of the output detection unit 30 at this time = 6d
When B is held and the output P1 of the power variable unit 11 is returned by 1 dB thereafter, its own output signal level is changed so that the output of the power variable unit 7 = 6 dB becomes constant. That is, in this case, its own output signal level is changed so that P2 = 3 dB. Incidentally, when the power variable unit 7 does not exist, the detection output of the output detection unit 30 is maintained at 3 dB, and thereafter, the output P of the power variable unit 21 is maintained.
The own output signal level is changed so that 2 = 3 dB becomes constant. That is, the output control circuit of the present invention (4) determines whether or not the characteristic of the level conversion circuit (power variable unit) 7 (or whether or not the characteristic is present).
Irrespective of this, it works to keep the output of the output signal level detection point after the small amplitude change constant.

As shown in FIG. 10, for example, the output control circuit of the present invention (5) includes one or more first output control sections 10a to 10c described in the present invention (1), The second output control unit 20 (50 and 21) according to the invention (3)
a to 21c) and an output detection unit 30 for detecting an output signal level of the present circuit, wherein one or two or more level conversion units 21a to 21c in the second output control unit 20 are connected to the one or two or more levels. Are arranged in a distributed manner with the first output control units 10a to 10c interposed therebetween. Therefore, the object of the present invention can be achieved by various configurations (connection methods).

The output control circuit according to the present invention (6) includes, as shown in FIGS. 12 and 13, for example, the first and second output control units 10, 20 (50 and 21) according to the present invention (1). etc)
And a plurality of sets of the respective element units, each of which includes an output detection unit 30, and an output detection signal of a certain set of the output detection units 30 is changed to the other set of the first and second outputs. The configuration is such that the signals are fed back to the second output control unit 20 in the certain set across the control units 10 and 20 and / or the output detection unit 30. Therefore, the object of the present invention can be achieved by various configurations (connection methods).

Preferably, in the present invention (7), in the above-mentioned present invention (1), the output detecting section 30 comprises: a signal branching section for branching a part of an output signal to be detected; A signal dividing unit that divides the signal by a level; and a level detecting unit that detects an amplitude level of each of the divided signals. In general, when an output signal level that changes over a wide range is to be detected by one detection circuit, it is difficult to widen the dynamic range of the detection circuit, or A / D
There is a problem that the resolution of the D converter or the like becomes coarse and high-precision detection cannot be performed. According to the present invention (7), high-precision detection for each level can be achieved by a configuration in which an output signal level that changes over a wide range is first divided into a plurality of levels, and the divided signals of each level are individually detected. It becomes possible.

Preferably, in the present invention (8), in the above-mentioned present invention (1), the output detecting section 30 comprises: a signal branching section for branching a part of the output signal to be detected; An attenuator for attenuating the signal to a level and a level detector for detecting the amplitude level of each of the attenuated signals are provided. According to the present invention (8), by attenuating the output signal level that changes over a wide range into a plurality of levels, the attenuated signal at a certain level falls within the detection window within a predetermined range, and the signal levels are compared. Can be detected with high accuracy.

Preferably, in the present invention (9), in the above-mentioned present invention (1), the output detecting section 30 is different from the signal branching section for branching a part of the output signal to be detected. A plurality of level detectors each having sensitivity for a partially overlapping level range are provided. Therefore, an output signal level that changes over a wide range can be detected efficiently and with high accuracy.

The output control circuit according to the present invention (10) includes, as shown in FIG. 18, for example, the first and second output control units 10 and 20 according to the present invention (1) and its own input signal level. Are connected in series with a plurality of level converting means 4, 2, 3, etc. for converting the signal to its own output signal level, and are distributed and arranged between the respective level converting means, so that different or partially overlapping levels are provided. A plurality of output detectors 30a to 30 for detecting the output signal level of each level converter for each range
d, etc., and wherein the second output control unit 20
When any one of the output detectors 30 detects a significant signal level when the output signal level of the output controller 10 changes, the output signal level at the detection point is kept constant based on the detected signal level. It changes its own output signal level.

According to the present invention (10), a plurality of output signal detectors 30a to 30d for detecting output signal levels respectively for different or partially overlapping level ranges are provided, so that the output signal which varies over a wide range is provided. The level can be detected efficiently and with high accuracy. In addition, a plurality of output detection units 30a to
30d, etc., are preferably arranged in a distributed manner for output detection of the level conversion means 4, 2, 3 and the like having the same detection range, so that a detection level from a desired control target can be accurately obtained at a desired control time. Can be Then, the second output control unit 20
Is configured to change its own output signal level based on the detection output from any one of the output detection units 30 so as to keep the output signal level at that detection point constant. Are also controlled with high precision.

[0021]

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Note that the same reference numerals indicate the same or corresponding parts throughout the drawings. FIG. 2 is a diagram showing a configuration of the power control circuit according to the first embodiment, and shows a case where a small power control unit and a large power control unit are cascode-connected. In the figure, reference numeral 10 denotes a small power control unit, 11 denotes a high-precision power variable unit having a small variable range, 12 denotes a 3-bit up / down counter (CTR), 13 denotes a D / A converter, and 20 denotes a high power control. Unit, 21 is a power variable unit which is not high precision but has a large variable range, 22 is, for example, an 8-bit up / down counter (CTR), 23 is a D / A converter, 24 is an 8-bit register (REG), 25 Is a comparator (CMP), 30 is an output detection unit, 31 is a signal splitter (H), 32 is a signal power detector, 33 is an A / D converter (8 bits), and 40 is a timing control unit. . Although the timing control unit 40 is provided separately here, the part related to the small power variable timing control is provided to the small power control unit 10 and the part related to the large power variable timing control is provided to the large power control unit 20. Each may be provided separately.

In the initial state of the low power control section 10, the counter 12 receives the data DT1 =
04 is preset, and its count output Q1 = 04
(The center of the small power variable range). This count output Q
1 = 04 is D / A converted by the D / A converter 13, and the corresponding control voltage V 1 is applied to the power variable unit 11. The power variable unit 11 includes a voltage-controlled variable attenuator 2 and / or a variable gain amplifier 3 as described with reference to FIG. 20, and performs required power conversion (amplification or attenuation) according to the input control voltage V1. The power variable unit 11 is configured by a high-precision analog circuit having a narrow variable range, and performs precise power conversion corresponding to the count output Q1. That is,
Now, assuming that the power conversion when the count output Q1 = 04 is a reference value (for example, 0 dB), when the count output Q1 = 07, the reference value is exactly +1 dB, and when the count output Q1 = 01, the reference value is exactly −1 dB. Power conversion. By the way,
The power change per ± 1 count of Q1 in the power variable unit 11 is ± １ ／ dB. Note that the power conversion (reference value) when the count output Q1 = 04 may be an arbitrary number of dB other than 0 dB.

In the initial state of the high power controller 20, for example, data DT2 = 127 is preset in the counter 22 by the load pulse L2, and the count output Q2 = 127 (the center of the high power variable range). The count output Q2 = 127 is converted by the D / A converter 23 into D / A
The converted control voltage V <b> 2 is applied to the power variable unit 21. The power variable unit 21 includes a voltage-controlled variable attenuator 2 and / or a variable gain amplifier 3, and performs required power conversion (amplification or attenuation) according to the input control voltage V2.
The power variable unit 21 does not need to be as high as the power variable unit 11, but has a wider variable range than the power variable unit 11. Further, a high-precision power control as the large power control unit 20 is realized by a configuration in which the detection output B of the power from the output detection unit 30 is fed back, and the output of the detection point is controlled based on the feedback. Here, the power variable unit 2
The power change per 1 count of Q2 at 1 is approximately ±
1/3 dB. Next, the variable power control will be described with reference to FIGS.

3 and 4 are operation timing charts (1) and (2) of the power control circuit according to the first embodiment. FIG. 3 is mainly an operation timing chart of the small power control unit 10, and FIG. 3 mainly shows an operation timing chart of the large power control unit 20. In FIG. 3, when a 1 dB-up power control signal is input to the timing control unit 40,
At the subsequent power variable timing, the data signal DT1 = 07
And the load pulse L1 are generated, and the output Q1 of the counter 12 becomes 07. The count output Q1 = 07 is D / A converted and added to the power variable unit 11, whereby the output P1 of the power variable unit 11 becomes the reference value +1 dB, and accordingly, the output P2 of the power variable unit 21 becomes the previous value (first Is the median) +
1 dB.

In FIG. 4, when the load pulse L1 is output, a latch pulse LP is output at a timing when the output P2 of the power variable unit 21 is stabilized, whereby the detection output of the output P2 at that time is registered. 24, and becomes the latch output A of the register 24 (= previous value of P2 + 1 dB). Returning to FIG. 3, thereafter, the countdown enable signal D1 of the counter 12 is activated by the timing control unit 40, and the counter 12 is counted down by the clock signal CK. Returning to FIG. 4, first, when the output Q1 of the counter 12 becomes 06, the outputs P1 and P2 of the power variable units 11 and 21 are both １ ／ dB.
As a result, the detection output B of the output detection unit 30 becomes 1 /
Decrease by 3 dB. Accordingly, the comparator 25 outputs the comparison output A
> B = 1, whereby +1 is added to the output Q2 of the counter 22. As a result, the output P2 increases by approximately 1/3 dB to compensate for the decrease in the output P1. Thereafter, the process proceeds in the same manner, and eventually returns to the count output Q1 = 04 (reference value).
Finally, the decrease of the output P1 by 1 dB is compensated by the increase of the output P2 by 1 dB. That is, the power variable unit 11
The exact change in is returned to the original, and the accurate change is transferred to the power variable unit 21. The operation when a 1 dB down power control signal is input to the timing control unit 40 is the reverse of the above. Thus, the high power control unit 20
Can be increased or decreased exactly by 1 dB.

Therefore, according to the first embodiment, a temporary change in the output of the high-precision low-power control unit 10 is cumulatively transferred to a high-range output change of the high-power control unit 20. The high power control unit 20 can control a wide range of output levels with high accuracy. As described above, another power variable unit 7 may be inserted between the large power control unit 20 and the output detection unit 30. However,
When the variable amount of the power variable unit 7 is changed, in synchronism therewith, the constant output control of the detection point (output of the power variable unit 7) by the large power control unit 20 is temporarily stopped. May be changed, the output detection level at the subsequent detection point may be latched in the register 24, and then the high power control unit 20 may resume the output constant control of the detection point. Therefore,
This power control circuit can flexibly cope with a change in the characteristics of the signal processing system.

By the way, in the above configuration, high conversion accuracy is not required for the power variable unit 21. Therefore, when the power variable unit 21 has a characteristic variation due to a characteristic variation or an operating environment (temperature, power supply voltage, etc.), the counter is not used. There may be some deviation between the total correction count number of 22 and the sum of the return count numbers of the counter 12. That is, although the power variable unit 11 is energized, for example, three times (+3 dB), the output Q2 of the counter 22 should originally be counted by +9, but actually the output of the comparator 25 is only counted by +8. A = B may occur. However, the register 24 stores the power variable unit 1 each time.
Since the output detection level P2 after the accurate change by 1 is latched, the output P2 of the power variable unit 21 controlled so as to obtain a comparison match with the output detection level P2 may be slightly incorrect when viewed locally. Is possible, but is always accurate in the big picture. If the resolution of the power variable unit 21 (rate of change in power per count) is smaller than 1/3 dB, the output P2 of the power variable unit 21 is always accurate even when viewed locally.

Although one specific embodiment for realizing the present invention (1) has been described, the present invention (1) is not limited to this. For example, the output detection unit 30 holds the output level when the output of the transmission wave is stable (conventional), and the change in the output level of the transmission wave due to the temporary change of the power variable unit 11 {the "book" in the present invention (1). ｝ Is detected and held in a counter (not shown), and the counter (not shown) is set to 0 in synchronization with a subsequent return change of the power variable unit 11. Counting down (or up) toward the same time,
The counter 22 is counted up (or down) by the count number (corresponding to the above-mentioned change) necessary until the counter 22 becomes
May be configured. After that, when the transmission wave output level falls to a new level, the output detection unit 30
Holds the level again as the output level when the output of the transmission wave is stable (conventional). In this example, the output detection unit 3
Since 0 only needs to detect the change in the transmission wave output, a wide dynamic range is not required. Such a configuration is also included in the present invention (1). Of course, the same function as described above may be constituted by an analog circuit.

FIG. 5 is a diagram showing the configuration of the power control circuit according to the second embodiment, in which the connection between the small power control unit 10 and the large power control unit 20 in FIG. 2 is reversed. ing. In this case, when the power control signal of 1 dB is input, the output P1 of the power variable unit 11 becomes the previous value of P1 + 1 dB by the output Q1 ← 07 of the counter 12. Next, when the latch pulse LP is generated, the detection output of the output P1 at that time is latched in the register 24, and the latch output A of the register 24 becomes (previous value of P1 + 1 dB). Next, when the counter 12 counts down by one, the comparator 25 outputs a comparison output A> B = 1, whereby the counter 22
Is counted up by one, and as a result, the decrease in the output P1 is compensated by the increase in the output P2. In this manner, when the output Q1 of the counter 12 returns to 04, the decrease of the output P1 by 1 dB is compensated for by the increase of the output P2 by 1 dB, and the output Q2 of the counter 22 increases correspondingly.

When a power control signal of 1 dB down is input, the output P1 of the power variable unit 11 becomes the previous value of P1 minus 1 dB by the output Q1 ← 01 of the counter 12. Next, when the latch pulse LP is generated, the detection output of the output P1 at that time is latched by the register 24, and the latch output A of the register 24 becomes (previous value of P1 minus 1 dB). Next, when the counter 12 counts up by one, the comparator 25 outputs a comparison output B> A = 1, whereby the counter 2
2 is counted down by 1, so that the increase in the output P1 is compensated by the decrease in the output P2. In time,
When the output Q1 of the counter 12 returns to 04, the increase of 1 dB in the output P1 is compensated for by the decrease of 1 dB of the output P2, and the output Q2 of the counter 22 is correspondingly reduced. From the above, it can be understood that the present power control circuit operates normally even when the small power control unit 10 and the large power control unit 20 are connected in the forward / reverse direction.

FIG. 6 is a diagram showing the configuration of a power control circuit according to the third embodiment, in which each of the power variable units 11a to 11c in the small power control unit 10 can be digitally controlled by each count output bit of the counter 12. Is shown.
The power variable unit 11a calculates the bit output Q1 =
The power conversion is performed at 0 dB when the logic level is 0, and 1 dB when the bit output Q1 is at the logic level. Power variable unit 1
1b performs power conversion of 0 dB when the bit output Q2 of the counter 12 is at the logical 0 level and 2 dB when the bit output Q2 is at the logical 1 level. And the power variable unit 11c
Is 0 dB when the bit output Q4 of the counter 12 is at the logic 0 level and 4 when the bit output Q4 is at the logic 1 level.
Performs power conversion of dB. Such power variable units 11a to 11
11c can be configured with high precision by a variable attenuator 2 in each of two stages and / or a variable power gain amplifier 3 in each of two stages composed of a resistance circuit or the like.

The timing control unit 40 presets data DT1 = 04 as a reference value of the counter 12, and the power control amount in the small power control unit 10 in this case is 4 dB. If it is desired to change the output P2 of this circuit by ± 1 dB, the counter 12 sets DT1 = 05 or DT1 = 03.
Preset. To change by ± 2 dB, the counter 12 is preset to DT1 = 06 or DT1 = 02. If you want to change ± 3 dB,
DT1 = 07 or DT1 = 01 is preset. The transfer operation of the output (control) to the high power control unit 20 is described in FIG.
This is the same as that described above. According to the third embodiment, an arbitrary amount of power can be increased / reduced by a simple configuration.
Down control can be performed.

If a power converter 11d (not shown) of, for example, -4 dB is connected in series to the power variable units 11a to 11c, the amount of power conversion in the small power controller 10 is counted by the counter 12. 0d when output = 04
B, +3 dB when the count output is 07, and -3 dB when the count output is 01. FIG. 7 is a diagram showing a configuration of a power control circuit according to the fourth embodiment, and shows a case where the power in the large power control unit 20 can be digitally controlled. The operation of the large power control unit 20 can be easily understood from the description of FIG.

FIG. 8 is a diagram showing a configuration of a power control circuit according to the fifth embodiment, in which a plurality of small power control units 10 of the type shown in FIG. 2 (or FIG. 6) are connected in cascode. For example, each power variable amount of the small power control units 10a to 10c is set to ± 1 dB. Timing control unit 40 in this case
For example, when a power control signal of 1 dB up is input, one of the small power control units 10a to 10c is set to +
Change to 1 dB and then restore. When the power control signal of 2 dB is input to the timing control unit 40, any two of the small power control units 10a to 10c are simultaneously increased by +1 dB, and thereafter, are simultaneously restored. Alternatively, for example, the small power control unit 10a is increased by +1 dB and returned to the original state. After the output P2 is increased by 1 dB, the small power control unit 10b is further increased by +1 dB and returned to the original state. Also in this case, the total increase amount of the output P2 is 2 dB.
Becomes When a power control signal of 3 dB down is input to the timing control unit 40, the small power control units 10a to 10a
All of c are changed to -1 dB all at once, and then restored all at once.

Alternatively, the variable power amounts of the small power control units 10a to 10c may be ± 1 dB, ± 2 dB, ± 4 dB. In this case, the timing control unit 40 can control up to ± 7 dB at a time by combining the use of the small power control units 10a to 10c. On the other hand, the large power control unit 20 of this example has a configuration including a cascode connection of a plurality of power variable units 21a to 21c. Hereinafter, this will be described.

FIG. 9 is a diagram for explaining a high power control unit according to the fifth embodiment. Each of the power variable units 21a to 21c
5 shows power conversion characteristics with respect to the common control voltage V2. The power variable unit 21a is configured by an analog circuit, and its power conversion characteristic is a. In general, it is difficult to obtain a sufficient linear characteristic for the characteristic "a" with a single-stage analog circuit, and a variable power range (dynamic range) of a single stage is often not sufficient. Therefore, a power variable unit 21c having a characteristic c having an arbitrary characteristic that monotonously increases and decreases with respect to the control voltage V2 similarly to the characteristic a is provided in series. If necessary, a power variable unit 21b having a constant power variable (characteristic b) is provided in series, and a bias is applied to the power variable of the entire circuit. Power variable unit 21 in this case
The overall characteristics a to 21c are indicated by characteristics s, and a power conversion characteristic s having a wide dynamic range in the range of the control voltage V2 is obtained.

FIG. 10 is a diagram showing a configuration of a power control circuit according to the sixth embodiment.
8 illustrates a case where a plurality of power variable units 21a to 21c in the large power control unit 20 of FIG. Here, a part related to the control circuit is taken out from the high power control unit 20 and
Hereinafter, this part is referred to as a power control unit 50.

In this example, the output of the power control circuit is detected by the output detection unit 30 and fed back to the power control unit 50. Therefore, the low power control units 10a to 10a
No matter how the power control amount in any one or two of 0c changes, and then is restored, the change result appears in the output of the power control circuit, and the output detection unit 30
And is stored in the register 24. Then, the total change amount is accurately transferred to each of the power variable units 21a to 21c by the output control of the detection point by the power control unit 50. That is, the power control circuit based on the principle of the present invention can be configured flexibly and variously. The D / A converters 23a to 23c correspond to the power variable units 21a to 21c, respectively.
23c (not shown), the output Q2 of the counter 22 may be converted into corresponding control data by a ROM or the like (not shown), and these may be added to the D / A converters 23a to 23c.

FIG. 11 is a diagram showing a configuration of a power control circuit according to the seventh embodiment.
0c and a plurality of power control circuits including a plurality of large power control circuits (including an output detection unit 30, a power control unit 50, and a power variable unit 21) are cascode-connected. In the figure, basically, the temporary change amount of the output of the small power control unit 10a by the control signal Ca is transferred to the change amount of the output of the power variable unit 21a by the control signal CA, and the small power change amount by the control signal Cb. Control unit 1
0b is temporarily changed by the control signal CB into an output change in the power variable unit 21b, and the temporary change in the output of the small power control unit 10c by the control signal Cc is controlled by the control signal CC. Power variable section 21c
Is transferred to the amount of change in output at.

When the output of the small power control unit 10a is temporarily changed by 1 dB, the output of the power variable unit 21a is eventually increased by 1 dB.
1b operates so as to keep its own output of the previous value held by itself as it is.
Even if the input of 1b increases by 1 dB, the variable amount is internally controlled so that the output does not change, and does not eventually increase by 1 dB. That is, in this type of cascode connection, a change in the output of the preceding stage does not ultimately affect the output of the subsequent stage as it is. When it is desired to propagate the change in the output of the previous stage to the subsequent stage, for example, the output of the low power control unit 10b is temporarily set to 1d thereafter.
B, and transfer it to the power variable unit 21b. Alternatively, the control signals CA and CB are output in synchronization with the 1 dB increase of the output of the small power control unit 10a, and the respective detected outputs of the power variable units 21a and 21b that have temporarily changed are latched in the respective registers 24. In this way, it is possible to systematically transmit a change in output at the preceding stage to the succeeding stage. Alternatively, it is also possible to change only the output at a specific position in the middle stage or the subsequent stage irrespective of the other stages.

It should be noted that the small power control unit 1 based on the control signal Ca
0a is determined by the control signal CB (or C
C), the change in the output of the power variable unit 21b (or 21c) may be transferred to the power variable unit 21b, or the temporary change in the output of the small power control unit 10b due to the control signal Cb may be changed by the control signal CC to the power variable unit 21c. May be transferred to the amount of change in output at. Thus, flexible and diverse power control becomes possible.

FIG. 12 is a diagram showing a configuration of a power control circuit according to the eighth embodiment. The case where the feedback loop from the outer output detector surrounds the feedback loop from the inner output detector is shown. Is shown. In the figure, basically, the temporary change amount of the output of the small power control unit 10a by the control signal Ca is transferred to the change amount of the output of the power variable unit 21a by the control signal CA, and the small power change amount by the control signal Cb. The temporary change amount of the output of the control unit 10b is transferred to the output change amount of the power variable unit 21b by the control signal CB, and the temporary change amount of the output of the small power control unit 10c by the control signal Cc is controlled. The signal CC is transferred to the amount of change in the output of the power variable unit 21c.

In this case as well, the amount of change in the output generated in a certain portion can be propagated to other portions in various modes (routes) based on the basic operation principle of the present invention as described with reference to FIG. It is possible. In particular, it is easy to spread the change amount at the center (middle stage) to the surroundings (front and rear stages). In addition,
The temporary change amount of the output of the small power control unit 10a by the control signal Ca may be transferred to the change amount of the output by the power variable unit 21b (or 21c) by the control signal CB (or CC), or the control signal Cb Low power control unit 10
The temporary change amount of the output b may be transferred to the output change amount in the power variable unit 21c by the control signal CC.

FIG. 13 is a diagram showing a configuration of a power control circuit according to the ninth embodiment, showing a case where a feedback loop from an output detection unit is linked to a feedback loop from another output detection unit. ing. In the figure, basically, the temporary change amount of the output of the small power control unit 10a by the control signal Ca is transferred to the change amount of the output of the power variable unit 21a by the control signal CA, and the small power change amount by the control signal Cb. The temporary change amount of the output of the control unit 10b is the control signal C
B, the output is changed to the amount of change in the output of the power variable unit 21b, and the small power control unit 1 is controlled by the control signal Cc.
The temporary change amount of the output of 0c is transferred to the change amount of the output in the power variable unit 21c by the control signal CC.

In this case as well, as described with reference to FIG. 11, based on the basic operation principle of the present invention, the amount of change in output generated in a certain portion can be propagated to other portions in various modes (routes). It is possible. In particular, control can be easily performed such that the amount of change in the subsequent stage is sequentially propagated to the preceding stage. The control signal C
a may be used to transfer the temporary change amount of the output of the small power control unit 10a to the change amount of the output of the power variable unit 21b (or 21c) by the control signal CB (or CC), or the small change amount by the control signal Cb. The amount of temporary change in the output of the power control unit 10b is determined by the control
You may transfer to the amount of change of output in c.

FIG. 14 is a diagram showing a configuration of a power control circuit according to the tenth embodiment, in which the number of small power control units and the number of high power control units are different. As described above, the temporary change amount of the output in any one or two or more of the small power control units 10a to 10c is determined by the power variable units 21a and / or 2
It can be easily understood that the output is changed to the output change amount in 1b.

FIG. 15 is a diagram for explaining an output detection unit in the embodiment, and shows a case where an output that changes over a wide range is detected with high accuracy by a simple configuration. In the figure, 3
Reference numeral 4 denotes a detection module, DTUs 1 to 3 denote detection units each including a diode detector or the like having the same characteristics, CMP denotes a comparator, A denotes an AND gate circuit, and 35 denotes a level shift circuit that shifts the level (DC level) of a branch wave input. (LSF), 36 is a coder (COD), and 37 is an analog switch (ASW).

In the detection module 34a, the demultiplexer 3
The branch wave from 1 is input to the detection unit DTU1. This branch wave is not level-shifted and has a signal level (amplitude) proportional to the transmission wave output centering on the DC level. The detection unit DTU1 performs, for example, diode detection on the branched wave input and outputs a detection output Ba. The comparators CMP1 and CMP2 detect the detection output Ba from 0V to a predetermined threshold T.
H (that is, detection range) is detected, and when 0 ≦ Ba <TH, the detection output = 1 is output in both cases, and the AND gate circuit A1 is satisfied. In other cases, the AND gate circuit A1 is not satisfied. By the way,
In this example, since Ba> TH (out of the detection range), the AND gate circuit A1 is not satisfied. That is, the detection module 3
No significant detection signal is obtained from 4a.

In the detection module 34b, the output signal from the level shift circuit 35a is supplied to the detection unit DTU2.
To enter. This signal has its DC level shifted to the negative side by a predetermined amount LS, and the detection unit DTU
2 performs diode detection on this signal and outputs a detection output Bb. The operations of CMP1, CMP2 and CMP2 are the same as described above. In this example, since 0 ≦ Bb <TH in this example, AND
The gate circuit A2 is satisfied. That is, the detection module 3
4b gives a significant detection signal. Similarly, in the detection module 34c, the AND gate circuit A3
Is not satisfied.

The coder 36 has AND gate circuits A1 to A3.
The selection signal S = 1 of the analog switch 37 is output based on the output "010" of the analog switch 37. As a result, the detection unit DTU
The second detection output Bb is selected and input to the A / D converter 32. The A / D converter 32 converts the input detection signal Bb into an A / D signal.
Is converted to the lower bit data BL of the final detection level B.
Generate In this case, if the detection range of each detection module 34 (the same characteristic) is appropriately selected, the output of the A / D converter 32 is highly accurate. On the other hand, the coder 36 generates upper bit data BU according to the level shift amount LS of the level shift circuit 35a based on the output “010” of the AND gate circuits A1 to A3. These upper and lower bit data BU and BL are combined to accurately represent the level of the transmission wave output.

The detected upper bit data BU and the lower bit data BL may be added. This configuration is effective in a case where the unit level shift amount LS cannot be handled in the range of only upper bits. Further, in this example, the case where the signal voltage level of the transmission wave output is detected has been described, but it is obvious that the configuration may be such that the signal current level and the signal power level of the transmission wave output are detected.

In this example, the case where the DC level of the branch signal is level-shifted by LS at each stage has been described.
Predetermined threshold value TH1 <TH2 (= 2 × TH1) in each stage
It is also possible to adopt a configuration in which only signal components exceeding the above are extracted by an amplifier having a gain of 1 or the like. FIG. 16 is a diagram for explaining another output detection unit in the embodiment, and shows another case in which an output that changes over a wide range is detected with high accuracy by a simple configuration. In the figure, reference numeral 28 denotes an attenuator (ATT).

In the detection module 34a, the demultiplexer 3
1 is not attenuated and the detection unit DT
U1 detects the branched wave input by diode detection and outputs a detection output B
a is output. The comparators CMP1 and CMP2 detect the detection output B
When a is THL ≦ Ba <THH, the detection output = 1 is output, and the AND gate circuit A1 is satisfied. In other cases, the AND gate circuit A1 is not satisfied. Incidentally, in this example, since Ba> THH, the AND gate circuit A1 is not satisfied.

In the detection module 34b, the attenuator 2
The output signal from 8a is input to the detection unit DTU2. The detection unit DTU2 performs diode detection on this signal and outputs a detection output Bb. THL for CMP1,2
By ≦ Bb <THH, the AND gate circuit A2 is satisfied, and a significant detection signal is obtained from the detection module 34b. Thereafter, the detection module 34c does not satisfy the AND gate circuit A3 because Bc <THL. Subsequent operations can be considered as in the case of FIG.

FIG. 17 is a diagram for explaining still another output detection section in the embodiment, and shows still another case in which an output that varies over a wide range is detected with a simple configuration and with high accuracy. In the figure, 2 is a voltage-controlled variable attenuator, 34 is a detection module similar to that in FIG.
9 is a multiplier. It is assumed that a branched wave having a large signal level is input from the duplexer 31 to the variable attenuator 2. Now, assuming that the attenuation of the variable attenuator 2 is 0 dB, the input branch wave is input to the detection unit DTU at the same signal level. In the detection module 34, Ba> TH (out of the detection range)
Is not satisfied, the detection signal DT = 0 is fed back to the detection control unit 38 in this case. Upon receiving the detection signal DT = 0, the detection control unit 38 controls the control voltage Vc until the detection signal DT = 1.
Is increased stepwise (for example, in one to several dB steps). As a result, the amount of attenuation of the variable attenuator 2 increases stepwise, and accordingly, the input signal level of the detection unit DTU decreases stepwise, so that the detection output Ba of the detection module 34 eventually reaches 0 ≦ Ba <TH (detection (Within the range). As a result, the detection signal DT becomes 1, and
Upon receiving this, the detection control unit 38 calculates a reciprocal multiplier M (+10) corresponding to the attenuation control amount (for example, −10 dB) at that time.
(equivalent to dB). On the other hand, the A / D converter 32 outputs the A / D conversion result Ba of the detection output Ba at that time,
The multiplier 39 adds a multiplier M to the A / D conversion result Ba.
Is output as data B of the final detection level of the transmission wave output. Therefore, a very wide range of output signal levels can be effectively detected with a simple configuration.

Note that a variable level shift circuit, a variable level signal extraction amplifier, or the like may be used instead of the variable attenuator 2. In the above description, the case where the input branch signal is level-shifted or attenuated has been described. However, the input branch signal is left as it is, and a plurality of detectors having detection sensitivity in different level ranges are provided. (Or one detector with variable sensitivity) may be configured to perform level detection. In this case as well, a detector whose branch signal level exceeds or falls below the detection range outputs an overflow or an underflow, and a detector whose branch signal level falls within the detection range outputs a significant detection level. One application example of such an output detection unit 30 will be described.

FIG. 18 is a diagram showing a configuration of a power control circuit according to the eleventh embodiment, showing a case where the power control circuit according to the present invention is applied to an example radio transmission circuit. This is also an example of efficiently detecting the output signal level of the wireless transmission circuit with a simple configuration. In the figure,
Reference numerals 30a to 30d denote output detection units having sensitivity in different ranges, respectively, and 50 denotes a power control unit.

When the output detection section 30a detects a significant detection level within its own detection sensitivity (range), the detection signal DT
The detection level data Ba is output together with a = 1. The same applies to the other output detectors 30b to 30d. If the output detection unit 30a outputs DTa = 1, the power control unit 50 finally outputs a value obtained by adding a predetermined bias value (for example, the upper / lower limit value dB of the detection range) to the detection level data Ba. Is the detection level data B. The same applies to the other output detectors 30b to 30d. Hereinafter, the operation will be specifically described.

FIG. 19 is a diagram for explaining the operation of the power control circuit according to the eleventh embodiment. In the figure, mixer 4 is 5 dB, attenuator 2 is -10 dB, and amplifier 3 is 15 dB.
It is assumed that each of B has a fixed gain or fixed attenuation characteristic.
Now, assuming that the output of the power variable unit 21 is −25 dB, the output of the mixer 4 = −20 dB, the output of the attenuator 2 = −30 dB, and the output of the amplifier 3 = −15 dB.
On the other hand, the output detector 30a is -20 to -30 dB, the output detector 30b is -10 to -20 dB, the output detector 30c is -30 to -40 dB, and the output detector 30d is 0 to -10 dB.
B has a detection sensitivity in each of the ranges B, and can cover a detection range of 0 to -40 bB as a whole.

Now, the power variable unit 2 is controlled by the small power control unit 10.
1 is temporarily increased by +5 dB, the output of the power variable unit 21 = −20 dB, and the output of the mixer 4 = −
15 dB, the output of the attenuator 2 = −25 dB, and the output of the amplifier 3 = −10 dB. As a result, in this case, the output detection unit 30b outputs the detection signal DTb = 1, and the power control unit 50 receiving this outputs the detection level data Bb = −5.
A value obtained by adding a predetermined bias value = −10 dB to dB−15
Let dB be the final detection level data B. Then, when the output of the small power control unit 10 is returned to the original state thereafter, the power control unit 50 interlocks with this, and the output of the mixer 4 = −1
As a result of controlling the power variable unit 21 to keep 5 dB constant, the output of the power variable unit 21 = −20 dB, the output of the mixer 4 = −15 B, the output of the attenuator 2 = −25 dB, the output of the amplifier 3 = −10 dB. Are maintained as they are.

Alternatively, assuming that the output of the power variable unit 21 is temporarily increased by +10 dB by the small power control unit 10, the output of the power variable unit 21 = −15 dB, the output of the mixer 4 = −10 dB, and the output of the attenuator 2 = −20 dB, the output of the amplifier 3 = −5 dB. As a result, in this case, the output detection unit 30d outputs the detection signal DTd = 1, and the power control unit 50 receiving this outputs the detection level data Bd =-.
A value obtained by adding a predetermined bias value = 0 dB to 5 dB−5 dB
Is the final detection level data B. Then, when the output of the small power control unit 10 is returned to the original state thereafter, the power control unit 50 operates in conjunction with this to output the output of the amplifier 3 = −5 dB.
As a result, the output of the power variable unit 21 = −15 dB and the output of the mixer 4 =
−10 dB, output of attenuator 2 = −20 dB, amplifier 3
Output = −5 dB is maintained as they are. It is also conceivable that the output of the power variable unit 21 decreases.

In each of the above embodiments, an example of a power control circuit has been mainly described, but the present invention can be applied to control circuits of other voltage levels and current levels. Further, in each of the above embodiments, the control circuit section is constituted by a digital circuit (comparator, counter, etc.), but may be constituted by an analog circuit (comparator, amplifier, integrating circuit, etc.).

In each of the above embodiments, the configuration of each part
Although the operation and the like have been described with specific numerical examples, the present invention is not limited to these numerical examples. Also, the power variable unit 11
/ 21 and the like can be constituted by a variable attenuator, a variable gain amplifier, an analog / digital circuit having a multiplication function, and the like. In addition, although a plurality of embodiments suitable for the present invention have been described, it is needless to say that various changes can be made in the configuration, control, and combination of these components without departing from the spirit of the present invention.

[0064]

As described above, according to the present invention, the small-scale output change by the first output control unit can be performed with relatively high accuracy, and the second output control unit can perform the small-scale high-precision change. With a simple configuration of stacking (or unloading) various output changes, output control in a high range in the second output control unit can be performed with high accuracy.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a diagram illustrating a configuration of a power control circuit according to the first embodiment.

FIG. 3 is an operation timing chart (1) of the power control circuit according to the first embodiment.

FIG. 4 is an operation timing chart (2) of the power control circuit according to the first embodiment.

FIG. 5 is a diagram illustrating a configuration of a power control circuit according to a second embodiment.

FIG. 6 is a diagram illustrating a configuration of a power control circuit according to a third embodiment.

FIG. 7 is a diagram illustrating a configuration of a power control circuit according to a fourth embodiment.

FIG. 8 is a diagram showing a configuration of a power control circuit according to a fifth embodiment.

FIG. 9 is a diagram illustrating a high power control unit according to a fifth embodiment.

FIG. 10 is a diagram illustrating a configuration of a power control circuit according to a sixth embodiment.

FIG. 11 is a diagram illustrating a configuration of a power control circuit according to a seventh embodiment.

FIG. 12 is a diagram illustrating a configuration of a power control circuit according to an eighth embodiment.

FIG. 13 is a diagram illustrating a configuration of a power control circuit according to a ninth embodiment.

FIG. 14 is a diagram illustrating a configuration of a power control circuit according to a tenth embodiment.

FIG. 15 is a diagram illustrating an output detection unit according to the embodiment.

FIG. 16 is a diagram illustrating another output detection unit according to the embodiment.

FIG. 17 is a diagram illustrating still another output detection unit according to the embodiment.

FIG. 18 is a diagram illustrating a configuration of a power control circuit according to an eleventh embodiment.

FIG. 19 is a diagram illustrating the operation of the power control circuit according to the eleventh embodiment.

FIG. 20 is a diagram illustrating a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power variable part 2 Variable attenuator 3 Amplifier (AMP) 4 Mixer 5,13,23 D / A converter 6 ROM 10 Low power control part 11,21 Power variable part 12,22 Up / down counter (CTR) 20 Large Power control unit 24 Register (REG) 25 Comparator (CMP) 28 Attenuator (ATT) 30 Output detection unit 31 Signal demultiplexer (H) 32 Detector 33 A / D converter 34 Detection module 35 Level shift circuit (LSF) ) 36 coder (COD) 37 analog switch (ASW) 38 detection control unit 39 multiplier 40 timing control unit 50 power control unit 60 high power control unit 70 small output control unit CMP comparator DTU detection unit

Claims (10)

[Claims] A first output control unit that changes an output signal level with respect to its own input signal level in accordance with a control input, and thereafter returns the output signal level to an original level; and an output detection unit that detects an output signal level of the circuit. A first output control unit connected in series with the first output control unit;
When the output signal level in the output control section changes, the output signal level of the circuit detected by the output detection section is held, and when the output signal level returns in the first output control section thereafter, the output circuit level changes. And a second output control unit for changing its own output signal level so as to keep the output signal level of the output signal level at the held output signal level. 2. The apparatus according to claim 1, wherein the first output control section has high accuracy and a relatively narrow range of output variable characteristics, and the second output control section has a relatively wide range of output variable characteristics. The output control circuit according to claim 1, wherein 3. The second output control unit is connected in series with each other, and has a plurality of same or different conversion characteristics for converting its own input signal level into a corresponding own output signal level according to a common control signal. The output control circuit according to claim 1, further comprising a level conversion section. 4. The first and second output control units according to claim 1, further comprising: an output detection unit that detects an output signal level of the circuit. Any one or two of a modulation circuit, a frequency conversion circuit, an amplification circuit, an attenuation circuit, a multiplication circuit, an addition circuit, and the like for converting its own input signal level to its own output signal level with the output detection unit. An output control circuit comprising the above level conversion circuit. 5. An output detection section for detecting one or more first output control sections according to claim 1, a second output control section according to claim 3, and an output signal level of the circuit. An output control circuit, comprising: one or more level conversion units in the second output control unit, and the one or more level conversion units in the second output control unit being distributed with the one or two or more first output control units interposed therebetween. 6. A structure in which a plurality of sets of the respective element units, each including the first and second output control units according to claim 1 and an output detection unit thereof, are connected in series, and a certain set of output detection units is provided. The output detection signal of the unit is configured to be fed back to the second output control unit of the certain set across the first and second output control units of another set and / or the output detection unit. Output control circuit. 7. An output detector, comprising: a signal branching unit that branches a part of an output signal to be detected; a signal dividing unit that divides the branched signal at a plurality of levels; and an amplitude of each of the divided signals. The output control circuit according to claim 1, further comprising: a level detection unit that detects a level. 8. An output detection unit, comprising: a signal branching unit that branches a part of an output signal to be detected; an attenuation unit that attenuates the branched signal to a plurality of levels; and an amplitude level of each of the attenuated signals. The output control circuit according to claim 1, further comprising: a level detection unit configured to detect the output signal. 9. An output detection unit, comprising: a signal branching unit for branching a part of an output signal to be detected; and a plurality of level detection units each having a sensitivity for a different or partially overlapping level range of the branched signal. The output control circuit according to claim 1, further comprising: 10. The first and second output control units according to claim 1, and a plurality of level converting means for converting own input signal level to own output signal level are connected in series, And a plurality of output detection units distributed between the level conversion units and detecting output signal levels of the level conversion units for different or partially overlapping level ranges, the second output control unit When one of the output detection units detects a significant signal level when the output signal level changes in the first output control unit, the output signal level at the detection point is kept constant based on the detected signal level. An output control circuit characterized by changing its own output signal level so as to maintain the output signal level.