JPH11150460A - Selection method and selector - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the overall scale a circuit by permitting a specified selector circuit part to select a signal supplied from respective selector circuit parts, based on the characteristic detection result of an input signal which plural selector circuits select. SOLUTION: Respective fault detection signals detected by fault detection circuits 36, 37, 46 and 47 are supplied to selector circuits 38 and 48 and selector control circuits 39 and 49. Autonomously operating selector control circuits 39 and 49 respectively determine fault detection signals which are to be selected by different selection references and output control signals. The selector circuits 38 and 48 select and output the fault detection signals supplied to them selves and input data corresponding to the signals. A selector control circuit 59 selects the fault detection signal, based on the selection reference which has been set beforehand and outputs the control signal. Then a selector circuit 58 selects and outputs the fault detection signal and input data, corresponding to the signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a selection method and a selector suitable for use when, for example, each selector circuit autonomously selects (switches) an input signal without the aid of a CPU.

[0002]

2. Description of the Related Art A conventional multistage selector has a configuration as shown in FIG.

In FIG. 2, the first stage P1 of the selector 10 has a plurality of selector circuits such as selector circuits 11 and 12, and the next stage P2 has a selector circuit 13.

The selector circuit 11 has input data Di1 to Di1.
L input data of DiL are supplied. Further, the failure detection signals output from the plurality of failure detection circuits 14 and 15 that perform failure detection for each of the input data Di1 to DiL are:
It is supplied to the selector control circuit 16.

The selector control circuit 16 selects one fault detection signal from the plurality of fault detection signals thus received, and sends a control signal corresponding to the fault detection signal to the selector circuit 11.

The selector circuit 11 receiving the control signal
Selects one of the L input data in response to the control signal, and transfers the input data to the next stage P2.
Output to

[0007] Similarly, the configuration and operation of the selector circuit 12, the failure detection circuits 17 and 18, and the selector control circuit 19 of the first stage P1 are the same.

The selector circuit 13 of the next stage P2, which has received data from the selector circuit of the first stage P1 such as the selector circuits 11 and 12, is provided with the fault detection circuits 20 and 21 and the selector control circuit, similarly to the selector circuit of the first stage P1. A plurality of data supplied by the operation of the circuit 22 are selected and output to a subsequent stage. The failure detection circuit 23 also performs failure detection on this output signal, and outputs this detection signal to the subsequent stage.

[0009]

However, in the selector having the above-described configuration, in order to detect a failure for each transmission path between the first-stage and the next-stage selector circuits, it is necessary to provide as many failure detection circuits as the number of the transmission paths. Therefore, there is a problem that the circuit scale is large.

[0010]

In order to solve this problem, in the first invention, each of the selector circuits constituting the n-th stage which has detected the characteristics of a plurality of input signals receives the result of the characteristic detection. And a signal selected from the plurality of input signals to the (n + 1) th stage selector circuit section by using the signal selected by the (n) th stage selector circuit section and the characteristic detection result of the signal. The signal is transmitted to the (n + 1) th selector circuit section, and based on the result of the characteristic detection, the (n + 1) th selector circuit section selects a signal supplied from each of the (n) th selector circuit sections.

Further, in the second invention, each of the selector circuit units constituting the n-th stage which detects the characteristics of a plurality of input signals,
In the selector for supplying a signal selected from the plurality of input signals to the (n + 1) th stage selector circuit portion using the result of the characteristic detection, an input signal selected by the nth stage selector circuit portion and the input signal Means for transmitting the result of the characteristic detection to the selector circuit of the (n + 1) -th stage, and based on the result of the characteristic detection, the selector circuit of the (n + 1) -th stage selects the signal supplied from each selector circuit of the n-th stage. Means for making a selection.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (A) Embodiment Hereinafter, an embodiment of a selection method and a selector according to the present invention will be described with reference to the drawings.

(A-1) Configuration of Embodiment FIG. 1 schematically shows a selector 30 according to this embodiment.

In FIG. 1, the first stage P1 is composed of a plurality of selector circuit units such as selector circuit units 31 and 32, and the next stage P2 is composed of one selector circuit unit 33.

The selector circuit section 31 supplies L input data D
L such as 34 and 35 for supplying i1 to DiL
The transmission lines are connected to L failure detection circuits such as reference numerals 36 and 37, respectively, and to an input terminal of a common selector circuit 38.

Output signal lines 36A and 37A of each of the fault detection circuits 36 and 37 are connected to a selector control circuit 39 and an input terminal of the selector circuit 38.

The selector control circuit 39 autonomously selects one of the fault detection signals (without the help of the CPU) from a plurality of fault detection signals supplied from the output signal lines 36A and 37A, and In order to send a control signal corresponding to the detection signal to the selector circuit 38, its output terminal is connected to the control terminal of the selector circuit 38.

Although not shown, the transmission lines 34 and 3
During 5, there can be many identical transmission paths. It is assumed that a failure detection circuit is provided for each of these transmission paths.

In the selector circuit section 32, the transmission path 4
4, 45, the failure detection circuits 46 and 47, and the output signal line 4
6A, 47A, selector circuit 48, selector control circuit 4
9 is the same as that of the selector circuit unit 31. Then, in the selector circuit section 32, the input data DiM to DiN
Is input and selected.

Although illustration is omitted, it is assumed that a number of selector circuit sections having the same configuration are provided between the selector circuit sections 31 and 32.
All of these selector circuits, including the two,
It is assumed that it is formed in I.

On the other hand, in the next stage P2, the selector circuit unit 33 differs from the selector circuit unit of the first stage P1 such as the selector circuit unit 31 in that the selector circuit unit 33 does not have a failure detection circuit.

The selector circuit 58 in the selector circuit section 33
Is connected to the output transmission line 3 of the selector circuit 38.
8A, input data Di1 to DiN of each selector circuit of the first stage P1 such as the output transmission line 48A of the selector circuit 48.
An output transmission line for selectively transmitting the data is connected.

Further, the input terminals of the selector circuit 58
Output signal lines for outputting a failure detection signal corresponding to input data selected by each selector circuit of the initial stage P1, such as an output signal line 38B of the selector circuit 38 and an output signal line 48B of the selector circuit 48, are connected. ing.

The selector circuit 58 outputs the input data Di1 to DiN selected by the selector circuit 58.
An output transmission line 58A and an output signal line 58B for outputting any one of them and a corresponding fault detection signal to a subsequent circuit (not shown) are connected. Since the failure detection signal obtained in the first stage P1 is used as it is in the next stage P2 and subsequent stages, no failure detection circuit is provided in the next stage and subsequent stages.

Some of the transmission paths from the first stage P1 to the next stage P2 have branch transmission paths such as a branch transmission path 38AB branched from the transmission path 38A, and the input path selected by the selector circuit. Data is also transmitted to other circuits having functions other than the select function through the branch transmission path.

The operation of the embodiment having the above configuration will be described below.

(A-2) Operation of the Embodiment For the selector control circuits denoted by reference numerals 39, 49, 58, etc., different selection criteria for the failure detection signal are set for each selector control circuit.

When the input data Di1 to DiN are transmitted to the transmission lines 34, 35, 44, 45, etc., the failure detection circuit 3
6, 37, 46, and 47 perform fault detection in real time, and output the resulting fault detection signal to the output signal line 36A.
Output using 37A, 46A, 47A.

With these output signal lines, each fault detection signal is transmitted to the selector circuits 38 and 48 and the selector control circuit 3.
9, 49.

Each selector control circuit 3 which operates autonomously
9 and 49 determine a failure detection signal to be selected based on the different selection criteria, and output a control signal according to the determined failure detection signal.

Each selector circuit 3 to which this control signal is input
8, 48 select the fault detection signal supplied to its own input terminal and the corresponding input data, and output transmission lines 38A, 48A and output signal lines 38B, 38B, respectively.
8B.

The input data Di1 to DiL selected by the selector circuit 38 are output transmission lines 38
In addition to being input to the selector circuit 58 via A, it is also transmitted to the other circuit via the branch transmission path 38AB and processed by the circuit.

The failure detection signal corresponding to the input data selected by the selector circuit 38 is input to the selector control circuit 59 through the output signal line 38B.

The selector control circuit 59, which also receives the supply of a failure detection signal output from another selector circuit belonging to the initial stage P1, selects all of these failure detection signals based on a preset selection criterion, and selects the selected failure detection signal. And outputs a control signal corresponding to.

The selector circuit 58 responds to this control signal.
Selects the failure detection signal and the corresponding input data, and outputs them from the output transmission line 58A and the output signal line 58B, respectively. That is, the failure detection signal obtained in the first stage P1 is used as it is in the next stage P2.

In order to operate autonomously under the constraints of hardware and software, each selector control circuit operates based on a relatively simple selection criterion, but the selector 30 as a whole has a complicated selection criterion. Input data can be selected.

(A-3) Effects of the Embodiment As described above, according to the present embodiment, only the first stage requires a failure detection circuit, and therefore the number of failure detection circuits is small and the circuit scale is small.

Although the present embodiment can be used in various environments, the transmission paths 34, 35, etc., to the first stage P1 are long or in an environment where a failure is likely to occur, and the first stage P1 is connected to the next stage. This is particularly effective when the transmission paths 38A and 48A between P2 are short or in an environment in which a failure is unlikely to occur.

(B) Other Embodiments In the above description, the selector has a two-stage configuration of the first stage and the next stage, but may have a multi-stage configuration of three or more stages. In this case, even if the number of stages increases, the failure detection signal obtained in the first stage selector circuit section is used as it is in the third and subsequent selector circuit sections, so the number of failure detection circuits does not increase at all and is more effective. It is.

Further, it may detect signal characteristics other than a fault.

Further, the plurality of input data supplied to each of the first-stage selector circuit units may be completely or partially overlapped, or may be completely different.

The object to be selected by the selector circuit section is not limited to the data signal, but may be a clock signal or the like.

Further, the branch transmission line may not be provided at all, or may be provided on all the transmission lines.

Further, the selector circuits in the same stage do not necessarily have to be in the same LSI. The selector circuit units at different stages may be in the same LSI,
It may be in SI. When these selector circuit sections exist over a plurality of LSIs, the selection criterion of the selector control circuit in each selector circuit section may be the same.

Further, each selector control circuit may not operate autonomously and may be a slave of the CPU.

Further, the selector circuit section may not be constituted by an integrated circuit such as an LSI, but may be constituted by a discrete circuit.

[0047]

As described above, according to the present invention, the configuration for detecting the characteristics of a plurality of input signals can be omitted, and the scale of the entire circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a selector according to an embodiment.

FIG. 2 is a block diagram showing a conventional selector.

[Explanation of symbols]

10, 30 ... selector, 31-33 ... selector circuit section,
14, 15, 17, 18, 20, 21, 23, 36, 3
7, 46, 47: Failure detection circuit, 34, 35, 44, 4
5, 38A, 48A, 58A ... transmission line, 36A, 37
A, 46A, 47A, 38B, 48B, 58B: output signal line, P1: first stage, P2: next stage, Di1 to DiN: input data.

Claims (4)

[Claims] 1. A selector circuit section constituting an n-th stage which detects characteristics of a plurality of input signals, uses a result of the characteristic detection to select a signal selected from the plurality of input signals in an (n + 1) -th stage. In the selecting method for supplying to the selector circuit section, a signal selected by the n-th stage selector circuit section and a characteristic detection result of the signal are transmitted to the (n + 1) -th stage selector circuit section, and based on the characteristic detection result. A selecting method, wherein the (n + 1) -th stage selector circuit section selects a signal supplied from each of the n-th stage selector circuit sections. 2. The selection method according to claim 1, wherein the result of the characteristic detection obtained by each of the selector circuits in the n-th stage is used as it is in the selector circuit in a stage subsequent to the (n + 1) -th stage. Select method. 3. Each of the selector circuit units constituting the n-th stage which has detected characteristics of a plurality of input signals, uses a result of the characteristic detection to select a signal selected from the plurality of input signals in an (n + 1) -th stage. A selector that supplies the input signal selected by the n-th stage selector circuit section and a characteristic detection result of the input signal to the (n + 1) -th stage selector circuit section in the selector supplied to the selector circuit section; Wherein the (n + 1) -th stage selector circuit unit selects a signal supplied from each of the n-th stage selector circuit units based on the above. 4. The selector according to claim 3, wherein: a means for transmitting a characteristic detection result obtained by each of the selector circuits in the n-th stage to a selector circuit in a stage subsequent to the (n + 1) -th stage; A selector circuit unit for selecting the signal using the result of the characteristic detection as it is.