JPH11149432A - Data transfer processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a data transfer processor appropriate for continuing and completing data transfer processing with the outside even when the CPU of a computer is hung up just in the middle of executing that data transfer processing. SOLUTION: An auxiliary storage device 6, which can be accessed from both a computer 1a and an arithmetic processor 4, is provided and corresponding to a data exchange processing request from the computer 1a, the processing of data exchange with a data transmission line 3 is executed. Then, the transmission object data received from the data transmission line 3 are stored in the auxiliary storage device 6, and transmission object data stored in the auxiliary storage device 6 are transmitted to the data transmission line 3 on the other hand.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transfer processing device for executing a data transfer process with a computer, and more particularly to a data transfer processing device for executing a data transfer process with a computer. The present invention relates to a data transfer processing device suitable for continuing and completing a data transfer process even when a CPU hangs up. More specifically, the present invention relates to a data transfer processing device that executes processing for transmitting and receiving data to and from a network line.

[0002]

2. Description of the Related Art Recently, with the increase in the speed of microprocessors, an OS (Operating System) equipped with a multitasking system can process a plurality of tasks within a relatively effective time even if they are executed by one CPU. As a result, such OSs have been applied to computers having a single CPU.

In this case, the above OS applied to a computer having a single CPU uses an FDD (Flexible Disk).
Drive), a modem, a printer, a scanner, a network line, and the like, and a task relating to data input / output processing with the outside of the computer were executed as follows.

First, when data is input from the outside, the data input from the outside via the interface is once read into the RAM of the computer according to the external data transmission speed, and the data read into the RAM is stored in the built-in HDD ( Hard Disk Drive). On the other hand, when outputting data to the outside, data for output is temporarily read from the HDD to the RAM, and the data read into the RAM is output to the outside via the interface according to the external data transmission speed. .

Therefore, in any case, data from the outside is once processed by the CPU via the RAM.

[0006]

However, a single C
In the above OS applied to a computer including a PU,
Since multiple tasks are executed by one CPU, tasks related to data input / output processing with the outside are executed, but if the CPU hangs up due to other tasks, the task is being executed. Are stopped, and the data input / output processing is naturally suspended. In this case, the CPU must be reset once and the data input / output processing must be restarted from the beginning.

For example, data input / output processing with an FDD or a network line is usually performed in file units.
When the CPU hangs up during the data input / output processing of a file having a large data size, it takes enormous time to redo the processing. In particular, in a data input / output process with a network line, such a problem is remarkable because a file having a large data size is handled relatively frequently.

Accordingly, an object of the present invention is to solve such a conventional problem. Even if the CPU of a computer hangs up during execution of data transfer processing with an external device, the data of the computer hangs. It is an object of the present invention to provide a data transfer processing device suitable for continuing and completing the transfer process.

[0009]

In order to achieve the above object, a data transfer processing device according to the present invention is provided between a computer and the outside thereof, and is provided between the computer and the outside. A data transfer processing device configured to execute data transfer processing between the computer and the external device in response to a data transfer processing request from the computer; Storage means capable of both reading and writing data, and the data transfer processing means, wherein the data transfer processing means stores data input from the outside in the storage means, or The data stored in the means is output to the outside.

With this configuration, when the computer is requested to execute data transfer processing for inputting data from the outside, data corresponding to the request is input from the outside by the data transfer processing means. The obtained data is stored in the storage means. Here, since the data transfer processing means executes the data transfer processing independently of the computer, the data transfer processing is normally completed regardless of the operation state of the computer, that is, all data is input. It is continuously executed until

Therefore, the computer only has to read the data stored in the storage means into its own storage means.
Even if hangs up, it is only necessary to reset the CPU once and then read the data stored in the storage means again into its own storage means.

Further, when the computer is requested to execute data transfer processing for outputting data to the outside, the data to be processed is read from the storage means by the data transfer processing means, and the read data is sent to the outside. Is output. Here, since the data transfer processing means similarly executes the data transfer processing independently of the computer, the data transfer processing is normally completed regardless of the operation state of the computer, that is, all the data is Continued until output.

Therefore, the computer writes the data to be processed stored in its own storage means to the storage means and requests the execution of the data transfer processing of outputting the data to the outside. Even if the CPU hangs up during execution, all data to be processed written in the storage means is output to the outside by the data transfer processing means.

Preferably, the storage means has an access speed higher than a data transmission speed with the outside. Further, the data transfer processing device according to the present invention executes data transfer processing such as data input or output to only one computer, but is limited to one for the outside. Alternatively, the data transfer process may be performed on a plurality of devices. That is, one-to-one data transfer processing may be performed between the computer and the outside, or one-to-many data transfer processing may be performed.

In the first aspect of the present invention, the outside of the computer is directly connected to the computer via an interface such as a serial port, a parallel port, and a printer port when the data transfer processing device according to the present invention is not provided. A device or a medium for inputting or outputting data to and from a storage medium such as an FDD, a device capable of reading and writing data to a storage medium, a network such as a modem, etc. , Printer, scanner, F
D or the like, a network medium itself, or the like. In this case, if the external means is a medium for inputting or outputting data to and from a computer, such as a storage medium such as an FD or a network line, the data transfer processing device or the computer according to the present invention may be used. Is provided with an apparatus equivalent to an apparatus such as an FDD or a modem.

In the data transfer processing, data input processing, output processing or control signal response processing for an FDD, a modem or the like, data output processing or control signal response processing for a printer or the like, For a scanner, data input processing or control signal response processing is performed, and for a network line, data reception processing, transmission processing, or line control processing is performed.

According to a second aspect of the present invention, in the data transfer processing device according to the first aspect, the outside is a network line to which another computer is connected.

With such a configuration, when data transfer processing is requested by the computer, the data transfer processing means executes the data transfer processing to the network line. In the process of transferring data to and from the network,
Because files with large data sizes are handled relatively frequently, when the CPU of the computer hangs up while executing data transmission / reception processing, file reception is restarted or file transmission is started from the beginning. The time and effort required to start over is greatly reduced compared to the related art.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an embodiment of a data transfer processing device according to the present invention. FIG. 2 is a diagram illustrating a configuration of the data transfer processing device.

In this embodiment, as shown in FIG. 1, the data transfer processing device according to the present invention is applied to a case where data transmitted from a transmitting computer 1a is received by a receiving computer 1b. .

In FIG. 1, a transmitting computer 1a and a receiving computer 1b are connected to each other via a data transmission line 3 for transmitting data so that data can be transmitted and received. A data transfer processor 2a is provided between the transmitting computer 1a and the data transmission path 3, and a data transfer processor 2b is provided between the receiving computer 1b and the data transmission path 3. I have. Although only two computers 1a and 1b are shown for easy understanding of the invention, a plurality of computers are actually connected to the data transmission path 3.

The data transfer processing devices 2a and 2b have the same function. Therefore, here, only the configuration of the data transfer processing device 2a will be described, and description of the configuration of the data transfer processing device 2b will be omitted.

As shown in FIG. 2, the data transfer processing device 2a includes an arithmetic processing device 4 for controlling arithmetic and the entire system based on a control program, and a main storage device 5 capable of electrically reading and writing data. An auxiliary storage device 6 that can magnetically read and write data, and an input / output control device 7 that controls input and output of data between the computer 1a, the data transmission path 3, the main storage device 5, and the auxiliary storage device 7. And is composed of Note that the arithmetic processing unit 4, the main storage device 5, and the input / output control device 7
They are interconnected by a bus BL, which is a signal line for transmitting data.

The input / output control device 7 includes a computer 1a
, The data transmission path 3 and the auxiliary storage device 6 are connected to each other, which are used for data input / output between the computer 1a, the main storage device 5 and the auxiliary storage device 6, and the data transmission path 3 Data input / output with the storage device 5 is controlled.

The main storage device 5 is a ROM in which a control program for the arithmetic processing device 4 is stored in a predetermined area in advance.
And data read from the ROM, the computer 1a, the data transmission path 3 or the auxiliary storage device 6, and the arithmetic processing device 4.
And a RAM for storing calculation results required in the calculation process.

The auxiliary storage device 6 can be accessed by both the arithmetic processing unit 4 and the computer 1a. However, while one is reading or writing data, even if the other requests reading or writing data, the execution of one of the data is waited until one of the processes is completed.

The arithmetic processing unit 4 comprises a micro-processing unit MPU or the like. When the computer 1a requests execution of data transmission processing, a predetermined program stored in a predetermined area of the ROM of the main storage device 5 is started. Then, while the processing shown in the flowchart of FIG. 3 is executed, when the execution of the data receiving processing is requested by the computer 1a, the processing shown in the flowchart of FIG. 4 is executed.

Here, in the arithmetic processing unit 4, the processing to be executed when execution of the data transmission processing is requested by the computer 1a is configured as follows. As described later, when the arithmetic processing unit 4 receives a request to transmit data from the data transfer processing unit 2b, the arithmetic processing unit 4 notifies the computer 1a of the request. The computer 1a sends a request to execute the data transmission process to the data transfer processing device 2a. When the transmission target data is to be transmitted, the computer 1a stores the transmission target data in the auxiliary storage device 6, and then executes the data transmission process execution. A request is sent, and the designation of data to be transmitted and the network address of the destination computer 1b are provided to the data transfer processing device 2a.

First, as shown in FIG. 3, in step S1, the designation of the transmission target data provided with the request for executing the data transmission process is obtained, and the process proceeds to step S2.
The network address of the destination computer 1b provided together with the request for execution of the data transmission process is obtained, and the process proceeds to step S3, where the transmission target stored in the auxiliary storage device 6 is specified based on the obtained specification of the transmission target data. The data is read into the RAM of the main storage device 5, and the process proceeds to step S4.
It is supposed to shift to.

In step S4, the transmission target data is divided for each predetermined data size, and the process proceeds to step S5.
A data packet is generated by adding the acquired network address and the like to each of the divided transmission target data, and step S
6, the process generates a header packet to which combined information (information for restoring the divided transmission target data) and the like are added, and then proceeds to step S7.

In step S7, the generated header packet is transmitted to the data transmission line 3 via the input / output control device 7, and the process proceeds to step S8, where the generated data packet is transmitted via the input / output control device 7. Send to Road 3,
The process proceeds to step S9 to determine whether all data packets have been transmitted. If it is determined that the data packets have been transmitted, the process proceeds to step S10 to notify the computer 1a that the transmission of the transmission target data has been completed. Then, a series of processing is terminated.

On the other hand, if it is determined in step S9 that all data packets are not to be transmitted, the process proceeds to step S9.
8. In addition, the arithmetic processing unit 4
The processing executed when the computer 1a requests execution of the data reception processing is configured as follows.

First, when execution of the data receiving process is requested, the arithmetic processing unit 4 sends a request to the computer 1b to receive the data to transmit the data according to the request. Then, the process proceeds to step S11 in the flowchart of FIG.

In step S11, a header packet or data packet is received from the data transmission path 3 via the input / output control device 7, and the process proceeds to step S12, where the network address added to the received header packet or data packet is received. Is determined to match with that of the computer 1a, and when it is determined to match, the process proceeds to step S13. When the match is determined in step S12, the network address of the computer 1a is referred to. This is stored in advance in the ROM of the main storage device 5 or stored in the auxiliary storage device 6. I have.

In step S13, the original data to be transmitted is assembled from the received data packet based on the combination information added to the received header packet, and the flow advances to step S14 to completely restore the data to be transmitted. It is determined whether or not the process has been completed. If it is determined that the image has been completely restored, the process proceeds to step S15. If it is determined that the image has not been completely restored, the process proceeds to step S11.

In step S15, the restored data to be transmitted is stored in the auxiliary storage device 6, and the process proceeds to step S16, where the computer 1 notifies that the data to be transmitted has been received.
a, and a series of processes is terminated.

On the other hand, if it is determined in step S12 that the network address added to the received packet does not match that of the computer 1a, the flow shifts to step S17 to input / output the received header packet or data packet. The data is retransmitted to the data transmission path 3 via the control device 7, and the process proceeds to step S11.

Next, the operation of the above embodiment will be described.
First, it is assumed that the computer 1b transmits a request to execute data reception processing to the data transfer processing device 2b in order to receive desired data stored in the storage unit of the computer 1a. Then, the data transfer processing device 2
In b, a request is transmitted to the computer 1a to transmit data according to the request for executing the data reception process.

On the other hand, when this request is received, the data transfer processor 2a notifies the computer 1a of the request. When the computer 1a receives the notification and transmits the transmission target data A according to the request to the computer 1b, the computer 1a stores the transmission target data A in the auxiliary storage device 6 of the data transfer processing device 2a, and transmits the data. A request for execution of processing is transmitted, and the designation of the transmission target data A and the network address Bad of the transmission destination computer 1b are transmitted to the data transfer processing device 2a
Shall be provided. The transmission target data A has a relatively large data size, and here, the data size is, for example, 6 Mbytes (6,291,456 bytes).

Then, in the data transfer processing device 2a,
Is transmitted based on the specified transmission target data A.
The data A to be transmitted is read into the RAM, and
(E.g., 128 bytes)
49,152 target data A (6,291,456 ÷ 128) transmission pairs
Elephant data A₀~ A_N(N = 49,151). Soshi
And the transmission target data A₀The provided network
Address Bad and other information (source computer
Network address Aad of the data 1a) is added.
As a result, the data packet A₀Is generated. Similarly,
Transmission target data A ₁~ A_NThe provided network
Address Bad and other information are added.
Data packet A₁~ A_NIs generated.

Next, the combination information (the original transmission target data A
Is generated from the data packets A _{0 to} A _N ), the provided network address Bad, and a header packet H to which other information is added, and the header packet H is transmitted to the data transmission path 3. . Subsequently, the data packets A ₀ to A _N are sequentially transmitted to the data transmission line 3, all of the data packets A ₀ to A _N is transmitted, the computer 1a that the transmission has been completed the transmission target data A Will be notified. By this notification, the computer 1a can confirm that the transmission of the transmission target data A has been completed.

As described above, after the computer 1a sends the data transmission processing execution request to the data transfer processing device 2a, the transmission process of the transmission target data A is performed by the data transfer processing device 2a. The transmission target data A is transmitted to the transmission destination computer 1b regardless of the operation state.

On the other hand, in the data transfer processing device 2b, the header packet H transmitted from the computer 1a is received, and the data packets A _{0 to} A _N are sequentially received. At this time, the network address B added to the header packet H and the data packets A _{0 to} A _N
and ad, because the network address Bad computer 1b connected to the self, are matched, based on binding information added to the header packet H, restore transmitted data A from the data packet A ₀ to A _N Is done. Next, the restored transmission target data A is stored in the auxiliary storage device 6, and the computer 1b is notified that the transmission target data A has been received.

Upon receiving this notification, the computer 1b accesses the auxiliary storage device 6 of the data transfer processing device 2b and reads the received transmission target data A into its own storage means such as a RAM.

As described above, since the receiving process of the transmission target data A is performed by the data transfer processing device 2b, the transmission target data A is received by the data transfer processing device 2b regardless of the operation state of the computer 1b.

As described above, the auxiliary storage device 6 which can be accessed by both the computer 1a and the arithmetic processing unit 4 is provided, and in response to a request for execution of data transmission / reception processing from the computer 1a, data is transmitted to / from the data transmission path 3. Since the transmission / reception processing is executed to store the transmission target data received from the data transmission path 3 in the auxiliary storage device 6, the transmission target data stored in the auxiliary storage device 6 is transmitted to the data transmission path 3. The transmission target data can be transmitted regardless of the operation state of the computer 1a.
When the PU hangs up, the possibility of restarting the data transmission process from the beginning can be reduced as compared with the related art. In addition, since the transmission target data can be received regardless of the operation state of the computer 1a, the CP of the computer 1a during the data reception processing is executed.
When U hangs up, the possibility of restarting the data receiving process from the beginning can be reduced as compared with the related art. Therefore, it is possible to reduce the labor and time required for redoing as compared with the related art.

In particular, since the data transfer processing device 2a is applied to the transmission and reception of data on a network that handles files of large data size relatively frequently, when the CPU of the computer 1a hangs up during data transmission and reception. Thus, it is possible to greatly reduce the time and effort required to restart receiving a file from the beginning or to restart transmitting a file from the beginning.

In the above-described embodiment, the data transfer processing devices 2a and 2b are configured to execute the data transmission processing and the data reception processing. It may be configured to execute.

Further, in the above-described embodiment, the data transfer processing devices 2a and 2b according to the present invention are applied to execute data transmission / reception processing on a network. However, the present invention is not limited to this. Applicable to execute data transfer processing to devices that can read and write data to and from storage media, devices that control data communication to network lines such as modems, printers, scanners, etc. You may. Further, in this case, the data transfer processing devices 2a and 2b not only execute the data transmission / reception processing on the network, but also execute the data transfer processing with respect to a printer, a scanner, and the like. May be configured.

Further, in the above embodiment, when executing the processing shown in the flow charts of FIGS. 3 and 4, the program stored in the ROM of the main storage device 5 is executed. ,
The present invention is not limited to this, and the program may be configured to be read from a storage medium storing a program indicating these procedures into the RAM of the main storage device 5 and executed.

Here, the recording medium is a semiconductor storage medium such as a RAM or a ROM, a magnetic storage type storage medium such as an FD or HD, an optical reading type storage medium such as a CD, CDV, LD, or DVD, or an MO storage medium. It is a magnetic storage type / optical readout type storage medium, and includes any storage medium that can be read by a computer irrespective of an electronic, magnetic, optical or other reading method.

In the above embodiment, the auxiliary storage device 6
Corresponds to the storage means according to claim 1, and the arithmetic processing unit 4
And steps S1 to S9 or the processing unit 4, steps S11 to S15 and step S
17 corresponds to the data transfer processing means according to claim 1;
The data transmission path 3 corresponds to the outside according to the first or second aspect.

[0053]

As described above, according to the data transfer processing device of the present invention, the data transfer processing with the outside can be executed irrespective of the operating state of the computer. When the CPU of the computer hangs up while executing data transfer processing with the outside, the possibility of restarting the data transfer processing from the beginning is reduced, thereby reducing the time and effort required for this. Is obtained.

In particular, according to the data transfer processing device of the present invention, when the CPU of the computer hangs up while executing the data transfer processing with the outside, the data transfer processing is performed. The effect that the labor required to start over from the beginning can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment.

FIG. 2 is a diagram illustrating a configuration of a data transfer processing device.

FIG. 3 is a flowchart illustrating a process executed when execution of a data transmission process is requested by a computer.

FIG. 4 is a flowchart illustrating processing executed when execution of data reception processing is requested by a computer.

[Explanation of symbols]

 1a, 1b Computer 2a, 2b Data transfer processing device 3 Data transmission path 4 Arithmetic processing device 5 Main storage device 6 Auxiliary storage device 7 Input / output control device

Claims (2)

[Claims] 1. A data transfer processing device provided between a computer and the outside thereof and adapted to execute a data transfer process between the computer and the outside, comprising: A data transfer processing unit that executes a data transfer process with the outside in response to a processing request; and a storage unit that allows both the computer and the data transfer processing unit to read and write data. A data transfer processing device, wherein the transfer processing means stores the data input from the outside in the storage means, or outputs the data stored in the storage means to the outside. . 2. The system according to claim 1, wherein the outside is a network line to which another computer is connected.
The data transfer processing device according to the above.