JPH11142459A - Transformer error testing device with zero load function - Google Patents
Transformer error testing device with zero load functionInfo
- Publication number
- JPH11142459A JPH11142459A JP9322391A JP32239197A JPH11142459A JP H11142459 A JPH11142459 A JP H11142459A JP 9322391 A JP9322391 A JP 9322391A JP 32239197 A JP32239197 A JP 32239197A JP H11142459 A JPH11142459 A JP H11142459A
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- JP
- Japan
- Prior art keywords
- transformer
- voltage
- current
- circuit
- feedback
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Testing Electric Properties And Detecting Electric Faults (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、計器用変圧器
(VT)又は変流器(CT)の比誤差及び位相角誤差を
比較測定する場合においてVT,CTの負担が零になる
ように測定器の内部インピーダンスを手動又は自動的に
制御する機能を備えた装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for comparing and measuring the ratio error and the phase angle error of an instrumentation transformer (VT) or a current transformer (CT) so that the VT and CT burdens become zero. The present invention relates to a device having a function of manually or automatically controlling the internal impedance of a vessel.
【0002】[0002]
【従来の技術】CTの誤差測定を比較法によって行なう
場合、図1に示すように測定器1の誤差測定回路2に標
準変流器CTSを直接接続すると共に被試験器CTXを指
定負担Ziを介して接続し、測定器内の電流比較変成器
3の検出巻線Ngに流れる不平衡電流Ig中のIS同相成
分IRと90°成分Ijを調整器4a,4bにより増幅器
4cを介して帰還巻線Nnに加えて検流器Dを指標とし
て比誤差εと位相角誤差θを求めている。5は、標準変
流器回路、6は被測定器接続回路である。この測定にお
いてはCTXの負担(単位[VA])はV2・IXである
が、被測定器接続回路6中にCTXの接続導線7その他
の導線抵抗Rrと、NX巻線の巻線抵抗が内部抵抗Rmと
して存在するのでV2にはVm+Vrの電圧降下を含むこ
とになり、指定負担Ziに対して誤差要因となる。この
影響はZiが小さくなるほど大きくなる。然るに最近は
CTの二次側に接続する計測器等が低負担になり、誤差
試験に際して指定負担0[VA](CTの場合V2=
0)が要求される場合があり、上記従来回路ではZi=
0にしてもVm+Vr≠0にすることは不可能であるから
零負担試験は実現できないことになる。また、変圧器V
Tの誤差試験の場合は、図4に示すように試験器1内の
測定回路2の前段に標準変圧器VTSと二次定格電圧
(通常63.5V〜220V)が異なる被試験変圧器V
TXに対応させるために定格電圧切換用高精度変圧器TD
が挿入されている。この回路においてVTXの負担はVX
・I2[VA]であるが、電流I2は負担インピーダンス
ZTに流れる電流I2′の他に、変圧器TDの励磁電流IO
と測定回路2に流れる電流Im′の和Imを測定電流とし
て含むため指定負担が小さい場合はImが相対的に大き
くなって誤差が大きくなる。また負担を0にしたい場
合、即ちZTを解放してもImのためにI2=0にするこ
とができないから零負担は実現できない。2. Description of the Related Art When measuring CT errors by a comparison method, as shown in FIG. 1, a standard current transformer CT S is directly connected to an error measuring circuit 2 of a measuring device 1 and a device under test CT X is designated and charged. connected via a Z i, I S-phase component I R and regulator 4a the 90 ° component I j in unbalanced current I g flowing through the detection coil N g of the current comparator transformer 3 in the meter, 4b seeking specific error ε and the phase angle error θ as an index the galvanometer D in addition to the feedback winding n n via the amplifier 4c by. 5 is a standard current transformer circuit, and 6 is a device-under-test connection circuit. In this measurement, the load (unit [VA]) of CT X is V 2 · I X , but the connecting wire 7 of CT X and other lead resistance R r and the N X winding winding resistance is that a voltage drop of V m + V r to V 2 due to the presence as the internal resistance R m, the error factor for a given load Z i of. This effect increases as Z i decreases. However, recently, a measuring instrument connected to the secondary side of the CT has a low burden, and a specified burden 0 [VA] (V 2 =
0) may be required, and in the above conventional circuit, Z i =
Even if it is 0, it is impossible to make V m + V r ≠ 0, so that the zero burden test cannot be realized. Transformer V
If the error test T, then a standard transformer in front of the measuring circuit 2 of the tester 1 as illustrated in FIG. 4 VT S and secondary rated voltage (typically 63.5V~220V) is different under test transformer V
Rated voltage switching precision transformer T D in order to correspond to the T X
Is inserted. The burden of VT X in this circuit is V X
· I 2 is a [VA], the current I 2, in addition to the current I 2 'flowing to the load impedance Z T, the exciting current I O of the transformer T D
Error increases increases relatively is I m If the small designation burden for containing the sum I m of the current I m 'flowing through the measuring circuit 2 as a measurement current. If the burden is to be reduced to zero, that is, even if Z T is released, it is impossible to set I 2 = 0 because of Im , so that zero burden cannot be realized.
【0003】[0003]
【発明が解決しようとする課題】この発明は、変流器の
場合においては被試験変流器の二次端子電圧V2を0の
状態とし、変圧器の場合は被試験器接続回路の測定電流
Imを0にして、しかも夫々の場合において増幅回路を
用いるに拘らず発振等を生じないで安定な測定ができる
誤差試験装置を提供するものである。[Problems that the Invention is to Solve The present invention, the secondary terminal voltage V 2 of the test current transformer in the case of current transformer to the state of 0, the measurement of the device under test connection circuit in the case of a transformer It is an object of the present invention to provide an error test apparatus which can set a current Im to 0 and can perform stable measurement without causing oscillation or the like regardless of the use of an amplifier circuit in each case.
【0004】[0004]
【課題を解決するための手段】本発明変流器試験装置
は、被試験変流器と誤差測定回路間の接続回路に電流検
出用変流器と電圧帰還用のトランスを挿入し、前記電流
検出用変流器出力を基準電圧ベクトルとして同相電圧と
90°位相電圧を得て、これらを被測定変流器の二次端
子間に接続した電圧検出器出力を0にするように増幅器
を介して前記トランスに負帰還させるものである。更
に、上記装置において帰還用トランスと被試験変流器端
子間に接続した電圧検出器の間に該検出器出力を入力信
号とし、電流検出用変流器出力を基準ベクトルとする同
相電圧と90°位相電圧を参照信号とする帰還電圧自動
制御回路を接続して前記制御回路の出力を前記帰還用ト
ランスに帰還させるようにしたものである。また、本発
明変圧器試験装置は、測定回路と被試験変圧器間に介装
されている定格電圧切換用変圧器を利用して該変圧器に
基準電圧ベクトル発生用巻線と帰還用巻線を付加すると
共に前記帰還用巻線に上記変流器試験装置における自動
制御回路と同様の制御回路を接続し、この制御回路に被
試験変圧器接続回路に直列接続した電流検出器からの変
換電圧を入力して前記帰還用巻線に前記定格電圧切換用
変圧器の励磁電流と二次巻線に流れる測定回路流入電流
の和電流即ち測定電流を供給して接続回路に流れる測定
電流を消除するものである。According to the present invention, there is provided a current transformer testing apparatus comprising a current detecting current transformer and a voltage feedback transformer inserted into a connection circuit between a current transformer under test and an error measuring circuit. Using the output of the current transformer for detection as a reference voltage vector, an in-phase voltage and a 90 ° phase voltage are obtained, and these are connected via an amplifier so that the output of the voltage detector connected between the secondary terminals of the current transformer to be measured becomes zero. The negative feedback to the transformer. Further, in the above device, between the feedback transformer and the voltage detector connected between the terminals of the current transformer under test, the output of the detector is used as an input signal, and the common mode voltage having the output of the current detection current transformer as a reference vector and 90%. ° An automatic feedback voltage control circuit using a phase voltage as a reference signal is connected so that the output of the control circuit is fed back to the feedback transformer. Further, the transformer test apparatus of the present invention uses a rated voltage switching transformer interposed between the measurement circuit and the transformer under test, and the reference voltage vector generating winding and the feedback winding are provided on the transformer. And a control circuit similar to the automatic control circuit in the current transformer test device is connected to the feedback winding, and the conversion voltage from the current detector connected in series to the transformer connection circuit under test is connected to this control circuit. Is supplied to the feedback winding to supply the sum current of the exciting current of the rated voltage switching transformer and the inflow current of the measurement circuit flowing through the secondary winding, that is, the measurement current, thereby eliminating the measurement current flowing through the connection circuit. Things.
【0005】[0005]
【発明の実施の形態】図2において測定回路2の構成は
図1と同様である。接続回路6には電圧帰還用の変成器
(トランス)T2と電流IX検出用変流器CTdが直列に
接続され、被試験変流器CTXの二次端子u,vに接続
回路6に並列して電圧検出用変成器(トランス)T1が
接続されている。GはトランスT1の二次側に接続され
ている検流計である。8は接続用ケーブルである。10
は電流検出用変流器の出力電流IX′から接続回路電流
IXと同相の電圧ベクトルeSと90°位相電圧ベクトル
ejを発生させる基準ベクトル発生回路であって反転増
幅回路9aと積分回路9bとから構成されている。
RS,Rjは夫々の調整用可変抵抗、AKは増幅率が比較
的小さい(1≧増幅率)増幅器である。増幅器の出力は
被試験変流器CTXの負担電圧V2に対して負帰還となる
ように変成器T2に印加される。この回路において可変
抵抗RS,Rjを調整して検流計Gの振れが零になった状
態は変成器T2の出力電圧V0=−(Vm+Vr)となった
ときであるからV2=0である。接続回路の導線抵抗Rr
にはCTdの抵抗分を含んでいる他、CTXと測定器1間
の接続ケーブル8の抵抗分を含んでいるから接続ケーブ
ルが延長されても被試験器CTXの二次側回路即ち接続
回路全体の電圧降下を打消すことができる。本回路にお
いては被試験器CTXの負担要素である電圧V2をCTX
の端子間で直接検出しており、V2=0に制御するとIT
=0となるので測定電流IXに影響を与えないからIX中
の誤差成分即ちCTXの誤差を正確に測定することがで
きる。また、この回路において増幅器AKの増幅率が1
であってもよいから発振のおそれは全くない。DESCRIPTION OF THE PREFERRED EMBODIMENTS In FIG. 2, the configuration of a measuring circuit 2 is the same as that of FIG. Transformer for voltage feedback to the connecting circuit 6 (trans) T 2 and the current I X detecting current transformer CT d are connected in series, the secondary terminal u of the test current transformer CT X, v connection circuit voltage detection transformer in parallel to 6 (trans) T 1 is connected. G is a galvanometer which is connected to the secondary side of the transformer T 1. Reference numeral 8 denotes a connection cable. 10
The integral output current I X connect 'circuit current I X and phase of the voltage vector e S and 90 ° phase voltage vector e j inverting amplifier circuit 9a a reference vector generation circuit for generating a current detection current transformer And a circuit 9b.
R S and R j are the respective variable resistors for adjustment, and AK is an amplifier having a relatively small amplification factor (1 ≧ amplification factor). The output of the amplifier is applied to the transformer T 2 so that the negative feedback with respect to load voltage V 2 of the test current transformer CT X. In this circuit, the state where the deflection of the galvanometer G becomes zero by adjusting the variable resistors R S and R j is when the output voltage V 0 of the transformer T 2 becomes − (V m + V r ). From V 2 = 0. Conductor resistance R r of connection circuit
Includes the resistance of CT d and also includes the resistance of the connection cable 8 between CT X and the measuring instrument 1. Therefore, even if the connection cable is extended, the secondary circuit of the device under test CT X , that is, The voltage drop of the entire connection circuit can be canceled. In this circuit, the voltage V 2 , which is a burden element of the device under test CT X , is set to CT X
Are directly detected between the terminals, controlling the V 2 = 0 I T
= 0 since the error of the error component or CT X of do not affect the measurement current I X in I X can be accurately measured. In this circuit, the amplification factor of the amplifier AK is 1
Therefore, there is no possibility of oscillation.
【0006】上記図2の回路においては可変抵抗RS及
びRjを手動で調整する必要がある。図3はこの操作を
不要にして測定を全自動で行なえるようにした回路であ
る。図2と同一記号で示した回路要素は同一のものであ
るからこの説明は省略する。15は帰還電圧自動制御回
路であって、M1,M2は乗算型同期整流器、QS,Qjは
乗算型可変抵抗素子、A1,A2は高利得増幅器、AKは
増幅率の小さい増幅器である。変成器T1の出力電圧e
=KV2である(但しKはT1の巻数比)。同期整流器M
1の出力ES′は、入力電圧e のeSと同相成分に比例し
た直流電圧であり、M2の出力Ej′はe のejと同相成
分に比例した直流電圧であって夫々増幅器A1,A2によ
って増幅される。この回路においてA1,A2の増幅率が
無限大であればES′=0,Ej′=0となり、この結果
e=0即ちV2=0とすることができる。実際の増幅器
A1,A2の増幅率は有限であるから0に近い制御偏差が
残るが実用上充分な精度で測定できる。また、QS,Qj
の出力ES,Ejは直流信号であるから増幅器A1,A2の
増幅率を大きくしても変流器CTd→増幅器AK→変成
器T2の交流回路の増幅度が小さいので発振のおそれは
ない。In the circuit of FIG. 2, the variable resistor RSPassing
And RjNeed to be adjusted manually. FIG. 3 illustrates this operation.
This is a circuit that can perform measurement automatically without making it unnecessary.
You. Circuit elements indicated by the same symbols as those in FIG. 2 are the same.
Therefore, the description is omitted. 15 is a feedback voltage automatic control circuit
Road, M1, MTwoIs a multiplying synchronous rectifier, QS, QjIs
Multiplying variable resistance element, A1, ATwoIs a high gain amplifier, AK is
This is an amplifier with a small amplification factor. Transformer T1Output voltage e
= KVTwo(Where K is T1Turns ratio). Synchronous rectifier M
1Output ES′ Is the input voltage e ESIs proportional to the in-phase component
DC voltage, and MTwoOutput Ej'Is e EjSame phase
DC voltage in proportion to minutes1, ATwoBy
Is amplified. In this circuit, A1, ATwoAmplification factor
E for infinityS'= 0, Ej'= 0, and as a result
e = 0, ie, VTwo= 0. Real amplifier
A1, ATwoHas a finite amplification factor, so a control deviation close to 0
It remains but can be measured with sufficient accuracy for practical use. Also, QS, Qj
Output ES, EjIs a DC signal, so amplifier A1, ATwoof
Current transformer CT even if the amplification factor is increasedd→ Amplifier AK → Metamorphosis
Bowl TTwoBecause the amplification of the AC circuit is small,
Absent.
【0007】図5は、変圧器用誤差測定器の図3に対応
する回路図である。図中、CTPは、被試験変圧器VTX
の接続回路6に直列に挿入され、測定電流Imを検出す
るための変流器、Nfは、定格電圧切換用変圧器TDに付
加された帰還用巻線、Ndは基準電圧検出用巻線であ
る。変流器CTPの検出電流iXは電流−電圧変換器14
によって電圧eに変換され、帰還電圧自動制御回路15
に入力される。検出用巻線Ndに発生する電圧e2は基準
ベクトル発生回路10において基準電圧ベクトルeS,
ejとされて制御回路15の乗算型同期整流器M1,M2
に入力される。制御回路15の構成は図3と同一であっ
て出力電圧が帰還用巻線に印加される。帰還用巻線Nf
には測定回路2に流入する電流Im′と変圧器TDの励磁
電流IOを生ずる電流が帰還され、これによって接続回
路6の測定電流Im即ち定格切換用変圧器TDの一次巻線
NPに流れる電流を0にすることができる。測定電流Im
が0であるから電流検出用変流器CTPによる電圧降下
や被試験変圧器VTXから測定器までの接続ケーブルの
抵抗による電圧降下があっても定格電圧切換用変圧器の
入力端子間電圧VX′=VXなる条件が維持され零負担試
験ができる。FIG. 5 is a circuit diagram corresponding to FIG. 3 of the transformer error measuring device. In the figure, CT P is the transformer under test VT X
Is inserted into the connecting circuit 6 in series, current transformer for detecting the measurement current I m, N f is the feedback winding which is added to the rated voltage switching transformer T D, N d is the reference voltage detector Winding. Detection current of the current transformer CT P i X is a current - voltage converter 14
Is converted into a voltage e by the feedback voltage automatic control circuit 15.
Is input to The voltage e 2 generated in the detection winding N d is supplied to the reference vector generation circuit 10 by the reference voltage vector e S ,
Multiplying synchronous rectifier M 1 of the control circuit 15 is a e j, M 2
Is input to The configuration of the control circuit 15 is the same as that of FIG. 3, and the output voltage is applied to the feedback winding. Feedback winding N f
Current generated the excitation current I O of the transformer T D and current I m 'flowing into the measuring circuit 2 is fed back to thereby primary winding of the measuring current I m That rated switching transformer T D of the connection circuit 6 the current flowing through the line N P can be made zero. Measurement current Im
Voltage drop and tested transformer VT rated voltage even the voltage drop due to the resistance of the connecting cable from X to meter switching transformer input terminal voltage due but 0 a is because current detecting current transformer CT P The condition of V X ′ = V X is maintained, and the zero burden test can be performed.
【0008】[0008]
【効果】本発明誤差試験装置は、被試験器と測定回路と
の間の接続回路中に帰還用トランスを含む比較的簡単な
回路が接続され、帰還用巻線に増幅器が接続されている
が、増幅率が1に近い低利得増幅器であるから発振のお
それがなく零負担試験を実現できる。なお本装置におい
て指定負担試験を行なう場合は、例えば変流器試験の場
合においては指定負担Ziを図2の如く挿入することに
よって正確な指定負担試験を行なうことができる。According to the error test apparatus of the present invention, a relatively simple circuit including a feedback transformer is connected in a connection circuit between the device under test and the measurement circuit, and an amplifier is connected to the feedback winding. Since the low gain amplifier has an amplification factor close to 1, the zero load test can be realized without fear of oscillation. In the case of performing the specified load test in the present device, for example in the case of a current transformer test can be performed accurately specified load test by inserting as shown in FIG. 2 the specified load Z i.
【図1】従来の変流器用誤差測定器の要部回路図。FIG. 1 is a main part circuit diagram of a conventional error measuring device for a current transformer.
【図2】本発明変流器用零負担誤差試験装置の回路図。FIG. 2 is a circuit diagram of a zero-burden error test apparatus for a current transformer according to the present invention.
【図3】本発明変流器用自動零負担誤差試験装置の回路
図。FIG. 3 is a circuit diagram of an automatic zero load error test apparatus for a current transformer according to the present invention.
【図4】従来の変圧器用誤差試験装置の要部回路図。FIG. 4 is a main part circuit diagram of a conventional error test apparatus for a transformer.
【図5】本発明変圧器用自動零負担誤差試験装置の回路
図。FIG. 5 is a circuit diagram of an automatic zero load error test apparatus for a transformer according to the present invention.
1 測定器 2 誤差測定回路 3 電流比較変成器 4c 増幅器 5 標準器回路 6 接続回路 7 導線 8 接続ケーブル 9a 反転増幅回路 9b 積分回路 10 基準ベクトル発生器 14 電流−電圧変換回路 15 帰還電圧自動制御回路 T1 電圧検出トランス T2 電圧帰還用トランス CTd 電流検出用変流器 TD 定格切換用変圧器 Nf 帰還用巻線 Nd 基準電圧検出用巻線DESCRIPTION OF SYMBOLS 1 Measuring instrument 2 Error measuring circuit 3 Current comparison transformer 4c Amplifier 5 Standard circuit 6 Connection circuit 7 Conductor 8 Connection cable 9a Inverting amplifier circuit 9b Integration circuit 10 Reference vector generator 14 Current-voltage conversion circuit 15 Automatic feedback voltage control circuit T 1 the voltage detection transformer T 2 voltage feedback transformer CT d current detecting current transformer T D rated switching transformer N f feedback winding N d reference voltage detection winding
Claims (3)
接続する接続回路に並列して前記CTXの二次端子間に
電圧検出トランスT1が接続されると共に前記接続回路
中に電流検出用変流器CTdと電圧帰還用トランスT2が
直列接続され、前記変流器CTdの検出電圧を基準電圧
ベクトルとする同相電圧eSと90°位相電圧ejを前記
電圧検出トランスT1の検出電圧が0となるように低利
得増幅器を介して前記帰還用トランスT2に帰還させる
ことを特徴とする変流器誤差試験装置。1. A in said connecting circuit with a voltage detection transformer T 1 between the secondary terminals of the CT X in parallel with the connection circuit for connecting the tested current transformer CT X and the error measurement circuit is connected current detecting current transformer CT d and voltage feedback transformer T 2 are connected in series, the detection voltage of the current transformer CT d as the reference voltage vector in-phase voltage e S and 90 ° phase voltages e j and the voltage detection current transformer error test and wherein the feeding back said feedback transformer T 2 via the low-gain amplifier so that the detection voltage of the transformer T 1 is zero.
接続する接続回路に並列して前記CTXの二次端子間に
電圧検出トランスT1が接続されると共に前記接続回路
中に電流検出用変流器CTdと電圧帰還用トランスT2が
直列接続され、前記電圧検出トランスT1と前記電圧帰
還用トランスT2の他の端子間に帰還電圧自動制御回路
が接続され、前記制御回路に前記変流器CTdの検出電
圧を基準電圧とする基準ベクトル発生回路が接続されて
なる変流器誤差試験装置。Wherein in said connection circuit with a voltage detection transformer T 1 between the secondary terminals of the in parallel to the connection circuit which connects the DUT current transformer CT X and error measuring circuit and the CT X is connected current detecting current transformer CT d and voltage feedback transformer T 2 are connected in series, the voltage detection transformer T 1 and the feedback voltage automatic control circuit between the other terminal of the voltage feedback transformer T 2 is connected to the the current transformer CT d of the detection voltage current transformer error tester reference vector generating circuit is connected to a reference voltage to the control circuit.
VTXと測定回路との間に介装されている定格切換用変
圧器TDに基準電圧検出用巻線Ndと帰還用巻線Nfを設
けると共に前記VTXと前記TD間の接続回路に電流検出
用変流器CTPが接続され、前記帰還用巻線に前記電流
検出用変流器による検出電流の変換電圧と前記基準電圧
検出用巻線Ndに接続された基準ベクトル発生器からの
電圧ベクトルが入力される帰還電圧自動制御回路が接続
されてなる計器用変圧器誤差試験装置。3. A transformer feedback winding with a reference voltage detecting winding N d the rated switching transformer T D which is interposed between the tested transformer VT X and the measurement circuit in the error tester the provided with a N f VT X and the T current transformer for current detection to connect the circuit between D CT P is connected, the conversion voltage of the detected current by the current detecting current transformer in the feedback winding the reference voltage detection winding N instrumentation transformer error tester feedback voltage automatic control circuit is a voltage vector is input which are connected from the connected reference vector generator to d.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9322391A JPH11142459A (en) | 1997-11-07 | 1997-11-07 | Transformer error testing device with zero load function |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9322391A JPH11142459A (en) | 1997-11-07 | 1997-11-07 | Transformer error testing device with zero load function |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH11142459A true JPH11142459A (en) | 1999-05-28 |
Family
ID=18143150
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9322391A Withdrawn JPH11142459A (en) | 1997-11-07 | 1997-11-07 | Transformer error testing device with zero load function |
Country Status (1)
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JP (1) | JPH11142459A (en) |
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