JPH11120003A - Parallel executing method for loop including loop jump-out and parallel program generating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To speed up loop execution by overlapping calculation which is performed through the repetition of a loop over processors. SOLUTION: In a program generation part 120 in a loop parallelizing part 110, an overlap calculating process generation part 122 calculates the value of data which is updated in a loop including a loop jump-out and used after the jump-out by overlapping the loop repetition by processors while saving the value each time the loop is repeated as many times as specified. Further, a loop jump-out decision time process generation part 123 performs calculation for guaranteeing the value of the data after the loop jump-out by using the value of the last saved data when loop jump-out conditions are met. After the loop jump-out conditions are met, a processor having detected the loop jump-out informs another processor that the loop jump-out conditions have been met and the processor having been informed also informs another processor of that repeatedly one after another.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compiler that inputs a high-level language program including a loop jump and generates a parallel program including inter-process communication.

[0002]

2. Description of the Related Art Conventionally, a compiler that generates a vectorized program by inputting a high-level language program including a loop jump has been proposed by Michael Wolf, Optimizing Supercompilers for Supercomputers, MTI Press 1989, No. 151. Page to page 155 (Michael Wolfe, Optimizin
g Supercompilers for Supercomputers, MIT Pres
s, 1989, pp. 151-155), first, a statement other than the loop jump determination of a loop including a loop jump is calculated for all loop iterations or a specified number of iterations. Only the loop jump judgment is calculated, then the number of loops where the jump condition is satisfied is first checked from the above judgment result, and finally, only the values calculated up to that number are set in the data, meaning the original program Is not changed.

Hereinafter, two examples of programs will be cited from the above works.

First, as a first conventional technique, an example in which calculation is performed for all loop repetitions will be described.

(Example 1) do I = 1, NA (I) = B (I) * C (I) + 4 / D (I) ef (A (I) = S (I)) goto label enddo The above program Is vectorized as follows: S1: ATEMP (1: N) = B (1: N) * C (1: N)
+ 4 / D (1: N) S2: bit (1: N) = ATEMP (1: N) = S (1: N)
N) S3: I = First 1 (bit (1: N)) S4: A (1: I) = ATEMP (1: I) S5: if (I> 0) goto label where ATEMP is a temporary array and A Temporarily store values in this array so that no extra values are stored.

S1 is an ATEMP statement for all values I from 1 to N excluding loop jump determination.
(I) = B (I) * C (I) + 4 / D (I) is calculated by vector calculation. Regarding vector calculation, Hans Zima and Barbara Chapman, Super Compilers for Parallel and Vector Computers, Addison Wesley Publishing Company, Inc. (Hans Zima and Bar)
bara Chapmann, Supercompilers for Paraallel and
Vector Computers, Addison- Wesley Publishing
Company, Inc.).

In S2, only the loop jump determination statement A (I) = S (I) is executed for all values I from 1 to N, TRUE if this is true, FALSE if not. Is substituted for bit (I).

S3 is a bit which is a loop jump determination result.
From (1) to bit (N), the value of the subscript whose bit (I) value is TRUE first, that is, the number of loops in which the loop jump condition is first satisfied is substituted into I.

At S4, the value until the loop jumps out is stored in A. As a result, the program obtains the same execution result as when no vectorization is performed.

S5 represents that the control of the program is shifted to the designated position only when the loop jump condition is satisfied.

Next, as a second conventional technique, an example will be described in which a specified number of calculations are performed on a loop in which the loop repetition is dependent and the number of loop repetitions is undefined.

(Example 2) while (X> EPS) do X = F (X) endwhile The above program is vectorized as follows: S1: while (X> EPS) do S2: XTEMP (0) = X S3: doI = 1,64 S4: XTEMP (I) = F (XTEMP (I-1)) S5: enddo S6: bit (1:64) = XTEMP (1:64)> EPS S7: J = First1 (bit (1:64)) S8: X = ATEMP (J) S9: Since the number of times of loop execution is undefined in the endwhile while loop, the vectorization program executes 64 times to check whether or not the loop jump condition has been satisfied. If not, again 64
Execute it twice. By repeating this, the case where the number of times of loop execution is indefinite is supported. This 64 is the number of vector registers, which differs depending on the machine.

The loops indicated by S3, S4, and S5 may or may not be vectorized by the machine. If not vectorized, the execution of this part is sequential, so the execution time of the entire while loop is slower than the original execution time.

Although S6 and S7 are vectorized, S6
8 is scalar-executed, and it is determined from the result whether or not to execute loop jumping in S1. That is, immediately before S8, a synchronization for ending the vector execution is inserted.

[0015]

In the first prior art, even when a loop jumps out for a small number of loop repetitions, the execution time is rather slow because the loop is executed in advance for all the loop repetitions.
There is a problem.

The second prior art has a problem that a temporary array having the same number of elements as the specified number of times is required, and the amount of used memory is increased.

Further, the second prior art has a problem that if there is a loop that is sequentially executed inside, the loop is not speeded up.

In the second prior art, since synchronization is inserted at a specified number of times, the execution time is increased by the amount of synchronization, and the parallelism between loop iterations that can be used by increasing the specified number of times is reduced. Lost by synchronization,
There is a problem that the execution time increases accordingly.

An object of the present invention is to reduce the time required for executing an extra loop after a loop jump condition is satisfied.

It is another object of the present invention to reduce an increase in the amount of memory used.

Another object of the present invention is to detect the parallelism of the outer loop and speed up the processing even if there is a loop executed sequentially inside.

Further, another object of the present invention is to prevent the processing from being performed every prescribed number of times even when the number of times of loop repetition is indefinite.

[0023]

In order to achieve the above object, for a loop including a loop jump, the loop specifies a data value whose value is updated in the loop and whose value is used after the loop jump. Overlap calculation means for calculating by overlapping the loop repetition with a plurality of processors while saving each time it is repeated, and when the loop jump condition is satisfied, the loop of the data is stored using the value of the data stored immediately before. And a loop pop-out determination means for performing a calculation for guaranteeing the value after pop-out.

Further, in order to achieve the above object, the overlap calculating means replaces the storage of all values for the data in the original loop with the storage of value storage data, and in the next loop iteration, Storage and calculation means for replacing the use of all values for the data in the original loop with the use of value storage data.

Further, in order to achieve the above object, the loop jump condition judging means comprises:
One processor performs a loop jump condition determination in the original loop, notifies the other processor of the determination result, and receives the notified determination result.

In order to achieve the above object, a parallelizing compiler for inputting a program, analyzing a syntax, analyzing a program, and generating a parallel program or a parallel object program for a parallel machine, wherein a loop jumping out. An applicability determining unit that detects a certain loop, detects data whose value is updated in the loop, and uses the value after jumping out of the loop, and performs loop repetition while storing the value of the data for each designated loop repetition count An overlap calculation processing generation unit that calculates by overlapping with a plurality of processors, and when a loop jump condition is satisfied, performs a calculation that guarantees a value of the data after the loop jump using the value of the data stored immediately before And a loop jump determination process generation unit.

In order to achieve the above object, the overlap calculation processing generation unit replaces the storage of all values for the data in the original loop with the storage of value storage data, and repeats the next loop. Includes a storage / calculation processing generation unit that replaces the use of all values for the data in the original loop with the use of value storage data.

Further, in order to achieve the above object, the loop jumping judgment processing generation unit performs a loop jumping condition judgment in an original loop by one processor among a plurality of processors, and determines a result of the judgment. A generation unit for processing that notifies other processors and receives the notified determination result;
Is included.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 shows a configuration of a parallelizing compiler according to the present invention.

Reference numeral 100 denotes a parallelizing compiler, which inputs a source program 101 and inputs a dictionary 104 and an intermediate language 10.
5, a program for inputting the syntax analysis unit 102, the dictionary 104, and the intermediate language 105, analyzing the control flow, data flow, data dependence, and the like of the program and reflecting the result in the intermediate language 105 or adding it as additional information A loop parallelizing unit 110 that inputs the analysis unit 103, the dictionary 104, and the intermediate language 105, analyzes a loop in the program, parallelizes a loop including a loop jump, and reflects the result in the dictionary 104 and the intermediate language 105. Optimizer 106 that inputs and converts intermediate program 105 and intermediate language 105 to execute the program at high speed and reflects the result in dictionary 104 and intermediate language 105, and inputs dictionary 104 and intermediate language 105 and generates parallelized program 108 Code generation unit 1 that generates
07.

In this embodiment, a parallelized program with message communication for a distributed memory machine is generated as the parallelized program 108.

The loop parallelizing section 110 detects a loop including a loop jump and determines whether or not the loop satisfies a condition for parallelizing.
1. As a result, if it is determined that the dictionary can be applied, a new variable is introduced to parallelize the loop and the dictionary 104 is introduced.
If the program generation unit 120 and the applicability determination unit 111 determine that the loop is not applicable, the loop is conventionally created for the loop. A parallelism judging unit 112 for judging whether parallelization can be applied, and as a result, when it is judged that there is parallelism, a parallelization conversion unit 113 for performing parallelization conversion on the dictionary 104 and the intermediate language 105. .

Next, the operation of the parallelizing compiler of the present invention will be described.
2 to 14 will be described based on FIG. 1 using specific examples.

FIG. 8 shows a specific example of the source program 101. 8 in the loop indicated by 801 to 813
There are ten loop jump determination statements, and when this condition is satisfied, the statement 811 transfers control to a statement 814 outside the loop. Here, eps of 810 is a constant. The variable s used in the loop jump determination at 810 is initialized at 802, and the value is updated at 807.

The parallelizing compiler 100 inputs the source program 101 and the syntax analyzer 102
5 is generated.

FIG. 9 is an example of an intermediate language. The intermediate language 900 is an intermediate language as a result of parsing the sentence 805.
01 is an intermediate language as a result of parsing the sentence 806.

Reference numeral 900 denotes an operation node “=”, “+”, “
* ", A variable node" a (i + 1, j) ", etc., and a constant node" -4 ". The left node is connected to the two nodes immediately to the right by a pointer indicated by an arrow in FIG. ing.

Similarly, the operation node 901 has the operation nodes "=", ""
+ "," * ", Variable node" a (i + 1, j) ","
It consists of a constant node "omega" such as "t", and is linked by a pointer from the node on the left to the two nodes immediately on the right.

Variable nodes are also called reference points. The program analysis unit 103 inputs the intermediate language, adds the analysis information to the intermediate language, and outputs the result. 902 to 906 in FIG.
Indicates the direction of dependence between reference points that are part of the information. The following information is further added between the reference points in the direction of the arrow in the drawing: 902: There is a flow dependency that spans the k loop 903: There is a flow dependency that spans the i loop 904: A flow dependency that spans the k loop 905: There is a flow dependency across the j loop 906: There is a loop independent inverse dependency Description of these terms is provided by Hans Zima and Barbara Chapman, Supercompilers for Parallel and Vector Computers, Addison Wesley Publishing Company, Inc. (Han
s Zima and Barbara Chapmann, Supercompilers for
Parallel and Vector Computers, Addison- Wesle
y Publishing Company, Inc.).

The intermediate language includes information expressing the control flow of the program, in addition to the information on the sentence or the reference point.
FIG. 10 shows a basic block and a control flow for the input program of FIG.

A basic block is a set of sentences. Control does not transfer from another basic block except immediately before the first sentence, and control does not transfer to another basic block except immediately after the last sentence. It is like. 1000 to 10
All 10 are basic blocks. Solid arrows indicate control flows between basic blocks. 1007, 1
Labels iend, jend, and kend on the left shoulder of 008 and 1010 are labels for specifying the branch destinations. For example, “goto jend” in the sentence 1003 indicates that control is transferred to the basic block indicated by the label “jend” if the conditional sentence 1003 is satisfied. A dotted arrow is a pointer that connects basic blocks in a loop. However, when there is an inclusion relationship between two loops, only a basic block included in the loop but not included in the other loop is connected to the loop including one.

The basic blocks in the k loop represented by statements 801 to 813 are 1001, 1002, 1008,
They are connected by dotted arrows between 1009. Sentence 803 to sentence 8
The basic block in the j loop denoted by 09 is 100
3, 1004 and 1007 are connected by a dotted arrow. The basic blocks in the j loop indicated by the statements 804 to 808 are connected by a dotted arrow between 1005 and 1006.

The control flow between the basic blocks described above is a result of analysis performed by the syntax analysis unit 102 or the program analysis unit 103. Further, the connection between the loop and the basic block in the loop is a result analyzed by the program analysis unit 103.

The program analysis unit 103 recognizes a loop from the program in relation to the analysis of the intermediate language and creates a loop table.

FIG. 11 is an example of a loop table.
Reference numerals 1100, 1110, and 1120 denote loop tables for loop k, loop j, and loop i, respectively.

Reference numeral 1101 denotes a loop control variable, 1102 denotes the first basic block in the loop, 1103 denotes the last basic block, and 1104 denotes a pointer to a loop table for the loop when a loop is included inside. Loop k
Is a loop table for k, 1001, 1008, and loop j, respectively. 1001, 100
Reference numeral 8 denotes a basic block in FIG. 10, which is the first and last basic blocks connected by dotted arrows.

Similarly, in 1110, 1111 is the loop control variable j, and 1112 is the first basic block 100.
3, 1113 is the last basic block 1007, 1114
Indicates a pointer to the loop table for the inner loop i.

Similarly, at 1120, 112
1 is the loop control variable i, 1122 is the first basic block 1005, 1123 is the last basic block 1006, 1
The value 124 is 0 because there is no inner loop anymore.

Next, the applicability judging unit 111 which is the first process of the loop parallelizing unit 110 will be described with reference to FIG. The first process 200 may include a loop inside 11 in FIG.
Since it can be seen from the fact that 04 points to the loop table 1110, it is YES.

The next step 201 is whether or not there is a loop jump. This is from the loop table 1100 for loop k to the loop table 112 for loop i in FIG.
0 is examined in order.

First, the first basic block 1102 of the loop table 1100 is 1001. From FIG. 10, the control is transferred from this basic block to the basic block 1010.
And the basic block 1002. Basic block 1001
Is a special basic block that controls a loop called a loop header, and the transition of control to the basic block 1010 is a special one that is executed when the number of loop iterations reaches a given number. Absent. The basic block 1002 is a basic block in the loop k because it is connected to the basic block 1001 by a dotted arrow.

Next, the basic block 1002 in the loop k connected by the dotted arrow from the basic block 1001 is examined. Control is transferred from the basic block 1002 to the basic block 1003. This is 111 in FIG.
Since the basic block 2 is a basic block, it is a basic block in the inner loop of the loop k. Therefore, it is not a loop jump.

Next, the basic block 1008 in the loop k connected by the dotted arrow from the basic block 1002 will be examined. Control is transferred from the basic block 1008 to the basic block 1009 and the basic block 1010. The basic block 1009 is a basic block in the loop k because it is connected to the basic block 1008 by a dotted arrow. The basic block 1010 is a basic block outside the loop because it is not included in the range of the basic block pointed from each loop table in FIG. Therefore, the loop k has a loop jump, and 201 in FIG.
Is YES.

It can be seen that 202 is s from the basic block 1008.

In the loop 203, s appears in the loop except for the basic block 1008, where “s = 0.0” in the basic block 1002 and “s = s” in the basic block 1006.
+ Abs (t) "alone, and s is not used for the update calculation of the other variables.

Reference numeral 204 denotes a loop k described with reference to FIG.
902 and 90 as loop iteration flow dependencies for
YES because there are four.

Therefore, 205 is "a (i, j)"
And "a (i + 1, j)" and "a (i, j)" and "
a (i, j + 1) ".

In the reference numeral 206, the difference between the subscripts including the loop control variable i of the loop i is 1 for the first set, and the difference between the subscripts including the loop control variable j of the loop j is 1 for the second set.
It turns out that it is. If the prescribed value is set to 1, both of these conditions are satisfied, so that the result is YES.

The loop exit at 207 is a loop pop-out basic block 1008 and a loop header 1001. LIVE at the end of a basic block with a variable means that the value of the variable is updated in or before the basic block, and the value may be used after the basic block. The variable used after the loop exit is the array a in the basic block 1010. Therefore, a is LIVE. A is the basic block 1
“A (i, j) = a (i, j) + omega * t” in 006
Will update the value. Therefore, the array a is registered as a close-guaranteed array. If a loop j is taken as an inner loop at 208, YES is present at each of the reference points in the loop j of the array a because j appears only in the second dimension, which is only one dimension.

In the case of 200, since j appears in the second dimension which is the same dimension with respect to the reference point in the array a, the result is YES.

As described above, application becomes possible at 210.

As described above, the application can be applied by the applicability determining unit 111, and the process proceeds to the overall control processing generating unit 121 which is the first processing of the program generating unit 120.

Next, the overall control processing generator 121 will be described with reference to FIGS. 2 to 5 and FIG.

FIG. 3 is a diagram for explaining the algorithm of the overall control processing generation unit 121.

FIG. 12 describes the intermediate language generated by the program generator 120 in a source program style.

At 300, the variables exit, ret, rest, kk, p,
Create a dictionary for ss. Those excluding ss are integer attributes, and ss is an array of the same attribute as the variable s used in the jump condition determination, and has a size of 2 * interval. Where inte
rval is a compile option or a constant determined by the compiler, and indicates an interval at which the value of the close-guaranteed array is stored in one storage variable.

In 301, a dictionary of storage arrays a1 and a2 having the same variable attributes as the final price guarantee array a (the same array name a in the input program of FIG. 8) is created.

At 302, "exit = 0" and "ret = 0" are generated immediately before the loop, and "kk = mod (k, 2 * interval)" is generated immediately after the loop entry. As a result, in FIG.
201, 1202, and 1204 are generated.

In step 303, s (k) is replaced with ss (kk).
As a result, the contents of the conditional statement 1205 and the conditional statement 1241 are obtained.

At step 304, the processor 0 removes the statements outside the loop from the statements inside the loop and outside the inner loop.
Create conditional statements that only execute. Since only the condition 802 in FIG. 2 satisfies the condition, 1205 is obtained.

A conditional statement composed of 1240 and 1248 is created by 305.

Next, a loop jump determination processing generation unit 306
Move on to This will be described with reference to FIG.

First, in 400, the closing price guarantee array is a, its storage sequences are a1 and a2, and the loop jump is "go".
Since it is to10 ", 1233 is obtained from 1230.

Next, in the same manner as in 401,
2 is obtained from 1246.

Next, the process proceeds to the storage / calculation processing generation unit 307.

FIG. 5 is a diagram for explaining the algorithm of the storage / calculation processing generation unit 307.

First, at 500, a function dictionary F is created.

Next, in 501, since the closing price guarantee array is only a, the ss (kk), s, p, e
Create an eight argument list consisting of xit, rest, ret.

Next, at 502, since the final price guarantee array is only a, the first two arguments are a, a1; a1, a; a, a; a, a2; a2, a; a, a. After all,
1210 to 1222 are obtained.

Thus, all the sentences of the generation program of FIG. 12 have been obtained.

Next, the overlap calculation processing generation unit 122 will be described with reference to FIGS. 6, 8 and 13. FIG.

FIG. 6 shows an overlap calculation processing generation unit 122.
FIG. 3 is a diagram illustrating an algorithm of FIG.

FIG. 13 shows the overlap calculation processing generation unit 12.
2 describes the generated intermediate language in a source program style.

The input of the overlap calculation processing generation unit 122 is the sentences 803 to 809 in FIG.

First, in 600, 803 to 809
Is the function dictionary F generated by the storage / calculation processing generation unit 307.
And a subroutine having an argument list created by the generation unit. The first argument is a and the second argument is b. Thus, 1300 was obtained.

Next, in 601, since the appearance dimension of the inner loop control variable j of the close price guarantee array a is the second dimension, the second dimension of a is divided into blocks. Block division is a type of data division, and is a method of dividing data such that a continuous part of an array subscript is assigned to one processor. Specifications for such data partitioning methods and data partitioning instructions are provided in High Performance Fortran Forum, High Performance Fortran Language Specification Version 1.0, Center for Research on Parallel Computation, Rice University, Houston, Texas,
Published in 993 (High Performance Fortran Forum,
High Performance Fortran Language Speccificati
on ver. 1.0, Center for Research on Paraallel
Computation, Rice Univ., Houston, Tx, 199
3. ).

In 602, since the reference to the definition of the close price guarantee array a, that is, the reference point for updating the value of a is the left side of 806 in FIG. 8, this is replaced with the second argument b to obtain 1343.

According to 603, 1344 is obtained.

According to 604, the loop j is distributed with the number of processors as np. At this time, the loop repetition range is n
Since it is divided by p, the number of loops is N / np, and 134
Get 0. In this embodiment, since a parallelized program with message communication is generated, 1301, 1305 to 1307, 1308 to 1309, and 1313 to 131.
4, 1330 to 1331, 1333 to 1334, 1
350, 1352 to 1354 are obtained. For a method of generating these message communications, see Hilane Dani, Kennedy, Tseng, Evaluating of Compiler Optimizations for Fortlandy, Journal of Parallel and Distributed Computing, No. 21, No. 2,
Pages 7 to 45, published in 1994 (Hiranandani,
Kennedy, Tseng, Evaluating of Compiler Optimi
zations for Fortran D, Journal of Paraallel and
Distributed Computing, 21, pp. 27-45, 19
94. ).

At 605, 1330 to 1331,
1333 to 1334, 1350, 1352 to 135
4 is a communication from the smaller processor number to the larger processor number.
332, 1351 are obtained. Actually, these correspond to the extraction of data from the buffer array buf2 and the assignment to the same, respectively, for fusing and communicating.

Next, in 606, 1301, 130
5 to 1307, 1308 to 1309, and 1313 to 1314 are communications from the larger processor number to the smaller processor number.
02 to 1304 and 1310 to 1312 are obtained. Similarly, a buffer array bu for fusing and communicating
This corresponds to the assignment to f1 and the retrieval of data from the received buffer, respectively.

According to 607, 1320 to 1323 are obtained.

Thus, all the sentences in FIG. 13 are obtained.

Next, the process generation unit 12 for loop jump determination
3 will be described with reference to FIGS.

FIG. 7 shows a process generation unit 1 for determining a loop jump.
It is a figure explaining 23 algorithms.

FIG. 14 shows the intermediate language generated by the loop generation processing unit 123 in a source program style.

First, at 700, the closing price guarantee array is a
, A, a1, a2, s, rest,
exit, p. Therefore, 1400 is obtained.

Next, in 701, since the communication from the larger processor number to the smaller processor number is from 1301 to 1312 in the overlap calculation processing generation unit 122, the part a in it is replaced when rest is smaller than the interval. a1
Otherwise, 1401 to 1411 are obtained by substituting a2 with a2.

In 702, when “rest <interval”, the overlap calculation processing generation unit 122 performs communication other than communication of ss from the smaller processor number to the larger processor number 13
30 to 1331, 1333 to 1334, 1350,
Since 1352 to 1354 are used, buffers 1426 and 1428 are obtained by not using a buffer for merging communications and replacing reception to a with a1. The inner loop calculation excluding the ss value update calculation is 1427
Call of subroutine FF and 1450 to 1
This is realized by a subroutine FF indicated by 456. First
By setting the argument to a1, all the uses of the close price guarantee array a
Replace with 1.

Similarly, when "other than the above", a buffer for merging the same communication is not used, and the reception to a is replaced with a2 to obtain 1430 to 1432. By setting the first argument to a2, all the uses of the close price guarantee array a are replaced with a2.

After all, as a result of 702, 1420 to 143
Get up to 4.

According to 703, the communication except for the communication of ss from the smaller processor number to the larger processor number is 1443, 14
Given at 45. In addition, communication except for s, exit, and rest from the larger processor number to the smaller processor number is 1441.
1442. The inner loop calculation is provided by a 1444 subroutine call. This is (rest-1)
Since it is repeated twice, 1440 and 1446 are obtained.

As shown in FIG. 14, the number of loop repetitions rest from the number of times data is stored in the straight line a1 to the number of times the loop pops out from the loop popping-out notification source processor, and
Notification 140 of data 1406 to 1408 used by the notification destination processor based on the value of immediately preceding stored data a1 or a2
1 to 1411, substitution of a value from saved data in the notification destination processor or calculation for one loop using the value 14
From 20 to 1434, the remaining (rest-1) loop calculations 1440 and 1446 were obtained.

As described above, FIG. 12, FIG. 13, and FIG. 14, which are intermediate words of the parallelization result of the loop parallelization unit 110, are obtained.

The optimizing unit 106 receives the result and converts the intermediate language into an optimal intermediate language.

The code generator inputs the optimal intermediate language and outputs it as a parallelized program 108 in the form of a source program or an object program.

FIG. 15 shows the state of execution of the program of FIG. 8 according to the prior art.

(A) is a diagram showing a state of data division of a two-dimensional array a. Fourth data in the second dimension subscript j direction
The division is performed, and the processors p0, p1, p2, and p3 respectively calculate. (B) shows the state of execution of the program distributed according to the data division. The horizontal axis represents the processors p0, p1, p2, and p3, and the vertical axis represents time.
t0 is the first position of loop k for a given iteration,
t1 corresponds to the last position of the loop k. The rectangular part represents the calculation time of the inner loop, and the number in the rectangle represents the number of loop iterations. This shows that the calculation of the inner loop of the loop k is serialized. Since communication occurs in addition to the calculation, it takes longer than the execution by one processor.

FIG. 16 shows how the program of FIG. 8 is executed according to the present invention. The horizontal axis is the processor p
0, p1, p2, and p3, and the vertical axis represents time. The rectangular portion represents the calculation time of the inner loop, and the number in the rectangle represents the number of repetitions of the loop k since the start of storing data in the storage array a1. Interval in FIG. 12 etc.
Is 10. Therefore, 2 * interval is 20, and data values are stored in a1 or a2 at intervals of 10 repetitions. t0 represents the time when a new repetition of 2 * interval starts, and in the first repetition of loop k starting from here (the calculation in which the number in the rectangle in the figure is 1), the value of the data is stored in a1 While doing the calculation at the same time.

In the second iteration of loop k (the calculation in which the number in the rectangle in the figure is 2), the calculation is performed using the value of the data stored in a1. In FIG. 16, time t
2 indicates that the loop jump condition is satisfied by the processor p3, and that the processors p0 and p1 have already calculated the third loop iteration.

Immediately after t2, the processor p3 becomes the processor p.
2 is communicated to notify a loop jump. At this time, the processor p3 stores the processor p in the stored data.
2 also communicates the parts necessary for the calculation at the same time. And
It waits for data necessary for the second iteration to be communicated from the processor p2.

In the processor p2, the loop jumping out of the processor p3 is known, and the processor p1 is included in the stored data.
Performs communication for notifying the pop-out to the processor p1 at the same time as the part necessary for the calculation. Then, it waits for data necessary for the second repetition to be transmitted from the processor p1. At this time, the processor p0 has calculated the fourth iteration.

Similarly, the processor p1 also operates as the processor p2.
, The processor p0 communicates with the processor p0 notifying the jump at the same time as the part necessary for the calculation in the stored data. And the second
It waits for data necessary for the second repetition to be transmitted from the processor p0.

The processor p0 receives the notice of the loop jump from the processor p1, and at the same time, performs the second calculation of the loop repetition from the data sent from the processor p1 and the stored data.
Is sent to the processor p1. Less than,
Similarly, p1, p2, and p3 continue to calculate.

[0116] t3 represents the time when the loop jump is notified to p0, and t4 represents the time when all the executions have been completed.

In the present invention, the calculation over the repetition of the loop k is overlapped over the processors as compared with the prior art, and the execution of the loop is accelerated accordingly.

In this embodiment, a description has been given of a parallelized program with message communication for a distributed memory machine. However, a parallel program including inter-process communication using a shared memory for a shared memory machine is also described. The present invention is applicable.

FIG. 17 shows an example of the configuration of a parallel computer system targeted by the compiler of the present invention.
1 is a local memory, 2 is a processor element, 3 is a network, 4 is an input / output processor element, 5
Represents an input / output console or workstation.

The compiler of the present invention is executed on the input / output console or the workstation 5, and is converted into a parallel source program or a parallel object program including communication. The former parallel source program is further converted into a parallel object program by a compiler for the processor element 2. The parallel object program is converted into a load module by a linker, loaded into the local memory 1 of each processor element 2 through the input / output processor element 4, and executed by each processor element 2. Communication between the load modules at the time of execution is performed through the network 3.

The compiler of the present invention speeds up a program by effectively utilizing the parallel computer system.

[0122]

According to the present invention, after the loop jump condition is satisfied, the processor that has detected the loop jump notifies another processor that the loop jump condition has been satisfied, and the notified processor is another processor. And continues this one after another, so that the time required for extra loop execution after the loop jump condition is satisfied is reduced.

Further, according to the present invention, since the used memory only needs to be increased by two buffers, the increase in the used memory amount is small.

Further, according to the present invention, even if there is a loop that is executed sequentially inside, the execution of the loop is accelerated because the inner loop processing overlaps over the outer loop repetition.

Further, according to the present invention, even when the number of loop repetitions is indefinite, the processing is not serialized, such as synchronization every prescribed number of times, so that the loop execution time is reduced by
Speed up.

[Brief description of the drawings]

FIG. 1 shows a configuration of a parallelizing compiler according to the present invention.

FIG. 2 is a diagram illustrating an applicability determining unit.

FIG. 3 is a diagram illustrating an overall control processing generation unit.

FIG. 4 is a diagram illustrating a loop pop-out determination processing generation unit.

FIG. 5 is a diagram illustrating a storage and calculation processing generation unit.

FIG. 6 is a diagram illustrating an overlap calculation processing generation unit.

FIG. 7 is a diagram illustrating a loop jumping out determination process generation unit.

FIG. 8 is a diagram showing an example of an input program.

FIG. 9 is a diagram showing a tree representation of a part of an input program by an intermediate language.

FIG. 10 is a diagram showing a control flow between basic blocks for an input program.

FIG. 11 is a diagram showing a part of a loop table for an input program.

FIG. 12 is a diagram illustrating, in a source program style, an intermediate language generated by the overall control processing generation unit in the generation program.

FIG. 13 is a diagram in which an intermediate language generated by an overlap calculation processing generation unit in a generation program is described in a source program style.

FIG. 14 is a diagram illustrating, in a source program style, an intermediate language generated by a loop jump determination processing generation unit in a generation program.

FIG. 15 is a view for explaining a state of execution of a generation program according to a conventional technique.

FIG. 16 is a view for explaining a state of execution of a generation program according to the present invention.

FIG. 17 shows an example of the configuration of a parallel computer system targeted by the compiler of the present invention.

[Explanation of symbols]

Reference numeral 100: parallelizing compiler, 101: source program, 102: syntax analysis unit, 103: program analysis unit, 104: dictionary, 105: intermediate language, 10
6: Optimizer 107: Code generator 108: Parallelized program 110: Loop parallelizer 111: Applicability determiner 112: Parallelism determiner 113: Parallelization converter 120: Program generation Unit, 121: overall control processing generation unit, 122: overlap calculation processing generation unit,
123: Loop jump determination time processing generation unit.

Claims (6)

[Claims] In a loop including a loop jump, a value of data whose value is updated within the loop and whose value is used after the loop jump is stored every time the loop is repeated a specified number of times, and the loop is repeated. Overlap calculation means for calculating by overlapping with a plurality of processors, and when a loop jump condition is satisfied, a loop jump for performing a calculation for guaranteeing the value of the data after the loop jump using the value of the data stored immediately before Determination means;
A parallel execution method for a loop including a loop jump. 2. The overlap calculating means according to claim 1,
Replace the storage of all values for the above data in the original loop with the storage of value storage data, and use the values for the above data in the original loop in the next loop iteration. A parallel execution method for a loop including a loop jump-out. 3. The loop jump condition determining means according to claim 1, wherein one of the plurality of processors determines a loop jump condition in an original loop, and notifies a result of the determination to another processor; A means for receiving the notified determination result. A parallel execution method for a loop including a loop jump. 4. A parallelizing compiler for inputting a program, parsing the program, analyzing the program, and generating a parallel program or a parallel object program for a parallel machine. The applicability judgment unit that detects data whose value is updated and the value is used after jumping out of the loop, and calculates the data value by overlapping the loop repetition with multiple processors while saving the data value for each specified number of loop repetitions An overlap calculation processing generation unit that performs a calculation that guarantees a value of the data after the loop jump using the value of the data stored immediately before when the loop jump condition is satisfied; And a method for generating a parallel program for a loop including a loop jump out. 5. The overlap calculation processing generation unit according to claim 4, wherein the storage of all the values for the data in the original loop is replaced by the storage in the value storage data, and in the next loop iteration, the original loop A method for generating a parallel program for a loop including a loop jump, comprising: a storage and calculation processing generation unit that replaces use of all values for the data in the loop with use of data for storing values. 6. A loop jump determination processing generation unit according to claim 4, wherein one of the plurality of processors determines a loop jump condition in an original loop, and notifies a result of the determination to another processor. And generating a process for receiving the notified determination result. A method for generating a parallel program for a loop including loop jumping out.