JPH11111922A - Resistor circuit and semiconductor device including the circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a desired resistance value by forming contact holes at any two points in a quadrilateral basic resistor cell formed on the surface of a substrate or on an insulating film on the substrate. SOLUTION: A basic resistor cell is a quadrilateral resistor element formed on the surface of a substrate or on an insulating film on the substrate. A resistance value of the resistor element is determined by two paths formed by forming contact holes at any two points on the sides of the resistor element. A resistor circuit 20 is constituted of one basic resistor cell in the shape of a square having four sides that are all of the same length. In the resistor circuit 20, electrode contacts are formed at two apexes 21, 23 of the basic resistor cell. A resistance value of the resistor circuit 20 is equal to that of a parallel combination of resistors of 2R[Ω] each, and a resistance value between the electrode contacts is (2R*2R)/(2R+2R)[Ω], which is the same as that of the resistor circuit. Therefore, by adjusting the positions of the electrode contacts, a desired resistance value can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a resistance circuit used in a semiconductor device.

[0002]

2. Description of the Related Art In a semiconductor device on which an integrated circuit, especially an analog integrated circuit is mounted, there is a strong demand for not only improvement in reliability but also reduction in manufacturing cost, particularly, manufacturing cost by shortening a development period. For this reason, various technical developments have been made for each element constituting the circuit.

[0003] Among the elements constituting this integrated circuit, the formation of a resistor is conventionally performed by selectively implanting ions into a polysilicon layer formed on the surface of a silicon substrate or an insulating film based on design values at the time of circuit design. Activation has been performed to form a resistance pattern. As a shape for realizing the designed resistance value, when the resistance value is low, as shown in FIG. 18, the electrode contacts are connected by a straight line. On the other hand, when the resistance value is high, the straight line is insufficient. As shown in FIG. 19, the path length is extended by a plurality of bent paths on the way.

[0004]

However, the resistor circuit formed in such a shape has the following problems.

That is, the material of the resistor is a diffusion layer on the surface of the semiconductor substrate or a deposited film on the insulating film on the semiconductor substrate.
The concentration distribution of impurity ions cannot always be controlled uniformly. For this reason, the characteristics of the diffusion layer and the deposited layer vary not only between lots and between semiconductor chips, but also within the semiconductor chips. The same applies to the ion activation temperature, processing dimensions, and the like.

[0006] Therefore, in the conventional method, variations in processing dimensions between lots, between wafers, and within a wafer surface become large, so that the absolute accuracy, that is, the accuracy of the product value with respect to the design value, cannot be sufficiently obtained. Further, the relative accuracy, that is, the accuracy between resistors of the same specification in the integrated circuit is insufficient, which has been a factor that hinders an improvement in manufacturing yield.

In order to solve this problem, there is a method of reducing the line width of the resistor and reducing the area of the resistor to prevent the material from becoming non-uniform. However, also in this case, it is likely to be affected by non-uniformity of the material depending on the direction of the layout shape. For example, in FIG. 19, the horizontal direction, that is, the horizontal direction is significantly longer than the vertical direction, that is, the vertical direction, of all the paths, so that the characteristics in the horizontal direction are strongly affected. For the above reasons, the resistance of the semiconductor device tends to be individually designed, which requires a development period, which hinders cost reduction.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a resistor circuit having a desired resistance value and a method for forming a semiconductor device including the resistor circuit with high accuracy and at low cost. is there.

[0009]

According to the present invention, the concept of a basic resistance cell is introduced, and a dummy pattern based on the concept is formed and used in advance to provide the following means to solve the above-mentioned problems. is there. That is, according to the present invention (claim 1), it is constituted by a quadrangular basic resistance cell provided on the surface of the substrate or on the insulating film on the substrate, and contact holes are formed at any two points of the basic resistance cell. Is provided, a resistance circuit whose resistance value is determined by two paths formed is provided.

According to the present invention (claim 2), there is provided a resistance circuit formed including the basic resistance cell, wherein one of the contact holes is provided at an arbitrary point of the basic resistance cell. .

It is preferable that each path of the basic resistance cell has a right angle portion and is symmetric with respect to a diagonal having two opposing points as vertices.

It is preferable that each path of the basic resistance cell is point-symmetric with respect to an intersection of two diagonal lines having the two points as vertices.

It is further preferable that the path length of the resistance circuit is the same in each of the vertical and horizontal components.

According to the present invention (Claim 6), the basic resistance cells according to any one of Claims 1 to 5 are connected at the vertices and are formed on the surface of the substrate or on the insulating film on the substrate in advance. A resistance circuit that includes a formed lattice shape and obtains a desired resistance value by appropriately making an electrode contact on a path is provided.

[0015] One end of the electrode contact may be taken at two points near the vertex of the basic resistance cell included in the resistance circuit.

The resistance circuit is preferably formed on a diffusion layer formed on a semiconductor surface or on a deposited film formed on an insulating film on a semiconductor substrate.

It is preferable that a metal silicide is formed on the surface of the deposited film.

Further, according to the present invention (claim 12),
A semiconductor device including the resistance circuit according to claim 1 is provided.

Since the resistor circuit according to the present invention includes a symmetrical basic resistor cell, it is possible to form a resistor circuit that is less affected by directivity in each manufacturing process of a semiconductor device. Further, since the present invention employs the dummy pattern, the coverage of the photoresist is improved, and the characteristics of the diffusion layer and the deposited layer, which are the materials of the resistor, are made uniform. Therefore, a resistance value with high absolute accuracy and relative accuracy can be obtained.

Further, according to the present invention, an electrode contact is made on a dummy pattern formed in advance, and a path of a resistance circuit is determined by the position of the electrode contact, so that a desired resistance value can be obtained. Furthermore, since the resistance value can be freely changed by changing the position of the electrode contact, if it becomes necessary to change the resistance value according to the test result of the sample, after the impurity introduction step and the processing step are completed. Even in this case, the resistance value can be changed only by changing the mask of the electrode contact portion, so that the development period can be significantly reduced and the manufacturing cost can be reduced.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Some embodiments of the present invention will be described below in detail with reference to the drawings.

A feature of the present invention is that, in forming a resistor circuit used in a semiconductor device, the concept of a basic resistor cell and a dummy pattern is introduced to obtain a desired resistance value. Hereinafter, the concept of the basic resistance cell and the dummy pattern will be described, and further, as an embodiment of the present invention, a method of obtaining a desired resistance value using these will be described.

First, the basic resistance cell refers to a resistance element formed in the shape of a quadrilateral provided on the substrate surface or on the substrate, and is formed by providing contact holes at arbitrary two points on the side. This means that the resistance value is determined by two paths. The quadrilateral may be rectangular or square.
FIG. 10 shows a basic resistance cell formed in a square.

The dummy pattern is a lattice-like pattern in which a plurality of basic resistance cells are connected at the vertices of each cell, and is formed in advance on the substrate surface or on the substrate. Depending on how to make contact,
It means that a desired resistance value is obtained. FIG. 1 shows a dummy pattern formed of only two basic resistance cells as the simplest embodiment of the dummy pattern.

Both the basic resistance cell and the dummy pattern are formed on the diffusion layer on the substrate surface, and on the insulating film on the substrate on the substrate. It may be on a deposition layer. Further, the deposited layer can be formed of a polysilicon layer doped with impurities or a metal silicide.

Next, a method of obtaining a desired resistance value by using the above-described basic resistance cell will be described while describing some of the embodiments of the present invention. Note that the resistance circuits described below are all formed of the same material on the semiconductor substrate, and have a resistance value of R [Ω] per path length L.

FIG. 10 shows a resistor circuit 20 according to a first embodiment of the resistor circuit according to the present invention. As described above, the resistance circuit 20 is formed of one basic resistance cell having a square having a length L on one side.

The electrode contacts of the resistance circuit 20 shown in FIG. 10 are taken at the two opposing vertices 21 and 23 of the basic resistance cell. Therefore, the resistance value is 2R for length 2L.
Since [Omega] resistance equivalent to that connected in parallel, the resistance value R _{21-2 3} between electrodes _{contacts, R 21-23 = (2R * 2R} ) / (2R + 2R) = R [Ω] , and the FIG. 9 has the same resistance value as the resistance circuit 10 having the length L and the resistance R.

That is, to obtain a resistance value of R [Ω],
It suffices to use one basic resistance cell.

Next, a second embodiment of the resistor circuit according to the present invention is shown in FIG.

The resistance circuit 30 shown in FIG. 11 is formed by connecting two basic resistance cells each having a square of a length L at a vertex 33 and connecting the resistance circuit 20 shown in FIG. 10 in an oblique direction. Has the same shape as.

As shown in FIG. 11, the electrode contacts of the resistor circuit 30 are connected to both ends 31, 3 in the oblique direction of the resistor circuit.
I have five. Therefore, since the resistance circuit 30 is equivalent to the resistance circuit 20 shown in FIG. 10 connected in series, the resistance value R _31-35 between the electrode contacts is R _31-35 = R + R = 2R [Ω]. Become.

From this result, when it is desired to obtain a resistance value of 2R [Ω], it is sufficient to use a circuit in which two basic resistance cells are connected in series.

Next, a third embodiment of the resistor circuit according to the present invention is shown in FIG.

The resistance circuit 40 shown in FIG. 12 is a circuit in which basic resistance cells each having a square shape with a length L on one side are connected at vertices 43 and 45, and three resistance circuits 20 are connected diagonally. Has the same shape as.

As shown in FIG. 12, when the electrode contacts are provided at both ends 41 and 47 in the oblique direction of the resistor circuit, the resistor circuit 40 is equivalent to the three resistor circuits 20 shown in FIG. 10 connected in series. is there. Therefore, its resistance R _41-47 is
R _41-47 = R + R + R = 3R [Ω], as in the case of FIG.

That is, when it is desired to obtain a resistance value of 3R [Ω], it is understood that a device in which three basic resistance cells are connected in series may be used.

The resistance circuits according to the first to third embodiments shown in FIGS. 10 to 12 use square basic resistance cells, so that the circuit path lengths are the same in the horizontal and vertical directions. It is.

Therefore, when the characteristics of the resistance circuit such as the nitride film and the deposited film have a variation in the characteristics such as the ion concentration depending on the direction, the effects can be mutually canceled by the so-called loading effect. This improves the absolute and relative accuracy of the resistance value,
The reliability of the semiconductor device can be improved, and the production yield can be further improved.

Next, FIG. 13 shows a fourth embodiment of the resistor circuit according to the present invention.

The resistance circuit 60 shown in FIG. 13 is obtained by connecting the resistance circuit shown in FIG. 9 to the end portion 35 of the resistance circuit 30 shown in FIG. 11 in the vertical direction. Electrode contact at end point 6
Taking the values 1 and 66, the resistance value R _61-66 becomes R _61-66 = 2R + R = 3R [Ω], and the same resistance value as the resistance circuit 40 shown in FIG. 12 can be obtained.

FIGS. 14 and 15 show modifications of the resistor circuit according to the fourth embodiment of the present invention. FIG.
Each of the resistance circuits 70 and 90 shown in FIG. 15 has a resistance circuit composed of a basic resistance cell and a resistance L and a resistance R shown in FIG.
[Ω] resistance circuit.

The resistor circuit 70 shown in FIG. 14 is obtained by further connecting the resistor circuit shown in FIG. 9 in the lateral direction to the end point 66 of the resistor circuit shown in FIG. The resistance value R _71-76 when the electrode contacts are made at the end points 71 and 76 is as follows: R _71-76 = 3R + R = 4R [Ω], and a resistance value of 4R [Ω] can be obtained.

The resistance circuit 90 shown in FIG. 15 is formed by connecting a resistance circuit having a length L and a resistance R [Ω] in an end point 93 of a basic resistance cell in a vertical and horizontal order in a stepwise manner. Circuit.

The resistance value R _91-95 when the electrode contacts are taken at the end points 91 and ₉₅ is as follows: R _91-95 = R + R + R + R + R = 5R [Ω] A resistance value can be obtained.

Here, the ratio of the total length in the vertical and horizontal directions of the path of the resistance circuit 60 shown in FIG. 13 is 5: 4, and the resistance circuits 70 and 90 shown in FIG. 14 and FIG. It is 1: 1. Thus, by making the ratio of the total length in the vertical and horizontal directions substantially the same, a so-called loading effect occurs, and the characteristics such as the ion concentration in the nitride film and the deposited film of the semiconductor device, which is the material of the resistance, Variations due to directions can be mutually canceled. Therefore,
The absolute accuracy and relative accuracy of the resistance value are improved, the reliability of the semiconductor device is improved, and the production yield is improved.

Next, a fifth embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a specific example of a dummy pattern. Figure 11 shows the overall shape
The symbols A to G indicate the respective vertices. The resistance value between A and B is the maximum resistance value obtained in the present embodiment, and the value R _AB is R _AB = 2R. The resistance value between the vertices is: R _AD = R _AE = R _CB = R _FB = (1 + 3/4) R = 1.75
R [Ω] R _CD = R _FE = R _FD = R _CE = (3/4 + 3/4) R = 1.
5R [Ω], for example, to form a resistance circuit having a resistance value of 1.75 R [Ω], the vertices AD, AE, C-
Electrode contacts may be made at B and FB, and at vertices CD, FE, FD, and CE for a resistance value of 1.5 R [Ω]. Further, by using such a dummy pattern, it becomes possible to easily design a wiring. A wiring pattern having a width slightly larger than the width of one side of the dummy pattern is prepared in the vertical direction and the horizontal direction, and these are superimposed on the dummy pattern and the contact positions are adjusted, so that the wiring can be easily designed. . In the present embodiment, since the dummy pattern is a square, it is sufficient to combine two types of vertically and horizontally long wiring patterns having a size including one side.

For example, as shown in FIG.
When the lead wiring is performed so as to cover B, the vertex A,
If B is a contact, R _AB = 2R [Ω] as described above
(See FIG. 3), if F and D, R _FD = 1.5R [Ω]
(See FIG. 4) Further, if A and D, R _AD = 1.75R
[Ω] (see FIG. 5). Here, for example, if R = 1000 [Ω], R _AD = 175
0 [Ω], R _AB = 2000 [Ω], R _FD = 1500
[Ω].

Therefore, when designed with a value of 1750 [Ω], only the position of the contact hole is changed and ± 25
The resistance value of 0 [Ω] can be easily changed.

Further, by providing a contact at a portion other than the apex, the resistance value can be adjusted. FIG.
8 is a resistance circuit composed of only one basic resistance cell, and one of the electrode contacts is fixed to the vertex H. FIG. 6 shows a case where the other contact is set to I, and the resistance value is R _HI = R [Ω], as in the case of the resistance circuit 20 shown in FIG.

Here, as shown in FIG. 7, when the other contact is set to J, R _HJ = (R * 3R) / (R + 3R) = 0.75R [Ω], and the resistance value is reduced by 25%. Can be.

Further, as shown in FIG. 8, when two other contacts, K and L, which are both L / 10 away from the vertex I, are taken as R _H-KL , R _H-KL = (1. 9R * 1.9R) / (1.9R + 1.9)
R) = 0.95R [Ω], and a fine adjustment of 5% reduction from the original R [Ω] can be made.

As described above, since the shape of the basic resistance cell forming the dummy pattern is a quadrilateral, the resistance value can be easily changed by changing the path of the resistance circuit only by changing the position of the electrode contact due to its symmetry. Can be changed to Further, the change of the contact position can be realized only by changing the mask of the electrode contact portion. Therefore, as a result of inspecting the sample, if the design needs to be changed, even if the impurity introduction and processing steps have already been completed, it is possible to change the resistance value as if it were a master slice. The period can be greatly reduced, and the manufacturing cost can be reduced.

In the present embodiment, at least one of the dummy patterns is drawn out of the wiring in contact with the resistance circuit.
By adopting a structure that overlaps with the side, formation and change of the electrode contact become easy, and a desired resistance value can be obtained.

That is, by adjusting the position of the electrode contact in the path of the dummy pattern, it is possible to form a resistance circuit having a desired resistance value within the maximum value range.

Next, an embodiment of a semiconductor device according to the present invention will be described with reference to FIGS.

The circuit shown in FIG.
FIG. 2 is a part of a circuit diagram of a bipolar integrated circuit including an NPN bipolar transistor 120 and a resistor 110.

FIG. 17 is a partial sectional view of a semiconductor device specifically forming the bipolar integrated circuit shown in FIG.

The capacitor 170 and the NPN bipolar transistor 12 are arranged on the surface of the substrate 100 from the left in the partially enlarged view.
0 and a resistor 110 are formed. ZZ in FIG.
Is a cross-sectional view taken along the line ZZ in FIG. 3, and this semiconductor device uses a resistor circuit according to the present invention shown in FIG. Therefore, even for a sample that has already been processed in this way, the resistance value can be changed in a master slice manner by changing the mask of the electrode contact portion only.

Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and can be implemented with various modifications without departing from the gist thereof.

[0061]

As described above, the present invention introduces the concept of a basic resistance cell having a symmetrical shape, and replaces the structure of a conventional resistance circuit with a structure including a combination of the basic cells. To play.

That is, in the resistor circuit according to the present invention (claims 1 to 4), since a resistor circuit is formed using a symmetrical basic resistor cell, a desired position can be obtained by adjusting the position of the electrode contact. A resistance value can be obtained.

Further, in the resistor circuit according to the present invention (claim 5), the so-called loading effect due to the symmetry of the basic resistor cell can suppress the influence of the directivity in each manufacturing process of the semiconductor device.

Further, in the resistor circuit according to the present invention (claim 6), by adopting a dummy pattern including a basic resistor cell, the coverage of the resist is improved, and the material of the resistor such as a diffusion layer or a deposition layer is formed. Characteristics become uniform. Therefore, it is possible to obtain a resistance value with high absolute accuracy and relative accuracy, to improve the reliability of the element, and to improve the production yield. Further, the wiring to another semiconductor element is formed so as to cover the side of the basic resistance cell provided with the electrode contact, and the resistance value is determined by the path of the resistance circuit determined by the position of the electrode contact. Can be obtained.

Further, in the resistor circuit according to the present invention (claim 7), the resistance value can be freely changed by changing the position of the electrode contact, so that the resistance value is changed according to the test result of the sample. If necessary, the resistance value can be changed like a master slice only by changing the mask of the electrode contact, even after the impurity introduction step and the processing step. Therefore, the development period can be significantly reduced, and the manufacturing cost can be reduced.

Further, in the resistor circuit according to the present invention (claim 8), the resistor circuit having the above effect can be formed in the diffusion layer on the semiconductor surface.

Further, in the resistor circuit according to the present invention (claim 9), the resistor circuit having the above-mentioned effect can be formed on the deposited layer on the insulating film on the semiconductor substrate.

Further, in the resistor circuit according to the present invention (claim 10), since the resistor circuit having the above-described effect can be formed in the polysilicon layer doped with impurities, the resistance value can be controlled by the impurity concentration. it can.

Further, in the resistor circuit according to the present invention (claim 11), since the resistor circuit having the above-described effect can be formed on the metal silicide, a low-resistance resistor circuit can be formed.

Further, in the resistor circuit according to the present invention (claim 12), a semiconductor device provided with the resistor circuit having the above-mentioned effect is provided.

[Brief description of the drawings]

FIG. 1 is a conceptual diagram showing one specific example of a dummy pattern.

FIG. 2 is a conceptual diagram showing a specific example in a case where an electrode lead-out wiring is formed on the dummy pattern shown in FIG.

FIG. 3 is a conceptual diagram showing a first specific example when electrode contacts are provided on the dummy pattern shown in FIG. 1;

FIG. 4 is a conceptual diagram showing a second specific example when electrode contacts are provided on the dummy pattern shown in FIG. 1;

FIG. 5 is a conceptual diagram showing a third specific example in the case where electrode contacts are provided on the dummy pattern shown in FIG. 1;

FIG. 6 is a conceptual diagram showing a first specific example of wiring to a resistance circuit composed of one basic resistance cell.

FIG. 7 is a conceptual diagram showing a second specific example of wiring to a resistance circuit composed of one basic resistance cell.

FIG. 8 is a conceptual diagram showing a third specific example of wiring to a resistance circuit composed of one basic resistance cell.

FIG. 9 is a conceptual diagram showing a resistance circuit having a length L and a resistance value R [Ω].

FIG. 10 is a conceptual diagram showing a first embodiment of the resistance circuit according to the present invention.

FIG. 11 is a conceptual diagram showing a second embodiment of the resistor circuit according to the present invention.

FIG. 12 is a conceptual diagram showing a third embodiment of the resistor circuit according to the present invention.

FIG. 13 is a conceptual diagram showing a fourth embodiment of the resistor circuit according to the present invention.

FIG. 14 is a conceptual diagram showing a first modified example of the fourth embodiment of the resistor circuit according to the present invention.

FIG. 15 is a conceptual diagram showing a second modified example of the fourth embodiment of the resistor circuit according to the present invention.

FIG. 16 is a partial circuit diagram of a bipolar integrated circuit which is an embodiment of a semiconductor device according to the present invention.

FIG. 17 is a partial cross-sectional view of a semiconductor device specifically forming the bipolar integrated circuit shown in FIG.

FIG. 18 is a conceptual diagram showing a specific example of a conventional resistance circuit having a low resistance value.

FIG. 19 is a conceptual diagram showing a specific example of a conventional resistance circuit having a high resistance value.

[Explanation of symbols]

1, 2 End points of resistance circuit 10 A, B, C, D, E, F, G, H, I, J, K, L Electrode contact portions 10, 20, 30, 40, 60, 70, 90 Resistance circuit 21 -24 End point of the resistance circuit 20 31-37 End point of the resistance circuit 30 41-50 End point of the resistance circuit 40 61-68 End point of the resistance circuit 60 71-79 End point of the resistance circuit 70 91-98 End point of the resistance circuit 90 100 Semiconductor substrate Reference Signs List 110 resistance 120 NPN bipolar transistor 125 emitter 126 base 127 collector 130 insulating film 140, 150, 160, 180 Al wiring 170 capacitor

Claims (12)

[Claims] 1. A quadrangular basic resistance cell provided on a substrate surface or on an insulating film on a substrate, and formed by providing contact holes at arbitrary two points of the basic resistance cell. A resistance circuit whose resistance value is determined by two paths. 2. A resistance circuit formed including the basic resistance cell, wherein one of the contact holes is provided at an arbitrary point of the basic resistance cell. 3. The resistance according to claim 1, wherein each path of the basic resistance cell has a right-angled portion and is symmetrical with respect to a diagonal line having two vertices as vertices. circuit. 4. The resistance circuit according to claim 3, wherein each path of the basic resistance cell is point-symmetric with respect to an intersection of two diagonal lines having the two points as vertices. 5. The resistance circuit according to claim 1, wherein each path length of said resistance circuit is the same in each of a vertical direction component and a horizontal direction component. 6. A basic resistance cell according to claim 1, wherein the basic resistance cells are connected at vertices to each other and include a grid-like shape formed in advance on a substrate surface or on an insulating film on the substrate. A resistance circuit that obtains a desired resistance value by appropriately making electrode contacts thereon. 7. The resistance circuit according to claim 6, wherein one end of said electrode contact is taken at two points near a vertex of a basic resistance cell included in said resistance circuit. 8. The resistance circuit according to claim 1, wherein the resistance circuit is formed on a diffusion layer formed on a semiconductor surface portion. 9. The resistance circuit according to claim 1, wherein the resistance circuit is formed on a deposition layer formed on an insulating film on a semiconductor substrate. 10. The resistance circuit according to claim 9, wherein said deposition layer is formed of a polysilicon layer doped with an impurity. 11. The resistance circuit according to claim 10, wherein said deposition layer further comprises a high melting point metal film. 12. A semiconductor device comprising the resistance circuit according to claim 1.