JPH11103528A - Charge/discharge protection circuit and battery pack - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the scale of circuit by providing a transistor susceptible to a relatively high voltage of source level or drain level from a charger with a structure of high breakdown voltage, thereby reducing the chip area. SOLUTION: A charge protection circuit 20 has six terminals of VDD terminal, VSS terminal, CT terminal, Dout terminal, Cout terminal and V- terminal. Based on an overcharge detection signal 22a from an overcharge detection circuit 22, a level shift circuit 23 delivers a charge control signal 23a to the Cout terminal and turns a transistor Q2 off. Among the transistors constituting the level shift circuit 23, those transistors susceptible to a relatively high voltage of source level or drain level from a charger are provided with a structure of high breakdown voltage. More specifically, only the elements to be connected with the Cout terminal and the V- terminal require the structure of high breakdown strength and the structure of low breakdown voltage suffices the elements at other parts of a battery pack 10.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge / discharge protection circuit for a secondary battery, and more particularly, to an overcharge state of the secondary battery during charge control and an overdischarge of the secondary battery during discharge control for supplying load current. The present invention relates to a charge / discharge protection circuit that detects a state or an overcurrent state of a secondary battery during discharge control and protects the secondary battery from an overcharged state, an overdischarged state, or an overcurrent state.

[0002]

2. Description of the Related Art FIG. 5 is a circuit block diagram for explaining a conventional charge / discharge control circuit. Conventionally, as this kind of charge / discharge protection circuit and a battery pack using the same, for example, there is one disclosed in Japanese Patent Application Laid-Open No. 7-131938.

That is, a charge / discharge protection circuit (charge / discharge control circuit) includes a voltage dividing circuit 1, an overcharge voltage detection circuit 2, an overdischarge voltage detection circuit 3, and a control circuit 4 each connected in parallel to a secondary battery as a power supply. Was connected to. Here, the control circuit 4
Is a signal V for detecting the state of the secondary battery from the overcharge voltage detection circuit 2 and the overdischarge voltage detection circuit 3 and controlling power supply to an external device or charging by an external power supply.
output _s . Further, the control circuit 4 includes the voltage dividing circuit 1
The current flowing through the voltage dividing circuit 1 is reduced by controlling the switch element 5 provided in series with

According to the charge / discharge protection circuit having such a circuit configuration, it is possible to detect overcharge, overdischarge and overcurrent of the secondary battery and protect the secondary battery from overcharge, overdischarge and overcurrent. The effect that can be done is described. FIG. 6 shows FIG.
FIG. 5 is a cross-sectional view of a transistor used in the charge / discharge control circuit of FIG.

[0005] Such a conventional charge / discharge control circuit is shown in FIG.
This is realized by a circuit in which transistors having the same SOI structure are integrated as shown in FIG. That is, S
Transistors having an OI structure include single-crystal silicon films 5C, 5D on an insulating film 5B formed on an SOI substrate 5A.
And 5E. Specifically, an n-type source region 5C and an n-type drain region 5E are provided on both sides of the channel region 5D, a gate electrode 5G is provided on the channel region 5D via a gate insulating film 5F, and finally, a protective film 5 is provided.
It had an element structure covered with H.

[0006]

In such a conventional charge / discharge protection circuit and battery pack, the charger is connected on the assumption that the wrong charger is connected or the charger is broken. A high breakdown voltage structure is required for the transistor connected to the terminal. However, the charge / discharge protection circuits are all the same SOI as described above.
When a transistor having a structure (transistor structure) is realized by an integrated circuit, a transistor that does not require a high withstand voltage structure, for example, a transistor connected to a terminal to which a battery is connected also has a high withstand voltage structure. As a result, there is a technical problem that the chip area of the charge / discharge protection circuit increases.

The main object of the present invention is to provide a charge / discharge protection circuit and a battery pack which solve such a conventional problem. The present invention provides a device having a high withstand voltage characteristic in a limited high withstand voltage structure, and a transistor with a high withstand voltage characteristic in a limited high withstand voltage structure. An object of the present invention is to realize a charge / discharge protection circuit having a small circuit size and high withstand voltage characteristics by reducing the chip area by adopting a low withstand voltage structure.

[0008]

According to the first aspect of the present invention,
A charge / discharge protection circuit that is connected to a secondary battery and a charger and protects the secondary battery from an overcharged state, an overdischarged state, or an overcurrent state. The charge / discharge protection circuit monitors a charged state of the secondary battery and outputs an overcharge detection signal. An overcharge detection circuit that generates the signal; a level shift circuit that receives the overcharge detection signal from the overcharge detection circuit and generates a charge control signal; and an overdischarge detection circuit that monitors the discharge state of the secondary battery and generates an overdischarge detection signal. An overcurrent detection circuit for detecting an overcurrent state in the secondary battery and generating an overcurrent detection signal, a delay circuit for setting a delay time for detecting overdischarge and overcurrent, and a short circuit detection for detecting a short circuit state It has a short-circuit detection circuit for generating a signal, and a plurality of protection diodes for protecting the charge / discharge protection circuit from static electricity. There is characterized in that there is a possibility of receiving a relatively high voltage from the charger as the drain level transistors have a high voltage withstanding structure.

According to a second aspect of the present invention, in the charge / discharge protection circuit according to the first aspect, the protection diode has a high breakdown voltage structure. According to a third aspect of the present invention, in the charge / discharge protection circuit according to the first aspect, when overdischarge occurs, current supply to the load is stopped, and a terminal connected to the charger is opened. And a pull-up resistor comprising a transistor for preventing the charging protection circuit from becoming unstable, wherein the transistor has a high breakdown voltage structure.

According to a fourth aspect of the present invention, in the charge / discharge protection circuit according to the first aspect, the charge protection circuit becomes unstable when the terminal connected to the charger is short-circuited and then opened. Further has a pull-down resistor composed of a plurality of transistors in order to prevent the transistor from receiving a relatively high voltage from a charger as a source level or a drain level among the plurality of transistors. It is characterized by having.

According to a fifth aspect of the present invention, in the charge / discharge protection circuit of the first aspect, the transistor includes an element isolation film, an offset oxide film for increasing a source withstand voltage, and a drain. It has a LOCOS offset structure including an offset oxide film for increasing withstand voltage and a polysilicon gate formed so as to cover the offset oxide film.

According to a sixth aspect of the present invention, in the charge / discharge protection circuit according to the third aspect, the transistor includes an element isolation film, an offset oxide film for increasing a source withstand voltage, and a drain. It has a LOCOS offset structure including an offset oxide film for increasing withstand voltage and a polysilicon gate formed so as to cover the offset oxide film.

According to a seventh aspect of the present invention, in the charge / discharge protection circuit according to the fourth aspect, the high withstand voltage structure includes an element isolation film and an offset oxide film for increasing a source withstand voltage. A LOCOS offset structure including an offset oxide film for increasing the withstand voltage of the drain and a polysilicon gate formed to cover the offset oxide film.

According to the present invention, there is provided a battery pack, comprising two terminals to which a battery cell and a charger or a load can be connected, and an overcharged state, an overdischarged state or a battery cell connected to the battery cell. A charge / discharge protection circuit that protects from an overcurrent state, a discharge transistor that is connected in series between a load and the battery cell, and controls a discharge current supplied from the battery cell to the load, and a charger and the battery cell. Connected in series to
A charging transistor for controlling a charging current supplied from the charger to the battery cell, and a capacitor for setting a delay time upon detection of overcharge, the charge / discharge protection circuit monitors the state of charge of the battery cell. An overcharge detection circuit that generates an overcharge detection signal, a level shift circuit that receives the overcharge detection signal from the overcharge detection circuit and generates a charge control signal, and monitors a discharge state of the battery cell to generate an overdischarge detection signal An overdischarge detection circuit, an overcurrent detection circuit that detects an overcurrent state in the battery cell and generates an overcurrent detection signal, a delay circuit that sets a delay time when overdischarge and overcurrent are detected, and a short circuit state is detected. A short-circuit detection circuit for generating a short-circuit detection signal, and a plurality of protection diodes for protecting the charge / discharge protection circuit from static electricity, Of the transistors constituting the Berushifuto circuit, a relatively high voltage may be subject to transistor from the charger as the source level or drain level is characterized by having a high breakdown voltage structure.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, an embodiment of a battery pack according to the present invention will be described with reference to the drawings. FIG. 1 is a functional block diagram for explaining a configuration of a battery pack using a charge / discharge protection circuit according to the present invention.

As shown in FIG. 1, a battery pack 10 according to the present invention includes a secondary battery 12, a discharging FET switch Q1, a charging FET switch Q2, a capacitor C ₁ for setting a delay time when overcharge is detected, Discharge protection circuit 2
0. FIG. 1 shows a case where the charger 14 is connected to the battery pack 10. However, when the battery pack is operated normally, a load is provided at the position of the charger 14. The configuration of the charge / discharge protection circuit 20 will be described later in detail.

If an incorrect charger is used for such a battery pack 10, a high voltage (for example, 28V) may be constantly applied to a part of the battery pack. For this reason, the protection circuit needs to have a high withstand voltage, but not all the circuit elements need to have a high withstand voltage structure.
Circuit elements that must have a high withstand voltage structure will be clarified below.

The charge protection circuit 20 has a V _DD terminal, a V _SS terminal,
It has six terminals: a CT terminal, a D _out terminal, a C _out terminal, and a V- terminal. The voltage between the V _DD and V _SS terminals is equal to the voltage of the secondary battery. The voltage between the V _DD and V− terminals is equal to the voltage of the charger 14. If used as a charger 14 of high voltage, the potential of the correspondingly V- terminal it is lower than the potential of the V _SS terminal.

When the secondary battery 12 is a lithium ion battery, the voltage of the secondary battery is, for example, 4.25 V or 4.85.
When a voltage equal to or higher than V is detected, it is determined that the battery is overcharged.
The charge protection circuit 20 detects overcharge and detects the FET switch Q
Since 2 charging current from the charger 14 when caused to turn OFF the no flow voltage of the secondary battery 12 (V _DD -V _SS voltage) does not become a steadily high voltage (e.g., 28V). Therefore V
_No high voltage is applied to the _SS terminal and the circuit elements connected thereto. The same can be said for the CT terminal. Even when overcharge occurs, the FET switch Q1 is disconnected from the potential at the V- terminal by the FET switch Q2. Therefore, no high voltage is applied to the D _out terminal and the circuit elements connected thereto.

For example, a 28 V charger 14 is connected to the FE
When the T switch Q2 is in the OFF state, considering the potential at the _VDD terminal connected to the secondary battery 12 as a reference,
Only the voltage of the secondary battery 12 is applied to the V _SS terminal, the CT terminal and the D _out terminal, but the voltage of the charger is applied to the C _out terminal and the V− terminal. More specifically, it is necessary to turn off the FET switch Q2 to avoid overcharging, but the FET switch Q2 is an n-channel MOSFET.
Therefore, to turn it off, the gate level (C
_It is necessary to set the voltage at the _out terminal (0) to 0 relative to the source level (voltage at the V- terminal). The C _out terminal is connected to the output of a CMOS (for example, Q9 and Q10 shown in FIG. 4). In order to set the CMOS output to a voltage sufficient to turn off the FET switch Q2, it is necessary to incorporate the voltage at the V- terminal as the CMOS source level.

As described above, only the elements connected to the C _out terminal and the V- terminal need a high breakdown voltage structure.
Elements in other parts of the battery pack 10 may have a low withstand voltage structure. FIG. 1 shows that the short-circuit detection circuit 24 and the overcurrent detection circuit 25 are connected to the V- terminal, but the circuit elements constituting the short-circuit detection circuit 24 and the overcurrent detection circuit 25 include, for example, the input of a comparator. Only the voltage of the V- terminal is taken in as (gate input). Since C _out (Q9 and shown in for example FIG. 4 Q10) CMOS to be connected to the terminals of not incorporating a voltage of the V- terminal as source level as the circuit element short detector 24 and the overcurrent detection circuit 25 It is not necessary to have a high breakdown voltage structure.

FIG. 2 shows the structure of a low-withstand-voltage (12 V) MOS transistor using a normal LOCOS. Substrate 3
An oxide film 32 for element isolation is grown on 1, a polysilicon gate 33, a source 34, and a drain 35 are formed. An intermediate insulating film 36 is formed. Aluminum electrode 3 for taking potential
8 is provided. Of the elements constituting the battery pack of FIG. 1, elements other than those directly connected to the C _out terminal and the V- terminal may have a low withstand voltage structure as shown in FIG. Specifically, in the case of the present invention, circuit elements other than the ten transistors Q3-Q12 and the three diodes shown in FIG. 4 (described later) have the low breakdown voltage structure shown in FIG.

FIG. 3 shows the structure of a high voltage MOS transistor. An oxide film 50 for element isolation, an offset oxide film 57 for increasing the withstand voltage of the source, and an offset oxide film 58 for increasing the withstand voltage of the drain are grown on the substrate 49, and the polysilicon gate 51 is offset. The source 52 and the drain 53 are formed so as to cover the oxide films 57 and 58 for use. Further, an intermediate film 54, a source aluminum electrode 55, and a drain aluminum electrode 56 are formed. Such a structure is called a LOCOS offset structure. Among the elements constituting the battery pack of FIG.
Only the elements directly connected to the _out terminal and the V- terminal have a high breakdown voltage structure as shown in FIG.

In the case of a normal LOCOS offset, an offset film is provided only on the drain end, but in the case of the present invention,
Since the drain potential and the source potential may be reversed due to a reverse connection of the charger or the like, a bidirectional LOCOS offset is used. In the present invention, the elements having the high breakdown voltage structure shown in FIG. 3 are only ten transistors and three diodes shown in FIG. 4 (described later). Since all the other circuit components have a low withstand voltage structure, a semiconductor device for high withstand voltage voltage detection can be configured with a reduced chip area.

Next, the detailed configuration and operation of the charge / discharge protection circuit 20 will be described with reference to FIGS. The charge / discharge protection circuit 20 has a function of protecting the secondary battery 12 from an overcharged state, an overdischarged state, or an overcurrent state.

In FIG. 1, a charge / discharge protection circuit 20 includes an overcharge detection circuit 22, a level shift circuit 23 for shifting the V _SS level to the V-level, an overdischarge detection circuit 27, an overcurrent detection circuit 25, an overdischarge, The configuration is such that a delay circuit 26 for setting a delay time upon detection of an overcurrent and a short-circuit detection circuit 24 are provided on the same substrate. Overdischarge detection circuit 2
7, the operations of the overcurrent detection circuit 25, the delay circuit 26, and the short-circuit detection circuit 24 are the same as those in the related art, and thus detailed description thereof is omitted.

When the overcharge detection circuit 22 detects the overcharge of the secondary battery, it supplies an overcharge detection signal 22a of LOW level to the level shift circuit 23. The level shift circuit 23 supplies the charge control signal 23a to the C _out terminal based on the overcharge detection signal 22a from the overcharge detection circuit 22, thereby turning off the transistor Q2. This gives 2
The overcharge of the secondary battery 12 can be prevented.

FIG. 4 is a circuit diagram showing a main part of the charge / discharge protection circuit 20, showing a level shift circuit 23 constituted by using high-voltage MOS transistors. The level shift circuit 23 includes an enhancement-type p-channel transistor Q3 connected to the _VDD terminal and a depletion-type n-channel transistor connected to the V- terminal and saturated and functioning as a constant current source.
A predetermined number of inverter circuits (Q5, Q6), (Q
7, Q8) and (Q9, Q10) are cascaded.

In the subsequent stage of the level shift circuit 23, a p-channel transistor Q11 and an n-channel transistor Q1
Two and n-channel transistors Q13 are provided. The gate of the transistor Q11 has an overdischarge detection signal 2
7a has been input. When the overdischarge detection signal 27a becomes a LOW level indicating that discharging is impossible, the transistor Q11
Turns ON, and pulls up the potential of the V- terminal to the potential of the _VDD terminal. As a result, it is possible to prevent the circuit from becoming unstable even when an overdischarge occurs, the current supply to the load is stopped, and the state between the _VDD terminal and the V- terminal is in an open state.

Similarly, an overcharge detection signal 22a is input to the gate of the transistor Q12, and the transistor Q13
An over-discharge detection signal 27a is input to the gate of.
The transistor Q12 is ON when the overcharge detection signal 22a is at a HIGH level indicating that charging is possible (that is, when it is not in an overcharged state). Further, the transistor Q13 is ON when there is no overdischarge. Therefore, transistor Q12
The transistor Q13 is turned ON when neither be overdischarged overcharge, V- is pulled down to V _SS at that time. That is, the transistors Q12 and Q13 detect V- when the short-circuit state is released and the plus terminal and the minus terminal are opened after the overcurrent is detected, that is, after the plus terminal and the minus terminal of the battery pack are short-circuited. Plays the role of pull-down resistor to lower to _SS level. The transistor Q13 does not need to have a high breakdown voltage structure. Because the transistor Q
This is because a high voltage is not applied to the transistor Q13 because the transistor 12 is turned off.

Next, generation of a charge control signal will be described. When the overcharge detection signal 22a is at a HIGH level indicating that charging is possible, the transistor Q3 is turned off.
And the transistor Q4 works as a constant current source.
The voltages at the drains of the transistors Q3 and Q4 become "L" level (V-level), and the "L" level is input to the inverter including the transistors Q5 and Q6. Since the transistor Q5 is turned on and the transistor Q6 is turned off, the voltages at the drains of the transistors Q5 and Q6 become "H" level ( _VDD level), and the "H" level is input to the inverter composed of the transistors Q7 and Q8. Transistor Q7 turns off and transistor Q8 turns O
Because of N, the drain voltages of the transistors Q7 and Q8 become "L" level, and the "L" level is input to the inverter composed of the transistors Q9 and Q10. Since transistor Q9 turns on and transistor Q10 turns off,
The voltages at the drains of the transistors Q9 and Q10, that is, the voltage at the C _out terminal become “H” level. As a result, F
The ET switch Q2 is turned on and charging is performed.

[0032] If the overcharge detecting signal 22a is at the LOW level indicating that it is impossible to charge, C is the _out terminal V- voltage terminal ( "L" level) it takes by the operation of the reverse, as a result The FET switch Q2 turns off and charging stops. As is clear from the circuit diagram, in the transistors Q3-Q12, V
Since a voltage is applied to the terminal, these transistors are required to have a high breakdown voltage structure. Transistor Q3-
If Q12 has a high withstand voltage structure, as a result, the battery pack 10 can have a high withstand voltage structure.

The diodes D1, D2 and D3 are provided for protection against static electricity, but preferably have a high breakdown voltage structure.

[0034]

As described above, according to the present invention, even when an overcharge state is caused by making some of the circuit elements of the charge / discharge protection circuit have a high breakdown voltage structure, damage to the internal circuit can be prevented and charge / discharge can be prevented. The chip area of the protection circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a functional block diagram for explaining a configuration of a battery pack using a charge / discharge protection circuit 20 of the present invention.

FIG. 2 is an element cross-sectional view for explaining a structure of a low-breakdown-voltage MOS transistor manufactured by using a normal LOCOS method.

FIG. 3 is an element cross-sectional view for explaining a structure of a high withstand voltage MOS transistor constituting the high withstand voltage structure of FIG. 1;

FIG. 4 is a circuit diagram illustrating a circuit configuration of a level shift circuit configured using the high breakdown voltage MOS transistor of FIG. 3;

FIG. 5 is a circuit block diagram for explaining a conventional charge / discharge control circuit.

6 is a cross-sectional view of a transistor used in the charge / discharge control circuit of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Battery pack 12 Secondary battery (battery cell) 14 Charger (load) 20 Charge / discharge protection circuit 22 Overcharge detection circuit 22a Overcharge detection signal 23 Level shift circuit 23a Charge control signal 24 Short circuit detection circuit 25 Overcurrent detection circuit 26 Delay circuit 27 Overdischarge detection circuit 27a Overdischarge detection signal Q1 Discharging transistor Q2 Charging transistor

Claims (8)

[Claims] A charge / discharge protection circuit connected to a secondary battery and a charger for protecting the secondary battery from an overcharged state, an overdischarged state, or an overcurrent state, wherein the charge / discharge protection circuit monitors a charged state of the secondary battery. An overcharge detection circuit that generates an overcharge detection signal; a level shift circuit that receives an overcharge detection signal from the overcharge detection circuit and generates a charge control signal; and monitors a discharge state of the secondary battery to generate an overdischarge detection signal An over-discharge detection circuit, an over-current detection circuit that detects an over-current state in the secondary battery and generates an over-current detection signal, a delay circuit that sets a delay time when over-discharge and over-current are detected, and a short-circuit state And a short-circuit detection circuit for detecting a short-circuit detection signal, and a plurality of protection diodes for protecting the charge / discharge protection circuit from static electricity. ,
A charge / discharge protection circuit, wherein a transistor which may receive a relatively high voltage from a charger as a source level or a drain level has a high breakdown voltage structure. 2. The charge / discharge protection circuit according to claim 1, wherein the protection diode has a high breakdown voltage structure. 3. A transistor for preventing a charge protection circuit from becoming unstable when an overdischarge occurs, a current supply to a load is stopped, and a terminal connected to a charger is opened. The charge / discharge protection circuit according to claim 1, further comprising a pull-up resistor, wherein the transistor has a high breakdown voltage structure. 4. A charging device according to claim 1, further comprising a pull-down resistor comprising a plurality of transistors for preventing the charge protection circuit from becoming unstable when the terminal connected to the charger is short-circuited and then opened. 2. The charge / discharge protection circuit according to claim 1, wherein a transistor which may receive a high voltage as a source level or a drain level among the plurality of transistors has a high breakdown voltage structure. 5. The transistor is formed so as to cover an element isolation film, an offset oxide film for increasing a withstand voltage of a source, an offset oxide film for increasing a withstand voltage of a drain, and the offset oxide film. 2. The charge / discharge protection circuit according to claim 1, wherein the charge / discharge protection circuit has a LOCOS offset structure including a formed polysilicon gate. 6. The transistor is formed so as to cover an element isolation film, an offset oxide film for increasing a withstand voltage of a source, an offset oxide film for increasing a withstand voltage of a drain, and the offset oxide film. 4. The charge / discharge protection circuit according to claim 3, wherein the charge / discharge protection circuit has a LOCOS offset structure including a formed polysilicon gate. 7. The high withstand voltage structure includes: an element isolation film, an offset oxide film for increasing a source withstand voltage, an offset oxide film for increasing a drain withstand voltage, and covering the offset oxide film. The charge / discharge protection circuit according to claim 4, wherein the charge / discharge protection circuit has a LOCOS offset structure including a polysilicon gate formed as described above. 8. A battery cell, two terminals to which a charger or a load can be connected, and a charge / discharge protection circuit connected to the battery cell to protect the battery cell from an overcharged state, an overdischarged state, or an overcurrent state. A discharge transistor connected in series between a load and the battery cell to control a discharge current supplied from the battery cell to the load; a discharge transistor connected in series between a charger and the battery cell; A charge transistor that controls a charge current supplied to the battery cell; and a capacitor that sets a delay time when overcharge is detected. The charge / discharge protection circuit monitors a charge state of the battery cell and detects an overcharge detection signal. An overcharge detection circuit that generates an overcharge detection signal from the overcharge detection circuit and generates a charge control signal. An over-discharge detection circuit that monitors a discharge state of the battery cell and generates an over-discharge detection signal; an over-current detection circuit that detects an over-current state of the battery cell and generates an over-current detection signal; A delay circuit for setting a delay time for detecting an overcurrent, a short circuit detection circuit for detecting a short circuit state and generating a short circuit detection signal, and a plurality of protection diodes for protecting the charge / discharge protection circuit from static electricity, Among the transistors constituting the level shift circuit,
A battery pack characterized in that a transistor capable of receiving a relatively high voltage from a charger as a source level or a drain level has a high breakdown voltage structure.