JPH11103369A - Solid-state image pickup element, its driving method, image reader and image reading method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup element contributing to high speed reading of an image, its drive method, the image reader and its read method where the solid-state image pickup element is used for a read sensor so as to read an image at a high speed and low cost. SOLUTION: In the case of reading a monochromatic image by using a 3-line color CCD sensor having R, G, B photosensing pixel arrays 11, 12, 13, horizontal transfer registers 14, 15, 16 that transfer signal charges read from the photosensing pixel arrays 11, 12, 13 and a saving storage register 17 that once stores signal charges by one line read from, e.g. the G photosensing pixel array 12, two exposure periods, e.g. are set for the photosensing pixel arrays 11, 12, 13 during one horizontal transfer period and the signal charge obtained for the first half exposure period is once saved in the save storage register 17 so as to be simultaneous with the signal charge obtained for the latter half exposure period and the resulting signal charges are transferred through the two horizontal registers 14, 15 and outputted in parallel for one horizontal transfer period.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image sensor, a method of driving the same, an image reading apparatus and an image reading method, and more particularly, to at least two solid-state image sensing elements.
The present invention relates to a solid-state imaging device having a system charge transfer unit and a driving method thereof, and an image reading apparatus using the solid-state imaging device as a reading sensor and a reading method thereof.

[0002]

2. Description of the Related Art A color reading sensor (solid-state image sensor) used in a color image reading apparatus includes R (red), G
The sensitivity is lower than that of a monochrome (black and white) type reading sensor because the spectral response band is limited in order to separate an image into three colors (green) and B (blue) and read an image. Further, in order to perform low-noise reading required for high-quality color reading, a sufficient exposure amount is required, so that high-speed reading has been a problem.

[0003] In recent years, as the need for read image quality has increased, the required pixel density has also increased from 16 pixels / mm to 24 pixels / mm, and the amount of information per pixel has increased, resulting in an increase in the amount of data from the read sensor. Reading is taking longer. Further, since the area per pixel of the image has been reduced, it is necessary to secure a sufficient exposure time in order to read the image with a good S / N ratio. Be disadvantaged.

At present, at a read pixel density of 24 pixels / mm,
High speed color reading speed is 160mm / s
ec to about 200 mm / sec. The reading speed is determined by the problem of the exposure amount and the limit of the transfer speed for reading out the signal charge of each pixel of the reading sensor via the charge transfer unit. Therefore, generally, two charge transfer units are arranged for one photosensitive pixel column, and the signal charges of the odd-numbered pixels and the signal charges of the even-numbered pixels in the photosensitive pixel column are branched into two systems. Then, the data is read out by separate charge transfer units.

However, the transfer rate of one charge transfer unit is limited to about 20 MHz (about 40 MHz in total video rate of two systems), and A3-size short sides are read at a read pixel density of 24 pixels / mm. 7500 required for
Assuming that signal charges for pixels are read, 40 MHz ÷ 7500 (pixels) ÷ 24 (pixels / mm) =
222 (mm / sec), and the read speed of the charge transfer section is also 1
It can be seen that the speed of 60 mm / sec to 200 mm / sec is close to the limit.

[0006]

As a copying machine usually used in an office, a high-quality full-color copying function utilizing a digital reading function and a high-speed monochrome (a conventional analog copying machine) have been used. It is desirable that both functions of the (black and white) copying function be compatible with one copying machine. At this time, the above-described restriction in performing full-color reading with high image quality causes a problem in performing high-speed reading. That is, even when a monochrome image is read using the same reading sensor, reading can be performed only at the same speed as that for reading a color image, so that high-speed reading comparable to a monochrome-only device cannot be realized. To obtain a reading speed comparable to that of an analog copying machine, a reading speed of 300 mm / sec or more is required.

When a plurality of copies are made for one original, image information of one original is stored in a memory, and
Since the image output section may repeatedly output an image based on the accumulated information, the burden on the document reading section is eliminated. However, when a document feeder is mounted to copy one copy at a time from a plurality of documents, high-speed document reading is required.

In order to solve this problem, it is only necessary to increase the frequency of the driving clock of the reading sensor in the monochrome mode and read the data. However, in the case of the high-precision reading of 24 pixels / mm, the scanning is performed at 160 mm / sec to 200 mm / sec.
Even at the reading speed of sec, since the driving is performed near the limit of the driving capability of the reading sensor, there is not much merit of switching the driving clock of the reading sensor.

In addition, if only the monochrome read sensor is used, the charge transfer section, which conventionally transfers the signal charge of each pixel of the photosensitive pixel row in two even / odd systems, is further added to the charge transfer section.
2. Description of the Related Art A solid-state imaging device has been known in which the speed is increased by spatially dividing the system into four systems, such as dividing the pixel into a pixel side (left pixel portion) and a final pixel side (right pixel portion) ( For example, the document “Toshiba Technical Publications” Vol.
3-51 Issue No. 95-4678).

However, when such a solid-state imaging device is used as a monochrome high-speed sensor, the apparatus becomes large-scale, such as providing an optical system dedicated to the monochrome high-speed sensor separately from the optical system of the color sensor. .
Further, a method of making the output of the color sensor itself a system capable of withstanding high-speed driving by using four systems for each color is conceivable, but the output processing circuit such as an analog circuit and an A / D converter becomes twice as large. Since the number of circuits in the conventional system is increased from six to twelve, the circuit scale becomes enormous.

In addition, since there is a slight difference in reading characteristics due to a characteristic difference such as linearity of an analog circuit system in each reading processing system, a problem in image quality also arises. That is, conventionally, there are two systems of even-numbered pixels / odd-numbered pixels,
Even if a difference in the reading characteristics appears on the image, it becomes a two-pixel cycle,
The image unevenness was inconspicuous because of very fine image information. However, when a single photosensitive pixel column is divided into four systems, the characteristic difference appearing on the image has a period of four pixels, which corresponds to coarser image information, so that image unevenness becomes more conspicuous. Further, when the reading sensor is spatially divided, the boundary of the processing system on the image may be clearly distinguished due to a difference in reading linearity.

Further, a solid-state imaging device having a plurality of photosensitive pixel arrays arranged in the sub-scanning direction is used as a reading sensor,
There is also known an image reading apparatus having a configuration in which the reading time per one document is reduced (for example, Japanese Patent Application Laid-Open No. Hei 5-26026).
No. 3). However, in this conventional apparatus, since the plurality of photosensitive pixel rows are arranged in the sub-scanning direction, the size of the reading sensor is particularly large in the sub-scanning direction, and the timing control for each photosensitive pixel row is complicated, In addition, since image information read simultaneously by a plurality of photosensitive pixel rows is combined and used, the amount of movement in the sub-scanning direction during the exposure period is twice as large as usual, and there is a problem that the image is blurred.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above problems, and has as its object to provide a solid-state imaging device capable of contributing to high-speed image reading, a driving method thereof, and a solid-state imaging device as a reading sensor. It is an object of the present invention to provide an image reading apparatus and a reading method thereof that can realize high-speed reading of an image at low cost by using the apparatus.

[0014]

The solid-state image pickup device according to the present invention is provided with one photosensitive pixel row and at least both sides of the photosensitive pixel row for each pixel to read out signal charges of all pixels in the photosensitive pixel row. Two-system shift gates, at least two-system charge transfer units for transferring signal charges read by the at least two-system shift gates, and respective transfer-destination-side ends of the at least two-system charge transfer units And at least two systems of charge detection units provided adjacent to the.

A method for driving a solid-state image pickup device according to the present invention comprises:
In the solid-state imaging device having the above configuration, a plurality of exposure periods are set for one photosensitive pixel column during one transfer period of the charge transfer unit,
Each signal charge obtained in a plurality of exposure periods in the photosensitive pixel column is shared by at least two shift gates and read out to at least two charge transfer units;
The charge is transferred to at least two corresponding charge detection units by the charge transfer units of the system.

In the solid-state image pickup device having the above-described structure and the method of driving the same, for example, two shift gates provided on both sides of the photosensitive pixel row are provided for each pixel of the photosensitive pixel row. , The signal charges of all the pixels are read out. Therefore, when, for example, two exposure periods are set in one transfer period of the charge transfer unit for the photosensitive pixel column, each signal charge obtained by photoelectric conversion in the photosensitive pixel column during the two exposure periods is reduced by two. Image data of two systems can be obtained by sharing the data with the shift gates of the two systems, reading the signals to the charge transfer units of the two systems, and transferring and outputting the charges by the charge transfer units of the two systems.

An image reading apparatus according to the present invention comprises a solid-state image pickup device having at least two types of charge transfer sections for one photosensitive pixel row, and one charge transfer section for a photosensitive pixel row.
Exposure period setting means for setting a plurality of exposure periods during the transfer period, and each signal charge obtained in the plurality of exposure periods set by the exposure period setting means in the photosensitive pixel array is transferred by at least two systems of charge transfer units. Transfer driving means.

In the image reading apparatus having the above configuration, the exposure period setting means sets a plurality of exposure periods for the photosensitive pixel row during one transfer period of the charge transfer section. The setting of a plurality of exposure periods is realized by performing a read operation twice or more on the photosensitive pixel column during one transfer period of the charge transfer unit. When the exposure period is set to, for example, two times, the transfer driving unit temporarily stores the signal charges obtained in the first half of the exposure period in the storage unit, and then transfers the two charges together with the signal charges obtained in the second half of the exposure period. The data is transferred and output by the transfer unit.

According to the image reading method of the present invention, when an image is read using a solid-state image pickup device having at least two types of charge transfer sections for one photosensitive pixel row as a reading sensor, the photosensitive pixel row is read. A plurality of read operations of the signal charge during one transfer period of the charge transfer section, and the signal charges obtained by the plurality of read operations are respectively transferred by at least two charge transfer sections to thereby obtain at least two sets of image information. Get.

In the above image reading method, a plurality of exposure periods are set for the photosensitive pixel row by performing the reading operation on the photosensitive pixel row a plurality of times during one transfer period of the charge transfer section. When the exposure period is set to, for example, two times, the signal charges obtained in the first half of the exposure period are temporarily held and, for example, synchronized with the signal charges obtained in the second half of the exposure period. Then, for example, parallel output is performed in one transfer period by using two charge transfer units.

[0021]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing a first embodiment of the present invention. In FIG. 1, three photosensitive pixel rows 11, 12, and 13 in which a large number of photoelectric conversion elements (pixels) such as photodiodes are linearly arranged have a predetermined line interval L that is equal to each other. R, G, B from the side
Are arranged in order corresponding to the three colors, respectively. These photosensitive pixel rows 11, 12, and 13 have R, G, B on the light receiving surface.
Are provided with corresponding color filters (not shown),
The incident light is converted into a signal charge having a charge amount corresponding to the light amount for each pixel for each color and is stored.

A CCD (Charge Coupler) for horizontally transferring signal charges of each of the three photosensitive pixel rows 11, 12, and 13 is provided.
d device) (hereinafter, referred to as a horizontal transfer register) 14, 15 and 16 so that they are not easily affected by fluctuations in the scanning speed of the mechanical scanning system.
In order to reduce the distance between the photosensitive pixel rows 11, 12, and 13, the pixels are arranged outside the photosensitive pixel rows 11, 12, and 13. Then, the signal charges of the central photosensitive pixel row among the three photosensitive pixel rows are read out to the corresponding horizontal transfer registers through the outer photosensitive pixel rows. This is so-called intra-pixel transfer.

In the example of FIG. 1, horizontal transfer registers 14 and 15 for two colors of R and G are arranged on the R side, and the signal charges of the central G photosensitive pixel row 12 are transferred to each pixel of the R photosensitive pixel row 11. Through a horizontal transfer register 15 through the memory. In a three-line color CCD linear sensor (hereinafter simply referred to as a color CCD sensor) of the type often used in digital copiers, signal charges of even-numbered pixels and signal charges of odd-numbered pixels in a photosensitive pixel row are divided. Although there are two horizontal transfer registers per color for transferring, here, one horizontal transfer register is used for simplicity.
The description will be made with the structure of one system per color.

The R photosensitive pixel row 11 and the G photosensitive pixel row 12
A save accumulation register 17 for temporarily saving the signal charges of the G photosensitive pixel column 12 is disposed between the first and second pixels. Further, the G photosensitive pixel row 12 and the save accumulation register 17 are provided.
Between the evacuation accumulation register 17 and the R photosensitive pixel row 11, between the R photosensitive pixel row 11 and the G horizontal transfer register 15, between the G transfer register 15 and the R horizontal transfer register 14.
And shift gates 18, 19, 20, 21 and 22 are arranged between the photosensitive pixel column 13 of B and the horizontal transfer register 16 of B, respectively.

The signal charges photoelectrically converted by the R photosensitive pixel array 11 are read out to the R horizontal transfer register 14 via the shift gate 20, the G horizontal transfer register 15 and the shift gate 21. The signal charges photoelectrically converted by the G photosensitive pixel row 12 are temporarily saved in the save accumulation register 17 via the shift gate 18, and then the shift gate 19, the R photosensitive pixel row 11 and the shift gate 20 of the R The data is read out to the horizontal transfer register 15 of G via the memory. The signal charge photoelectrically converted by the photosensitive pixel array 13 of B is
The data is read out to the B horizontal transfer register 16 by the shift gate 22.

Each of the gate electrodes of the shift gates 18, 19, 20, 21 and 22 has a shift pulse φSH _G , a shift pulse φT, a shift pulse φSH _R1 , a shift pulse φSH _R2 and a shift pulse generated by the pulse generation circuit 23. φSH _B is applied at appropriate timing. The horizontal transfer registers 14, 1 for R, G, B
Reference numerals 5 and 16 each have a transfer electrode having a two-layer structure.
Phase horizontal transfer pulses φ1 and φ2 are applied. The horizontal transfer registers 14, 15, 16 determine the horizontal transfer pulse φ
The signal charges are sequentially transferred in the horizontal direction by two-phase driving by 1 and φ2.

At the end of each of the horizontal transfer registers 14, 15, 16 on the transfer destination side, for example, a charge-to-voltage converter 24, 25, 26 having a floating diffusion amplifier configuration.
Is arranged. These charge-voltage converters 24, 25,
Reference numeral 26 converts the signal charges sequentially transferred in pixel units by the horizontal transfer registers 14, 15, 16 into signal voltages and outputs them.

As described above, for example, the G photosensitive pixel row 1
By providing the save accumulation register 17 in the signal charge readout path from 2 to the horizontal transfer register 15, an intra-pixel transfer type three-line color CCD sensor capable of adjusting the exposure phase for zoom reading is configured. ing. Here, the principle of the exposure phase adjustment using the save accumulation register 17 will be described.

In the three-line color CCD sensor of the intra-pixel transfer method, the gap correction amount between the three lines may not be an integer due to the change in the sub-scanning density accompanying the change in the reading magnification. It is necessary to adjust the phase of the exposure period to shift the exposure periods. In this case, it is necessary to read out the signal charges of the central photosensitive pixel row 12 at the end of the exposure period through the outer photosensitive pixel row 11 during the exposure period, so that the R and G exposure phases are shifted. The phase adjustment of the exposure period is realized by transferring from the G photosensitive pixel row 12 at the center of 1 to the save accumulation register 17.

In the normal color mode, as shown in the timing chart of FIG. 2, there are an exposure period for exposing and reading an image and a horizontal transfer period for reading signal charges to the outside in a time series. Here, only the two color portions of R and G are shown. The signal charge obtained by exposing for one exposure period is read out to a transfer register, and is transferred as a time-series signal charge during a period in which the signal charge of the next line is being exposed. At this time, the exposure period and the horizontal transfer period of R and G are synchronized. On the other hand, in the exposure phase adjustment mode, as shown in the timing chart of FIG. 3, the signal charges can be read out in a state where the G exposure period and the R exposure period are not synchronized.

In the intra-pixel transfer type three-line color CCD sensor having the save accumulation register 17 for enabling the exposure phase adjustment, in the present invention, in addition to the normal color mode and the exposure phase adjustment mode, a monochrome A configuration is adopted in which a monochrome high-speed mode for reading images at high speed can be set.

That is, the three-line color CCD sensor structure of the intra-pixel transfer method uses, for example, a signal charge transfer path from the G photosensitive pixel array 12 to the horizontal transfer register 15 in a plurality of colors (in this example, G, R Paying attention to the structure sharing the transfer of the signal charges of two colors), as shown in the timing chart of FIG.
The signal charges of the monochrome image obtained during the two exposure periods are transferred in parallel by the two horizontal transfer registers 14 and 15 for R and G and output.

In FIG. 1, the setting of the normal color mode / exposure phase adjustment mode / monochrome high-speed mode is performed by the mode setting circuit 27. This mode setting circuit 2
When each mode is set by 7, a mode switching signal corresponding to the mode is supplied to the pulse generation circuit 23. In response to the mode switching signal, the pulse generation circuit 23 determines each timing of the shift pulse φSH _G , shift pulse φT, shift pulse φSH _R1 and shift pulse φSH _R2 , that is, each drive timing of the shift gates 18, 19, 20, and 21. Each mode is realized by controlling.

A drain 28 for discharging unnecessary signal charges is disposed outside the R horizontal transfer register 14. A reset gate 29 is provided between the horizontal transfer register 14 for R and the drain 28. A reset pulse φRG generated by the pulse generation circuit 23 is applied to the gate electrode of the reset gate 29. As a result, R through the reset gate 29
Unnecessary signal charges are discharged to the drain 28 from the horizontal transfer register 14 side.

FIG. 5 shows a three-line color CCD having the above configuration.
FIG. 2 is a block diagram schematically illustrating a configuration of a signal processing system in an image forming apparatus such as a digital copying machine equipped with an image reading device using a sensor. In FIG. 5, three-line color C
Processing circuits 32, 33, and 34 are provided in parallel with the R, G, and B color image signals output from the CD sensor 31. In these processing circuits 32, 33, and 34, signal processing such as analog amplification, A / D conversion, and shading correction is performed for each color image signal.

The image signals of the respective colors which have passed through the processing circuits 32, 33 and 34 are subjected to color correction processing for three colors by a matrix correction processing circuit 35 at the next stage, and thereafter, an image memory 36 provided for each color is provided. 37 and 38 are stored. The image signals of each color stored in the image memories 36, 37, and 38 are subjected to signal processing such as color space conversion by the processing circuit 39, and then, for example, K (black), Y (yellow), M (magenta) , C
The data is supplied to the printer unit 40 as data of four colors (cyan).

The image memories 36, 37, and 38 have a role as a buffer circuit for converting the processing speed of the reading section including the CCD sensor 31 and the printer section 40.
Thus, for example, data read by a reading unit having a reading linear velocity of 160 mm / sec is stored in the image memories 36 and 3.
7 and 38, the printer unit 40 sends a 250 mm /
In such a case that writing is performed at a speed of sec, the speeds of the reading system and the writing system are different, but matching can be achieved.

Next, specific operations in each of the exposure phase adjustment mode / monochrome high-speed mode will be described. In each of the drawings relating to the following description of the operation, in order to simplify the description, the shift gates 18, 19, 20, 2
1 and 22 are omitted, and only the photosensitive pixel rows 11, 12, 13 and the horizontal transfer registers 14, 15, 16 are shown.

First, the operation in the exposure phase adjustment mode will be described with reference to FIGS. 6 and 7, taking an example in which the G exposure cycle is shifted from the R and G exposure cycles.
FIG. 6A shows a state in which each of the R and B photosensitive pixel rows 11 and 13 has been exposed for half a cycle, and the G photosensitive pixel row 12 has completed exposure for one cycle. Here, as shown in FIG. 6 (B), the signal charges of the G photosensitive pixel array 12 after the completion of the exposure are
The data is read out to the save accumulation register 17 and temporarily saved here.

Thereafter, the R and B photosensitive pixel rows 11, 13
Is exposed for the remaining half cycle. This state is shown in FIG.
It is shown in (A). In this state, the signal charges of the R and B photosensitive pixel rows 11 and 13 that have been exposed and the signal charge of the G photosensitive pixel row 12 that has been exposed half a cycle before and are stored in the save accumulation register 17 are stored. And the horizontal transfer registers 14 and 16 and the horizontal transfer register 1 as shown in FIG.
5 and horizontal transfer. This allows R,
Since the exposure phase adjustment between the three lines of G and B is performed and the non-integer control of the gap correction amount at the time of zoom reading is realized, the correction function of the color registration can be kept good.

Next, the operation in the monochrome high-speed mode will be described with reference to FIGS. FIG. 8A shows a state in which half of the standard exposure cycle has been exposed.
From this state, as shown in FIG. 8B, the signal charges of the G photosensitive pixel column 12 are read out to the save accumulation register 17, and
Evacuate here temporarily. FIG. 9A shows a state in which exposure of the other half has been completed. At this stage, two lines of the signal charge for the half cycle of G and the signal charge for the half cycle of the G photosensitive pixel array 12 saved in the save accumulation register 17 are simultaneously synchronized.

Then, the signal charges for the two lines are read out to the horizontal transfer registers 14 and 15 and are horizontally transferred as shown in FIG. 9B. At this time, the signal charges for the entire period of the R photosensitive pixel row 11 become unnecessary charges,
After passing through the horizontal transfer registers 14 and 15, the drain 28
To be discharged. In addition, as for the signal charges for the entire period of the photosensitive pixel array 13 for B, it is sufficient that the signal for B is not used in the subsequent signal processing system. Even if horizontal transfer is performed, there is no problem in operation.

After the signal charges horizontally transferred by the horizontal transfer registers 14 and 15 are converted into signal voltages by the charge-voltage converters 24 and 25, the processing circuit 3 for R and G in FIG.
The exposure lines 2 and 33 are supplied as an exposure line in the second half exposure period of G and an exposure line in the first half exposure period (see FIG. 4). As a result, it is possible to perform processing in parallel without increasing the video rate, and to store the image data in the R and G image memories 36 and 37 line by line, that is, alternately line-sequentially.

As described above, in the intra-pixel transfer type three-line color CCD sensor having the evacuation accumulation register 17 provided for adjusting the exposure phase, the driving conditions of the sensor are as follows.
That is, the horizontal transfer register provided for one scan line × two colors can be switched and used for two scan lines × one color only by changing each drive timing of the shift gates 18 to 21. A monochrome high-speed mode for reading a monochrome image at high speed can be realized. Similarly, during one exposure period in the color mode, the signal charges of the scanning lines in the two exposure periods can be read out, so that the double speed mode of the color mode can be realized. In addition, since the reading color used for reading is G, which has a larger exposure amount than other colors, it is possible to minimize the influence of a decrease in S / N when the exposure amount is halved in double speed reading. it can.

In the color copy mode, data of four colors of K, Y, M, and C are written. Therefore, as shown in FIG. 10, the reading unit starts reading before writing the first K plate, and Timing of completion of writing to memory and K
By making the timing of the end of writing of the plate the same time, copying at the fastest timing can be performed. For the remaining three colors of data to be written to the printer, the full-color data read in the first scan is written, so that the reading unit does not need to read again. In addition, in a printer capable of printing up to A3 size, in order to write an A4-size four-color plate, it is necessary to adjust the timing until the print paper returns to the same position on the transfer drum. Time interval.

On the other hand, in the monochrome high-speed copy mode, there is no need to adjust the timing between the color plates, as in the case of the color copy mode (see the timing chart of FIG. 10). Therefore, in order to increase the productivity of the printer, printing is continuously performed on paper with a reduced paper gap. For example, in order to secure a productivity of 60 sheets per minute at a writing speed of 250 mm / sec, it is necessary to set the paper gap portion to 0.16 seconds in terms of time.

In the meantime, in order to increase the productivity of copying in a mode in which one copy is taken for one document in combination with the document feeder, the reading unit is required to operate in the operation cycle of the printer having a small paper gap. At the same time, it is necessary to read the original and to feed and discharge the original and scan back.
In this case, it takes about 0.3 seconds to feed / discharge and scan back the original, so it is necessary to read the original in 0.7 seconds or less.

However, as described above, if the reading speed in the monochrome mode is doubled to 320 mm / sec, A
Four-size short hand can be read in 0.66 seconds, and a productivity of 60 sheets per minute can be realized. At this time, the reading speed of the scanner is faster than the writing speed of the printer, but there is no particular problem because the image memories 36 and 37 disposed between the reading system and the writing system serve as buffers. FIG. 11 shows a timing chart in this case. Since the reading linear speed of the reading unit is faster than the writing linear speed of the printer unit 40, there is no problem even if the writing timing of the printer unit 40 is increased to the same as the reading start timing of the reading unit.

Further, since the data equivalent to 320 mm is divided into two systems and written into the R and G image memories 36 and 37, the video rate of the preceding stage is not changed from that of the color mode. By alternately reading each time, the data is synthesized into one system of data, and writing to the printer unit 40 is performed at the same speed as in the color mode, so that the video rate is still the same as in the color mode.

Incidentally, the image reading density is 24 pixels / mm.
In the case of the above, the image reading apparatus for the copier for A3 size needs a sensor of about 7500 pixels including a margin for adjusting the reading position. At this reading resolution, 160 mm /
In the case of trying to read in sec, the data rate is 7500 (pixels / scanning line) × 160 (mm / sec) without taking into account the data shift section and dummy pixels.
c) × 24 (scan lines / mm) = 28.8 (M pixels /
sec).

The driving capability of the sensor itself is 30 MHz to 4
Since it is 0 MHz, even at 160 mm / sec, it is used at the limit of the driving capability. Even if the driving frequency of the sensor is increased, there is almost no margin for increasing the reading linear velocity. However, according to the present embodiment, the data rate can be doubled without increasing the sensor driving speed.
Even if the reading speed is largely switched between the monochrome mode and the color mode, a monochrome high-speed copy mode can be realized.

FIG. 12 shows a third embodiment according to the second embodiment of the present invention.
FIG. 2 is a structural diagram of a main part schematically showing a configuration of a line color CCD sensor. In FIG. 12, three photosensitive pixel rows 51, 52, and 53 in which a large number of photoelectric conversion elements (pixels) such as photodiodes are directly arranged are arranged, for example, in three colors of R, G, and B from the bottom of the figure. Are arranged in close proximity to each other. In the photosensitive pixel rows 51, 52, and 53, color filters (not shown) corresponding to R, G, and B, respectively, are arranged on the light receiving surface. It is converted into an amount of signal charge and stored.

Then, the three photosensitive pixel rows 51, 52, 5
3, the signal charges of the R and G two-color photosensitive pixel rows 51 and 52 are read out in the downward direction in the figure, and the two even- and odd-numbered horizontal transfer registers 5 are stored through the save accumulation register 54.
It is configured to transfer to 5 to 58. The horizontal transfer registers 55 to 58 function to sequentially transfer signal charges for one line and output them as a time-series signal. The signal charges of the B photosensitive pixel column 53 are read out in the upper direction in the figure, but the configuration of the horizontal transfer register is omitted in the drawing. In each of the photosensitive pixel rows 51, 52, and 53, two blocks constitute one block. FIG. 13 shows a specific configuration for one block.

In FIG. 13, a shift gate 59 for reading out signal charges of the R photosensitive pixel row 51 is provided between the R photosensitive pixel row 51 and the save accumulation register 54. Further, a shift gate 60 for reading out the signal charges of the G photosensitive pixel row 52 is provided between the G photosensitive pixel row 52 and the R photosensitive pixel row 51. Shift gate 5
The shift pulses SH _R , S
H _G are applied, respectively. Here, the signal charges of the G photosensitive pixel column 52 located at the center of the three lines are read through the R photosensitive pixel column 51.

The save accumulation register 54 has a first transfer electrode array and a second transfer electrode array. Further, both the first and second transfer electrode arrays transfer the signal charges of the even-numbered pixels and the odd-numbered pixels of the R and G colors to the horizontal transfer register 55.
~ 58, and A, B
Of each of the two systems. Hereinafter, 2 of the first transfer electrode row
The system electrodes are referred to as first transfer electrodes 61A and 62B,
The two electrodes in the transfer electrode row are referred to as 62A and 62B.
The drive pulse T is applied to the first transfer electrodes 61A and 62B.
_1A and T _1B are applied, and drive pulses T _2A and T _2B are applied to the second transfer electrodes 62A and 62B.

A shift gate 63 that operates in conjunction with the second transfer electrode 62A is provided between the first transfer electrode row and the second transfer electrode row. This shift gate 63
The gate electrodes of the shift pulse SH _T is applied.
Further, at the end of the first and second transfer electrode arrays, a drain 6 for discharging unnecessary charges such as extra dark output components is provided.
4, 65 are provided. The second transfer electrode 62B functions to carry signal charges to two horizontal transfer registers 55 to 58 for R and G before the drains 64 and 65, respectively. The horizontal transfer registers 55 to 58 have transfer electrodes having a two-layer structure, and two-phase horizontal transfer pulses φ1 and φ2 are applied to the transfer electrodes having the two-layer structure.

FIG. 14 is an operation explanatory diagram for explaining the change and operation of the potential distribution of the first transfer electrode array (potential section AA 'in FIG. 13). Is shown. In this potential distribution, the direction in which the potential is higher is taken below the figure. Although the signal charge is negative and flows in the direction of higher potential, this is a conventionally used expression since it is easy to intuitively understand that the signal charge flows downward. Vsub is a substrate bias voltage, and Vcc is a power supply voltage.

First, when the signal charge of each pixel in the photosensitive pixel row is sent to the first transfer electrode row, as shown in FIG. 14A, the drive pulse T _1A of the first transfer electrode 61A is set to “H”. In the state in which the gate pulse SH
_R is changed from "L" level to "H" level. The signal charge of the R photosensitive pixel column 51 is read out to the first transfer electrode 61A by the potential gradient at this time. At the same time, the gate pulse SH _G of the shift gate 60 is also "L" level →
When the signal level is changed to the “H” level, the signal charges of the G photosensitive pixel row 52 also pass through the R photosensitive pixel row 51 and are read out to the first transfer electrode 61A.

Further, as shown in FIGS. 14B and 14C, the drive pulse T _1A of the first transfer electrode 61A of the A system is changed from “H” level → “L” level → “H” level. At the same time, the drive pulse T _1B of the first transfer electrode 61B of the B system is fixed to an intermediate level between the “H” level and “L” level of the drive pulse T _1A of the first transfer electrode 61A of the A system, and the virtual phase (Virtual) is set. By acting as Phase, the signal charges read to the first transfer electrode 61A can be sequentially transferred to the right (toward the horizontal transfer register). Then, the charges transferred to the drain 64 at the final stage are discharged here.

FIG. 15 is an operation explanatory diagram for explaining the change and operation of the potential distribution of the second transfer electrode array (potential section BB 'in FIG. 13). Is shown. In this second transfer electrode row, FIG.
As shown in (a) and (b), the B-system second transfer electrode 6
2B drive pulse T _2B is changed from “H” level → “L” level →
By changing the horizontal transfer pulse φ1 of the first phase from “L” level → “H” level → “L” level, the signal charges are sequentially shifted rightward (toward the horizontal transfer register).
Is forwarded to At this time, the second transfer electrode 62A of the A system
Of the drive pulse T _2A, by fixing the "H" level to the "L" level intermediate level of the drive pulse T _2B of the second transfer electrode 62B of the B lineage, similar to the first transfer electrode 61B of the B lineage , Make the virtual phase work.

Next, the operation of the horizontal transfer in the save accumulation register 54 will be described with reference to FIG. FIGS. 16A and 16B are views for explaining the change and operation of the potential distribution at the time of horizontal transfer at the save accumulation electrode 54 (potential section CC ′ and potential section DD ′ in FIG. 13). FIG. 4 is an explanatory diagram of the operation, and shows a drive pulse of each electrode and a change in potential.

First, the potential cross section CC ′ of FIG.
Indicates a portion where signal charges read out in parallel from two systems of read pixels of even-numbered pixels and odd-numbered pixels are sent to the first transfer electrode. This is a part of the connected first transfer electrode row. The signal charges in the photosensitive pixel column are caused by two adjacent charges of the first transfer electrode 61A.
After being read into one transfer electrode, the drive pulse T _1A of the first transfer electrode 61A is changed from “L” level → “H” level → “L”
By changing the level, the data is sequentially transferred to the right. The signal charge transferred rightward is transferred downward as shown in FIG. 14 along with the meandering of the first transfer electrode.

Subsequently, the potential cross section DD 'in FIG.
Is a part that has the function of moving the signal charge group transferring the first transfer electrode row to the second transfer electrode row in parallel. First, the signal charges on the first transfer electrode row (right side) when the drive pulse T _2A of the second transfer electrode 62A is at the “L” level change the drive pulse T _2A from “L” level to “H” level. By changing, it can be moved to the second transfer electrode side (left side). This drive pulse T _2A "L" level → "H" level and by varying the drive pulse T _2A and the gate pulse SH _T applied to the shift gate 63 simultaneously "H" level to be Is transferred in parallel between the two transfer electrode arrays due to the potential gradient caused by this.

Next, the operation for realizing the monochrome high-speed mode in the intra-pixel transfer type three-line color CCD sensor according to the second embodiment having the above structure will be described with reference to FIG.
The operation will be described with reference to the timing chart of FIG. 7 and the operation explanatory diagrams of FIGS.

In FIG. 18, time t10 indicates a state in which exposure for a half cycle has been completed. Exposure of a half cycle is complete, the gate pulse SH _R shift gate 59 becomes "H" level, which also drive pulse T _1A of the first transfer electrodes 61A of system A in the retracted storage register 54 in synchronization with "H At time t11, signal charges for two pixels of the R photosensitive pixel row 51 are read out to the first transfer electrode 61A via the shift gate 59.

[0067] Then, the gate pulse SH when _R and the drive pulse T _1A is both "L" level (time t12),
The signal charges for the two pixels of R are transferred to the first transfer electrode 61 of the B system.
B, and the drive pulse T _1A changes from “L” level → “H” level → “L” level until time t13, so that the drive pulse T _1A is transferred to the first transfer electrode 61B of the next B system. You.

[0068] Then, the gate pulse SH _R shift gate 59, 60, SH _G becomes both "H" level, which the drive pulse T _1A of the first transfer electrodes 61A of synchronization with A lineage "H" level (Time t14), the signal charges for the two pixels of the G photosensitive pixel row 52 are shifted by the shift gate 60,
The signal is shifted to the first transfer electrode 61A via the R photosensitive pixel column 51 and the shift gate 59, and at the same time, the signal charges for two R pixels are transferred to the next first transfer electrode 61A.

[0069] Then, the gate pulse SH _R, SH _G is "L" transition level, the drive pulse T _1A of the first transfer electrodes 61A of system A is "L" level → "H" level → "L"
When the signal transitions to the level (time t15), the signal charges for the two pixels of R and the signal charges for the two pixels of G are sequentially shifted to the next B, respectively.
It is transferred to the first transfer electrode 61B of the system. Then, the drive pulse T _1A repeats the transition from “L” level → “H” level → “L” level twice (at times t16 and t1).
7) The signal charges for two pixels of R are discharged to the drain 64, and the signal charges for two pixels of G are sequentially transferred.

Thereafter, when the drive pulse T _2A of the second transfer electrode 62A becomes “H” level (time t18), the signal charges for two pixels of G are transferred from the first transfer electrode 61B to the second transfer electrode 62A. You. At time t19, a state is shown in which the signal charge of R is discharged and cleared, and the signal charge of only the half cycle exposure of G is stored in the second transfer electrode 62A in the save accumulation register 54.

[0071] Subsequently, in FIG. 19, the remaining half of the exposure period ended (time t20), the gate pulse SH _R and the drive pulse T _1A of the first transfer electrodes 61A of system A are both "H shift gate 59 Level (at time t2
1) The signal charges for two pixels of the R photosensitive pixel column 51 are shifted to the first transfer electrode 61A via the shift gate 59. The gate pulse SH _R and the drive pulse T _1A
Are both at the "L" level (time t22), the signal charges for the two pixels of R are transferred to the first transfer electrode 61B of the B system.

Thereafter, the transition of the driving pulse T _1A from the “H” level to the “L” level is repeated three times until time t23, whereby the signal charges for two pixels of R are stored in the first transfer electrode array. Each electrode is transferred sequentially. The gate pulse SH _R shift gate 59, 60, SH _G becomes "H" level, which the first transfer electrodes 61A of synchronization with system A
When the driving pulse T _{1A at the} “H” level also becomes “H” level (at time t2
3), signal charges for two pixels of the G photosensitive pixel row 52 are shifted to the first transfer electrode 61A via the shift gate 60, the R photosensitive pixel row 51 and the shift gate 59, and at the same time, the first pixel of the R pixel The signal charges are discharged to the drain 64.

Subsequently, the drive pulse T _1A changes to “H” level →
When transitioning to the “L” level (time t24), signal charges for two pixels of the G photosensitive pixel row 52 are sequentially transferred to each electrode in the first transfer electrode row, and at the same time, the signal of the second pixel of R is transferred. Electric charges are also discharged to the drain 64. Thereafter, when the drive pulse T _2A of the second transfer electrode 62A becomes “H” level (time t25), the signal charges for two pixels of G are transferred to the first transfer electrode 61.
B is transferred to the second transfer electrode 62A.

At time t26, a state is shown in which G signal charges for two even-numbered / odd-numbered systems × 2 scanning lines have been set in each of the second transfer electrodes 62A of the save accumulation register 54. Since the operations up to this point are performed during the transfer operation of the horizontal transfer registers 55 to 58, the horizontal transfer registers 55 to 5
8, horizontal transfer pulses φ1, φ of a predetermined frequency
2 are given.

Next, when the drive pulse T _2B of the second transfer electrode 62 B of the B system becomes “H” level, and in synchronization with this, the horizontal transfer pulse φ 1 of the first phase becomes “L” level (time t 27). ), The signal charges for the four G pixels set on the A-system second transfer electrode 62A are shifted to the B-system second transfer electrode 62B. Thereafter, the drive pulse T _2B makes a transition from “L” level to “H” level by 3 before time t28.
By repeating the above operation, the horizontal transfer is completed, and the signal charges for four pixels of G are transferred to the vacant four-system horizontal transfer registers 55 to 58.

At the time of the transfer operation of the signal charges for four pixels of G to the horizontal transfer registers 55 to 58, the horizontal transfer pulse φ1 of the first phase also becomes “H” level in synchronization with the drive pulse T _2B → The “L” level transition is repeated. Therefore, the cycle of the horizontal transfer pulse φ1 at this time is the same as the drive pulse _T2B, and is longer than the cycle at the time of the normal horizontal transfer operation. Then, when the driving pulse T _2B becomes “L” level and the horizontal transfer pulse φ1 becomes “H” level (time t29),
The transfer of signal charges for four pixels of G to the horizontal transfer registers 55 to 58 is completed.

By the above-described series of operations, the four horizontal transfer registers 55 to 58 originally provided for even and odd two systems × two colors are divided into two for even and odd two systems × two scanning lines. Switching to reading of signal charges can be used. As a result, in the intra-pixel transfer type three-line color CCD sensor having the save accumulation register 54, the driving conditions of the sensor, that is, the shift gates 59, 60,
63, only by changing the drive timings of the first transfer electrodes 61A and 61B and the second transfer electrodes 62A and 62B,
As in the previous embodiment, a monochrome high-speed mode for reading a monochrome image at high speed can be realized.

In the first and second embodiments described above, in the monochrome high-speed mode, by changing the driving conditions of the sensor, the speed is doubled without changing the frequency of the horizontal transfer pulse for operating the horizontal transfer register. And the signal charges can be read out at the same time. This means that, on the contrary, the exposure time of the sensor is reduced by half.

In general, in reading a color image, the red region is also reduced to about half in order to correct the spectral distribution of the halogen lamp (the characteristic that blue is weak) and the color characteristic of the color sensor in the infrared region. Due to the characteristic of the infrared cut filter that cuts, the exposure amounts of the three colors R, G, and B are unbalanced, and the S / N of the B read signal is the minimum necessary.
Even if an attempt is made to give an exposure amount of, the exposure amount of G is about three times as large as B, which is excessive. In addition, compared to full-color reading, the read signal S
The / N quality may not be so required, and there is no major problem even if the exposure amount of G is reduced by half.

However, when a fluorescent lamp is used as an illumination light source, the exposure balance of the three colors R, G, and B is originally good, and the output of G may not be excessive. The case comes. Therefore, in such a case, by driving the signal charge obtained by exposing the photosensitive pixel row of G and the signal charge obtained by exposing the photosensitive pixel row of R, the driving is performed. The problem of half the exposure can be solved.

Therefore, in the intra-pixel transfer type three-line color CCD sensor according to the second embodiment, the signal charge obtained when the R photosensitive pixel row 51 and the G photosensitive pixel row 52 are exposed in two stages. The read operation will be described with reference to the operation explanatory diagrams of FIGS. 21 and 22 using the timing of FIG.

At time t10, a state is shown in which the R photosensitive pixel row 51 has completed two-stage exposure. Exit exposure in two stages, the gate pulse SH _R shift gate 59 becomes "H" level, which also drive pulse T _1A of the first transfer electrodes 61A of system A in the retracted storage register 54 in synchronization with "H" When the level reaches (time t11), the signal charges for two pixels by the two-stage exposure of the R photosensitive pixel row 51 (hereinafter, referred to as R).
The signal charges for two pixels of R are simply read out to the first transfer electrode 61A via the shift gate 59.

When both the gate pulse SH _R and the drive pulse T _1A become “L” level (time t12),
The signal charges for the two pixels of R are transferred to the first transfer electrode 61 of the B system.
B, and the drive pulse T _1A changes from “L” level → “H” level → “L” level until time t13, so that the drive pulse T _1A is transferred to the first transfer electrode 61B of the next B system. You. Thereafter, the gate pulse SH of the shift gate 59
_G goes to the “H” level, and in synchronization with this, the first
When the drive pulse T _1A of the transfer electrode 61A also becomes the “H” level (time t14), the signal charges for two pixels of the G photosensitive pixel row 52 are shifted to the R photosensitive pixel row 51, and at the same time, for two R pixels. Is transferred to the next first transfer electrode 61A.

[0084] Subsequently, when the gate pulse SH _R and the drive pulse T _1A is both "L" level (time t15),
The signal charges for two pixels of R are sequentially transferred to the first transfer electrode 61B of the next B system. Then, the drive pulse T _1A changes from “H” level to “L” level (at time t
16), signal charges for two pixels of R are further transferred to the first transfer electrode 61B of the next B system. Thereafter, when the drive pulse T _2A of the second transfer electrode 62A becomes “H” level (time t17), the signal charges for two pixels of R are transferred to the first transfer electrode 6.
1B to the second transfer electrode 62A. Time t18
Indicates a state in which signal charges for two pixels of R are stored in the second transfer electrode 62 </ b> A in the save accumulation register 54.

At time t19, the R and G photosensitive pixel rows 51,
Reference numeral 52 indicates a state in which exposure for a half of the horizontal transfer period (scanning period of the horizontal transfer registers 55 to 58) is performed again. Here, the R photosensitive pixel row 51 and the G photosensitive pixel row 52
There is a displacement of about one pixel on the sensor surface between the two positions, but between the period during which the R photosensitive pixel column 51 is exposed and the period during which the G photosensitive pixel column 52 is exposed, Since there is a movement of the imaging position corresponding to one pixel due to the movement of the mechanical scanning system, two different exposure periods and different color exposures are performed.
This is performed at almost the same position on the document surface.

In this state, the gate of shift gate 59
Auto pulse SH_RAnd the first transfer electrode 61A of the A system
Drive pulse T_1AAre both at "H" level (time t2
0), the signal charges for the two pixels of the R photosensitive pixel row 51 are shifted.
Is shifted to the first transfer electrode 61A via the gate 59.
You. Then, the gate pulse SH_RAnd drive pulse T _1A
Become "L" level (time t21), the two R
The elementary signal charges are transferred to the first transfer electrode 61B of the B system.
It is.

[0087] Then, the gate pulse SH _G of the shift gate 59 becomes "H" level, which the drive pulse T _1A of the first transfer electrodes 61A of synchronization with A lineage becomes the "H" level (time t22), In the latter half of the horizontal transfer period, the signal charges exposed in the G photosensitive pixel rows 52 are shifted to the R photosensitive pixel rows 51, and at the same time, the R signal charges are transferred to the first transfer electrodes 61A of the A system. The signal charges that have been exposed in the G photosensitive pixel row 52 in the latter half of the horizontal transfer period will be exposed in the R photosensitive pixel row 51 in the first half of the next horizontal transfer period, and at time t11 in FIG. And read out from the R photosensitive pixel row 51.

[0088] Thereafter, when the gate pulse SH _G and the drive pulse T _1A is both "L" level (time t23),
The signal charges for the two pixels of R are transferred to the first transfer electrode 6 next to the B system.
1B. Subsequently, when the drive pulse T _2A becomes “H” level (time t24), signal charges for two pixels of R are transferred from the first transfer electrode 61B to the second transfer electrode 62A. Time t25 corresponds to two lines that have been exposed to information for two colors at substantially the same position on the document surface.
This shows a state in which signal charges for pixels are stored in the second transfer electrode 62 </ b> A in the save accumulation register 54.

Next, the drive pulse T _2B for the second transfer electrode 62B of the B system goes to “H” level, and in synchronization with this, the horizontal transfer pulse φ1 of the first phase goes to “L” level (time t26). ), The signal charges for the four pixels set in the second transfer electrode 62A of the A system are changed to the second transfer electrodes 62 of the B system.
B. Thereafter, the transition of the drive pulse T _2B from the “L” level to the “H” level is repeated three times before time t27, thereby completing the horizontal transfer and emptying the four horizontal transfer registers 55 to 58. Then, signal charges for four pixels are transferred.

In the transfer operation of the signal charges of four pixels to the horizontal transfer registers 55 to 58, the horizontal transfer pulse φ1 of the first phase is also changed from the “H” level in synchronization with the drive pulse T _2B →
The “L” level transition is repeated. Therefore, the cycle of the horizontal transfer pulse φ1 at this time is the same as the drive pulse _T2B, and is longer than the cycle at the time of the normal horizontal transfer operation. Then, when the driving pulse T _2B becomes “L” level and the horizontal transfer pulse φ1 becomes “H” level (time t28), the transfer of the signal charges for four pixels to the horizontal transfer registers 55 to 58 is completed.

As described above, TDI (time delay & i
As in the case of the sensor of the integration type, the signal charges are moved between the R and G photosensitive pixel rows 51 and 52 in accordance with the movement of the image forming position, and the read signal charges of a plurality of colors are added and combined. As a result, the signal charge at the time of reading a monochrome image can be increased, so that it is possible to compensate for a decrease in the exposure amount when a fluorescent lamp is used as an illumination light source.

FIG. 23 shows a third embodiment according to the third embodiment of the present invention.
FIG. 2 is a structural diagram of a main part schematically showing a configuration of a line color CCD sensor. The color CCD sensor according to the present embodiment includes:
Of the signal charges stored in the R, G, and B three-color photosensitive pixel columns 71, 72, and 73, the R and G two-color photosensitive pixel columns 71, 72
Each signal charge 72 is read in the lower direction in the figure, and is transferred to the horizontal transfer registers 76 and 77 for each color through the save accumulation registers 74 and 75. The horizontal transfer registers 76 and 77 function to sequentially transfer the signal charges for one line and output them as a time-series signal. Note that B
Are read out in the upward direction in the figure, and are sequentially horizontally transferred by the horizontal transfer register 78.

More specifically, as shown in FIG. 24 for one block, a shift gate 81 for shifting a G signal charge includes a G photosensitive pixel column 72 and an R photosensitive pixel column 71.
And is provided between them. A shift gate 82 for shifting the R signal charge and the G signal charge transferred to the R photosensitive pixel column 71 via the shift gate 81 is connected to the R gate.
Is provided between the photosensitive pixel row 71 and the save accumulation register 74. Of the R and G signal charges transferred from the R and G photosensitive pixel columns 71 and 72 to the save accumulation register 74, G
Is transferred to the G horizontal transfer register 76 via the shift gate 83, and the R signal charge is guided to the G horizontal transfer register 76 via the shift gate 83.
Further, a save accumulation register 75 is provided via a shift gate 84.
, And further to the horizontal transfer register 77 of R via the shift gate 85.

Shift pulses SH1 to SH5 are applied to shift gates 81 to 85, respectively. The retraction storage registers 74 and 75 have storage electrodes 74a and 75a, respectively.
The storage electrodes 74a and 75a supply storage pulses ST1 and ST1, respectively.
ST2 is applied. Horizontal transfer register 76
Are transfer electrodes 76a, 76 having a two-layer structure for each block.
When the two-phase horizontal transfer pulses φ1 and φ2 are applied to the transfer electrodes 76a and 76b, the G signal charges are sequentially transferred horizontally and output as time-series signals.
Similarly, the horizontal transfer register 77 also has transfer electrodes 77a and 77b having a two-layer structure for each block, and two-phase horizontal transfer pulses φ1 and φ2 are applied to the transfer electrodes 77a and 77b, so that the R signal of R is applied. The signal charges are sequentially transferred horizontally and output as a time-series signal.

In the three-line color CCD sensor according to the third embodiment having the above structure, the G horizontal transfer register 76
, Two save accumulation registers 74 and 75
In this case, the R divided signal charges read out by dividing the exposure period into two periods are stored, and the two divided signal charges are recombined when reading the R signal charges to the R horizontal transfer register 77. By doing so, it is possible to adjust the exposure phase to obtain a read signal with the exposure period shifted from the G signal charge.

The three-line color C according to the third embodiment
Also in the CD sensor, similarly to the case of the second embodiment,
The signal charges of the R and G photosensitive pixel columns 71 and 72 can be combined and read out using a TDI sensor. Hereinafter, the operation of the three-line color CCD sensor according to the third embodiment in this case will be described with reference to the timing chart of FIG. 25 and the operation explanatory diagrams of FIGS. 26 and 27.

First, at time t0, the save accumulation register 7
4, the signal charges that have been exposed at the previous timing are accumulated.
The signal charges obtained by adding the exposure amounts of the photosensitive pixel columns 71 are accumulated. In the G photosensitive pixel column 72, signal charges exposed during the latter half of the horizontal transfer period are accumulated. Thereafter, when the accumulation pulse ST1 becomes “L” level and the shift pulse SH3 and the first-phase horizontal transfer pulse φ1 both become “H” level (period t1), the signal charges accumulated in the save accumulation register 74 become: Shift gate 8
3 to the G horizontal transfer register 76.

Next, when the shift pulse SH4 and the accumulation pulse ST2 are both at the “H” level and the first-phase horizontal transfer pulse φ1 is at the “L” level (period t2), the G horizontal signal is passed through the shift gate 84. The transfer is performed from the transfer register 76 to the save accumulation register 75. At this time, the shift pulse S
Since both H2 and the accumulation pulse ST1 are at "H" level, the signal charges of the R photosensitive pixel column 71 are shifted to the shift gate 8
2 to the save accumulation register 74.

Subsequently, when the accumulation pulse ST2 goes to the "L" level and the shift pulse SH5 and the first-phase horizontal transfer pulse φ1 both go to the "H" level (period t3), the evacuation accumulation from the G horizontal transfer register 76 is performed. The signal charge transferred to the register 75 is further transferred to the R horizontal transfer register 77 via the shift gate 85. At this time, the shift pulse SH1 and the shift pulse SH3 are both at the “H” level, so that the signal charges of the G photosensitive pixel row 72 exposed in the latter half of the horizontal transfer period are transferred to the R photosensitive by the shift gate 81. Simultaneously with the transfer to the pixel column 71, the signal charges of the save accumulation register 74 are transferred to the G horizontal transfer register 76 via the shift gate 83.

Thereafter, in the period t4, the horizontal transfer pulses φ1 and φ2 are applied to the G and R horizontal transfer registers 76 and 77, whereby the G and R horizontal transfer registers 76 and 7 are applied.
The signal charges transferred to each of the pixels 7 are sequentially transferred horizontally and output as time-series signals. In the first half of this horizontal transfer period, exposure is performed on the R and G photosensitive pixel columns 71 and 72, respectively. When the exposure in the period corresponding to the first half of the horizontal transfer period is completed, the signal charges in the G exposure period (exposure period until time t0) are subjected to exposure in the R photosensitive pixel column 71 shifted by one exposure period. The combined exposure is performed. Since the reading position moves by one line by performing the mechanical scanning during this period, the reading position and the reading timing are synchronized, and the same position on the document surface is read by the two-color photosensitive pixel rows 71 and 72. Can be. This is TDI
This is a sensor-like exposure.

Next, when the shift pulse SH2 goes to the “H” level (period t5), the R pixel T 71
The signal charge obtained by exposure as a DI sensor is transferred to the save accumulation register 74 via the shift gate 82. Subsequently, when the shift pulse SH1 becomes “H” level (period t6), the signal charges exposed by the G photosensitive pixel columns 72 during the first half of the horizontal transfer period are changed to the R photosensitive pixel columns 71.
In order to perform exposure in the latter half of the horizontal transfer period,
The data is transferred to the R photosensitive pixel row 71 via the shift gate 81. Thereafter, in the period t7, exposure is performed in the latter half of the horizontal transfer period, so that the TDI having a different reading position for one line is performed.
A read signal charge corresponding to two scanning lines subjected to sensor-like exposure, that is, a signal charge in the save accumulation register 74 and a signal charge in the R photosensitive pixel column 71 are obtained.

By the above series of operations, the signal charges of the R and G photosensitive pixel columns 71 and 72 can be combined and read out by a TDI sensor. Since the end point of the period t7 is the same timing as the time point t0, the signal charges of the two scanning lines are transferred to the two horizontal transfer registers 76 and 77.
The reading speed is twice as fast as that in the color mode by reading out in parallel using.

In the present embodiment, the two save accumulation registers 7 existing with the G horizontal transfer register 76 interposed therebetween.
In a three-line color CCD sensor having a structure capable of adjusting the exposure phase, the R, G
Although a case has been described in which the operation of combining and reading out the signal charges of the signals 1 and 72 as a TDI sensor is performed, it is not necessary to provide the save accumulation register 75 as long as this operation is performed.

In this embodiment, for the sake of simplicity, in the color mode, signal charges are read out using one horizontal transfer register for each color. However, in the case of the second embodiment, As shown in FIG.
In order to perform high-speed reading by dividing the signal charges of 1, 72, and 73 into two systems of odd-numbered pixels and even-numbered pixels, it is a matter of course that a structure having two horizontal transfer registers per color may be used. is there. FIG. 28 shows the structure in this case as G
Of the horizontal transfer register 76 and the evacuation accumulation registers 74 and 75 on both sides thereof. FIG. 29 shows a specific structure of one block.

In FIGS. 28 and 29, an odd-numbered horizontal transfer register 76o and an even-numbered horizontal transfer register 76e are provided adjacent to each other, and two save accumulation registers 74 and 75 are arranged on both sides thereof. A shift gate 83o is provided between the save accumulation register 74 and the horizontal transfer register 76o, and a shift gate 83e is provided between the horizontal transfer register 76o and the horizontal transfer register 76e, and between the horizontal transfer register 76e and the save accumulation register 75. Shift gates 84 are provided, respectively.

In FIG. 29, similarly, an odd-numbered horizontal transfer register 77o is provided outside the save accumulation register 75.
And an even-numbered horizontal transfer register 77e are provided adjacent to each other. A shift gate 85o is provided between the save accumulation register 75 and the horizontal transfer register 77o, and a shift gate 85e is provided between the horizontal transfer register 77o and the horizontal transfer register 77e.

Next, the operation of the three-line color CCD sensor having the above structure having two horizontal transfer registers per color will be described with reference to the timing chart of FIG.
The operation will be described with reference to FIG. The shift gates 83o and 83e are provided with shift pulses SH3o and SH3e.
However, horizontal transfer pulses φ1go and φ2go are supplied to the horizontal transfer registers 76o of the odd-numbered system of G, and horizontal transfer pulses φ1ge and φ2g are supplied to the horizontal transfer registers 76e of the even-numbered system of G.
e are respectively applied.

First, in the period t0, since the accumulation pulse ST1 is at the "H" level, the signal charge is accumulated in the save accumulation register 74. From this state, the accumulation pulse ST1 is "L" and the shift pulse SH3o is "H".
Level, and in synchronization with this, the horizontal transfer pulse φ2go of the second phase of the horizontal transfer register 76o of the odd number system becomes “H”.
Level, the signal charges of the even-numbered pixels are first transferred to the odd-numbered horizontal transfer registers 76 through the shift gate 83o.
o (period t1).

Subsequently, when the shift pulse SH3e and the horizontal transfer pulse φ2ge of the second phase of the even-numbered horizontal transfer register 76e go to the “H” level, the even-numbered data once read out to the odd-numbered horizontal transfer register 76o The signal charges of the pixels are transferred to the even-numbered horizontal transfer registers 76e via the shift gate 83e (period t2). At this time, the accumulation pulse ST1 is at the “H” level and the shift pulse S
Since H3o transitions to the “L” level, the signal charges of the odd-numbered pixels that have moved to the position of the shift gate 83o are returned to the save accumulation register 74, where they are accumulated again.

Next, the accumulation pulse ST1 goes low and the shift pulse SH3o goes high, and in synchronization with this, the first-phase horizontal transfer pulse φ1go of the odd-numbered horizontal transfer register 76o goes high. As a result, the signal charges of the odd-numbered pixels are read out to the odd-numbered horizontal transfer registers 76o via the shift gate 83o (period t3). As described above, the signal charges of the odd-numbered pixels are set in the horizontal transfer registers 76o of the odd-numbered G system, and the signal charges of the even-numbered pixels are set in the horizontal transfer registers 76e of the even-numbered G system.

On the other hand, the signal charges set in the two odd-numbered / even-numbered horizontal transfer registers 76o and 76e of G are further transferred to the two odd-numbered and even-numbered R horizontal transfer registers 77o and 77e.
In the case of moving to 7e, the following operation is continuously performed.
That is, the horizontal transfer pulse φ2ge of the second phase of the horizontal transfer register 76e of the even-numbered system becomes “L” level, and in synchronization with this, the shift pulse SH4 and the accumulation pulse ST2
Are both at "H" level, first, the signal charges of the even-numbered pixels set in the horizontal transfer registers 76e of the even-numbered G system are transferred to the save accumulation register 75 via the shift gate 84 (period t4).

Subsequently, the odd-numbered horizontal transfer registers 76
Both the horizontal transfer pulse φ1go of the first phase o and the shift pulse SH4 become “L” level, and in synchronization with this, the shift pulse SH3e and the horizontal transfer pulse φ1ge of the first phase of the even-numbered horizontal transfer register 76e become “H”. Level, the signal charges of the odd-numbered pixels set in the horizontal transfer registers 76o of the odd-numbered G system are temporarily transferred via the shift gate 83e to the horizontal transfer registers 7 of the even-numbered G system.
6e (period t5).

Next, the shift pulse SH3e and the horizontal transfer pulse φ1ge of the first phase of the even-numbered horizontal transfer register 76e both transition to the “L” level, and in synchronization with this, the shift pulse SH4 changes to the “H” level. Then, the signal charge of the odd pixel once transferred to the horizontal transfer register 76e of the even-numbered system of G is transferred to the save accumulation register 75 via the shift gate 84 (period t6). By the above, odd number
This means that the signal charges of the even-numbered pixels have been accumulated in the save accumulation register 75. From this state, the above-described t1 to t3
Is performed, the signal charges of the odd-numbered / even-numbered pixels are transferred to the two odd-numbered / even-numbered horizontal transfer registers 77o,
77e.

As described above, the save accumulation register 74,
When a monochrome high-speed mode for reading a monochrome image at high speed is realized in a three-line color CCD sensor with an intra-pixel transfer system having a 75, the effect of high-speed reading is achieved by adopting a structure having two systems of horizontal transfer registers for each color. It can be demonstrated even more.

By the way, in order to obtain good image quality by performing the operation of the TDI sensor, it is necessary that the gap between the photosensitive pixel rows of each color performing the operation of the TDI sensor is one line interval. However, in the case of the third embodiment, it is difficult to exactly realize a one-line pitch because the shift gate 81 exists between the R photosensitive pixel column 71 and the G photosensitive pixel column 72. Actually, the line interval is 1.2 to
It will be about 2.0 lines. There are few problems with about 1.2 lines, but when there are about 1.5 lines,
This is equivalent to reading a long photosensitive pixel row in the sub-scanning direction, and the resolution is reduced.

When the reading magnification is changed by the zoom function, a problem also occurs when the resolution of the sub-scanning changes. As a countermeasure against this, the resolution is also affected when the data is read at the same magnification when stored in the image memory, and digital magnification is performed in both main scanning and sub-scanning. In such a case, it may be better to read in a single color as in the first and second embodiments. However, based on the sensor structure according to the third embodiment, by slightly changing the configuration,
Double-speed reading of a single color becomes possible. Hereinafter, the fourth embodiment will be described.

FIG. 32 shows a third embodiment according to the fourth embodiment of the present invention.
FIG. 2 is a structural diagram of a main part schematically showing a configuration of a line color CCD sensor. FIG. 33 shows a specific structure of one block. The structure of the present embodiment is basically the third
Since the structure is the same as that of the embodiment, FIGS.
, The same parts as those in FIGS. 23 and 24 are denoted by the same reference numerals. In the present embodiment, in addition to the basic structure of the third embodiment, a two-stage save accumulation register 74A, 7 is provided between the R photosensitive pixel column 71 and the G horizontal transfer register 76.
4B and a structure in which a reset gate 79 and a drain 80 for discarding charges are provided outside the R horizontal transfer register 77. Reset gate 79
Is applied with a reset gate pulse φ _RG .

Next, the operation of the three-line color CCD sensor according to the fourth embodiment having the above configuration will be described with reference to the timing chart of FIG. 34 and the operation explanatory diagrams of FIGS. At the time point t0 when the horizontal transfer is completed, the R and G two-color signal charges exposed in the first half of the horizontal transfer period are accumulated in the evacuation accumulation registers 74A and 74B, and are exposed in the second half of the horizontal transfer period. The color signal charges are still in the R and G photosensitive pixel columns 71 and 72.

From this state, both the accumulation pulse ST1B and the accumulation pulse ST2 transit to the "L" level, and in synchronization with this, the first phase of the horizontal transfer registers 76 and 77 of the shift pulses SH3 and SH5 and G and R are synchronized. Horizontal transfer pulse φ
When 1g and φ1r become “H” level, the signal charges accumulated in the evacuation accumulation register 74B are shifted to the shift gate 83.
And the signal charges accumulated in the save accumulation register 75 are transferred to the R horizontal transfer register 77 via the shift gate 85 (period t1).

Next, the horizontal transfer register 76 for the accumulation pulse ST1A, shift pulses SH3 and SH5, and G and R,
Both the horizontal transfer pulses φ1g and φ1r of the first phase at 77 transition to “L” level, and in synchronization with this, the shift pulse S
H2B, accumulation pulse ST1B, shift pulse SH4, when the reset gate pulse phi _RG and accumulated pulse ST2 becomes "H" level, saving the stored signal charges of the save storage register 74A via the shift gate 82B register 7
4B, the signal charges of the G horizontal transfer register 76 are transferred to the save accumulation register 75 via the shift gate 84 (period t2). At this time, the signal charges of the R horizontal transfer register 77 are discarded to the drain 80 via the reset gate 79.

[0121] Subsequently, the shift pulse SH2B, accumulated pulse ST1B, shift pulses SH4, transitions the reset gate pulse phi _RG and accumulated pulse ST2 are both "L" level, the shift pulse SH2A In synchronization with this, the storage pulse ST1A, Shift pulses SH3, SH5 and G, R
When the horizontal transfer pulses φ1g and φ1r of the first phase of the horizontal transfer registers 76 and 77 become “H” level, the signal charges of the R photosensitive pixel column 71 are stored in the backup storage register 74A via the shift gate 82A. The signal charges of the register 74B are transferred to the G horizontal transfer register 76 via the shift gate 83, and the signal charges of the save accumulation register 75 are transferred to the R horizontal transfer register 77 via the shift gate 85 (period t3).

Next, shift pulse SH2A, accumulation pulse ST1A, shift pulses SH3, SH5 and G, R
The horizontal transfer pulses φ1g and φ1r of the first phase of the horizontal transfer registers 76 and 77 of FIG. 1 both transition to the “L” level, and in synchronization with this, the shift pulses SH1 and SH2B and the accumulation pulse S
T1B, shift pulse SH4, reset gate pulse φ
_{When RG} and the accumulation pulse ST2 become “H” level, G
The signal charges of the photosensitive pixel row 72 of FIG. 7 are transferred to the R photosensitive pixel row 71 via the shift gate 81, the signal charges of the save accumulation register 74A are saved to the save accumulation register 74B of the G storage transfer register 82 via the shift gate 82B. The signal charges are respectively transferred to the save accumulation registers 75 (period t4). At this time, the signal charges of the R horizontal transfer register 77 are discarded to the drain 80 via the reset gate 79.

Subsequently, shift pulses SH1, SH2B,
Accumulation pulse ST1B, shift pulses SH4, transitions the reset gate pulse phi _RG and accumulated pulse ST2 are both "L" level, the shift pulse SH2A In synchronization with this,
When the horizontal transfer pulses φ1g and φ1r of the first phase of the horizontal transfer registers 76 and 77 for the accumulation pulse ST1A, shift pulses SH3 and SH5, and G and R become “H” level, R
Is stored in the save accumulation register 74A via the shift gate 82A.
The B signal charge is transferred to the G horizontal transfer register 76 via the shift gate 83, and the signal charge of the save accumulation register 75 is transferred to the R horizontal transfer register 77 via the shift gate 85 (period t5).

Thus, in the period from t1 to t5,
The signal charges of the R and G photosensitive pixel columns 71 and 72 obtained by exposing in the first half of the horizontal transfer period accumulated in the evacuation accumulation registers 74A and 74B are respectively transferred in the vertical direction, and the R photosensitive pixels are The signal charges in the column 71 are discarded to the drain 80 through the R horizontal transfer register 77, and the signal charges in the G photosensitive pixel column 72 are set in the R horizontal transfer register 77.

Next, the shift pulse SH2A, the accumulation pulse ST1A, the shift pulses SH3, SH5, and the horizontal transfer pulse φ1g of the first phase of the horizontal transfer register 76 all shift to “L” level, and in synchronization with this, When the shift pulse SH2B, the accumulation pulse ST1B, the shift pulse SH4, and the accumulation pulse ST2 become “H” level, the signal charge of the save accumulation register 74A is transferred to the save accumulation register 74B via the shift gate 82B, and the G horizontal transfer register 76 is The signal charge is transferred to the save accumulation register 75 via the shift gate 84 (period t6).

Subsequently, the shift pulse SH2B, the accumulation pulse ST1B, and the shift pulse SH4 all transit to the "L" level. In synchronization with this, the first phase horizontal transfer of the horizontal transfer register 76 for the shift pulses SH3 and G is performed. When the pulse φ1g becomes “H” level, the save accumulation register 74
The signal charge stored in B is transferred to the G horizontal transfer register 76 via the shift gate 83 (period t7).

Thus, in the period from t3 to t7,
The signal charges obtained by exposing in the second half of the horizontal transfer period and remaining in the photosensitive pixel columns 71 and 72 are respectively transferred in the vertical direction, and the signal charges in the G photosensitive pixel columns 72 are transferred to the G horizontal transfer register 76. The signal charge of the R photosensitive pixel column 71 is set to the position of the save accumulation unit 75. This signal charge is discarded in the drain 80 in the next cycle.
During the period from t0 to t2, the signal charge discarded in the drain 80 is obtained by exposing in the latter half of the horizontal transfer period,
The signal charge of the R photosensitive pixel column 71 read one cycle before, and corresponds to the charge saved in the save accumulation unit 75 in the period t6.

Thereafter, in the next horizontal transfer period (period t8), the exposed signal charges are again supplied to the R and G photosensitive pixel columns 71,
72. Then, when the shift pulse SH2A and the accumulation pulse ST1A become “H” level, the signal charges of the R photosensitive pixel column 71 are transferred to the save accumulation unit 74A via the shift gate 82A (period t9). Next, both the shift pulse SH2A and the accumulation pulse ST1A transition to the “L” level, and in synchronization with this, the shift pulse S
When the H1, SH2B and the accumulation pulse ST1B become “H” level, the signal charges of the G photosensitive pixel row 72 are transferred to the R photosensitive pixel row 71 via the shift gate 81, and the evacuation and accumulation section 7 is stored.
The signal charges of 4A are respectively transferred to the evacuation accumulation units 74B via the shift gates 82B (period 10).

Subsequently, when both the shift pulses SH1 and SH2B transit to the "L" level, and the shift pulse SH2A and the accumulation pulse ST1A attain the "H" level in synchronism therewith, the signal charges of the R photosensitive pixel column 71 become R. Is transferred to the evacuation accumulation unit 74A via the shift gate 82A (period t1).
1). Thereafter, if the exposure of the latter half of the horizontal transfer period is performed, the state returns to the state at time t0, and only the signal charges of the G photosensitive pixel column 72 are divided into two exposure periods by repeating the above series of operations. And two horizontal transfer registers 76 and 7
7 allows reading.

As described above, in the three-line color CCD sensor, the two-stage save / store sections 74A and 74B are provided between the R photosensitive pixel row 71 and the G horizontal transfer register 76, and the R horizontal transfer register is provided. By providing a reset gate 79 and a drain 80 for discarding electric charges outside the pixel 77, the G pixel array 7 in the monochrome mode is provided.
Only two signal charges can be divided into two exposure periods, and two lines of signal charges can be read in one scanning period (horizontal transfer period). The signal charges of two lines of R unnecessary in this operation are collected and drained during the horizontal transfer pause period, which has only one exposure period, using the save accumulation unit 75 and the newly added save accumulation unit 74B as buffers. Since it can be discarded to 80, it does not hinder reading of the G signal charge.

In the first to fourth embodiments described above, the case of performing double-speed reading by setting two exposure periods in one horizontal transfer period using sensors for two colors has been described. The sensor according to the present invention is a 3-line color CC
Since the sensor is a D sensor, it is possible to perform triple-speed reading by setting three exposure periods in one horizontal transfer period and performing parallel reading with three horizontal transfer registers.
Hereinafter, the fifth embodiment will be described.

FIG. 38 shows a third embodiment according to the fifth embodiment of the present invention.
FIG. 2 is a structural diagram of a main part schematically showing a configuration of a line color CCD sensor. Since the structure of the present embodiment is basically the same as the structure of the fourth embodiment, FIG.
2 are denoted by the same reference numerals. In the present embodiment, in addition to the basic structure of the fourth embodiment, as in the case of the R side, two stages of evacuation storage units 86A and 86B are provided between the B photosensitive pixel array 73 and the G horizontal transfer register 78. , B are provided with a drain 87 outside the horizontal transfer register 78. The illustration of the shift gate and the like is omitted for simplicity.

As described above, the signal charges of the G photosensitive pixel column 72 are transferred to the R photosensitive pixel column 71 side as well as the B photosensitive pixel column 73.
Side, and the R photosensitive pixel row 71 described in the fourth embodiment is read on the B photosensitive pixel row 73 side.
In the same manner as the operation on the side, the B signal charges read during the exposure and the G signal charges obtained by exposing for 1/3 of the horizontal transfer period are saved in the save accumulation units 86A and 86B. By discarding unnecessary R and B signal charges to the drains 80 and 87 on both sides, G divided into three exposure periods
Are output in parallel using the horizontal transfer registers 76, 77, and 78 for the three colors R, G, and B, so that triple-speed reading can be realized.

FIG. 39 shows a third embodiment according to the sixth embodiment of the present invention.
FIG. 2 is a structural diagram of a main part schematically showing a configuration of a line color CCD sensor. In FIG. 39, three photosensitive pixel rows 91, 92, and 93 in which a large number of photoelectric conversion elements (pixels) such as photodiodes are linearly arranged are, for example, three colors of R, G, and B from the bottom of the figure. Are arranged in close proximity to each other. In these photosensitive pixel rows 91, 92, and 93, color filters (not shown) corresponding to R, G, and B, respectively, are arranged on a light receiving surface. It is converted into an amount of signal charge and stored.

R, G, B photosensitive pixel rows 91, 9 of three colors
2 and 93, on one side thereof, each photosensitive pixel row 9
Horizontal transfer registers 94, 95, and 96 for horizontally transferring the signal charges read from 1, 92, and 93;
On the other side, a photosensitive pixel row 97 to which no color filter is provided (hereinafter, referred to as a W (white) photosensitive pixel row) 97 is provided. Further, between the B photosensitive pixel row 93 and the W photosensitive pixel row 97, R, G, and B photosensitive pixel rows 91, 92, and 9 are provided.
Evacuation accumulation unit 9 for two lines for accumulating signal charges of read lines in the first half and middle half of the exposure period divided into three
8,99 are provided.

The R, G, B photosensitive pixel rows 91, 9
Drains 100 and 101 for discharging (discarding) unnecessary charges are provided on the outermost sides on both sides of the second and the second 93. Between each of the photosensitive pixel rows 91, 92, and 93, between each of the horizontal transfer registers 94, 95, and 96, and to the evacuation accumulation unit 9
8, 99; between the R photosensitive pixel row 91 and the horizontal transfer register 96 of B; between the B photosensitive pixel row 93 and the save accumulation section 98; between the save accumulation section 99 and the W photosensitive pixel row 97; A shift gate is arranged between the horizontal transfer register 94 and the drain 100 and between the W photosensitive pixel column 97 and the drain 101, but these shift gates and the like are not shown for simplicity.

Next, a reading operation of the three-line color CCD sensor according to the sixth embodiment having the above configuration will be described. First, in the normal color mode, the W photosensitive pixel row 9
7 is discarded to the drain 101, while R,
Each of the signal charges of the photosensitive pixel rows 91, 92, and 93 of the three colors G and B is transferred to a corresponding horizontal transfer register 94, using a shift gate (not shown) as in the above-described embodiments.
95, 96, and these horizontal transfer registers 94,
95 and 96 for output.

On the other hand, in the monochrome high-speed mode, the signal charges of the W photosensitive pixel array 97 are read out to the save accumulation sections 98 and 99 every ３ exposure time, and at the end of one horizontal transfer scanning period, R and R are read. G, B photosensitive pixel rows 91, 92,
Each of the signal charges 93 is discarded to the drain 100, and the signal charges accumulated in each of the two evacuation accumulation sections 98 and 99 and the signal charges of the W photosensitive pixel array 97 for three lines are converted into three. Book horizontal transfer registers 94, 95, 96
The data is transferred using a shift gate or the like (not shown), and transferred and output by the horizontal transfer registers 94, 95, and 96.

As described above, according to the three-line color CCD sensor according to the sixth embodiment, reading at triple speed can be realized as in the case of the fifth embodiment. In the case of the fifth embodiment, a G photosensitive pixel row having a large amount of exposure is originally used, but there is a concern that the exposure amount becomes insufficient because the exposure time is reduced to 1/3. On the other hand, in the present embodiment, since the monochrome photosensitive pixel row 97 is provided in addition to the three color photosensitive pixel rows 91, 92, and 93, the sensitivity of the monochrome photosensitive pixel row 97 is reduced by the absence of the color filter. Therefore, when combined with a color lamp such as a halogen lamp, there is an advantage that the exposure amount can be increased because the wavelength in the entire visible region can be received.

Also in the monochrome high-speed mode, finally, the signal charges for three lines are output by using the three horizontal transfer registers 94, 95, 96 of R, G, B to read the color. Because the processing circuit for
Ultra-high-speed reading of a monochrome image can be realized without changing the processing speed of each processing circuit and without lowering the S / N of the read signal.

Note that when switching between the full-color mode and the monochrome high-speed mode, there is a change in the exposure amount, so that it is necessary to change the amplifier gain and offset level of the analog circuit section, and a conversion characteristic curve (LUT).
It is necessary to rewrite the shading correction data and the shading correction data, but these can be appropriately executed by the CPU controlling the processing circuit unit based on the mode switching signal.

In the first to sixth embodiments described above, the signal charge of the photosensitive pixel row located at the center of the three photosensitive pixel rows is read through the inside of the adjacent photosensitive pixel row. Although a case where a line color CCD sensor is used has been described as an example, a feature of the present invention is that a signal charge is converted into a time-series image from a photosensitive pixel array that photoelectrically converts image information for a plurality of colors into a signal charge. A vertical transfer path to a horizontal transfer register for a plurality of colors to be read out as a signal is shared for the transfer of the signal charges of a plurality of colors, and the signal charges subjected to the exposure shift operation during the horizontal transfer period are saved and stored. Because it has a register, the color CCD sensor does not necessarily need to have a structure employing the intra-pixel transfer method. Hereinafter, an example in which a color CCD sensor having another structure is used will be described.

FIG. 40 is a structural diagram of a main part schematically showing the structure of a color CCD sensor according to the seventh embodiment of the present invention. The color CCD sensor according to the present embodiment includes two photosensitive pixel arrays 1 for R / G and B provided adjacent to each other.
11 and 112, and the photosensitive pixel array 112 of B on the upper side of the figure.
The pixel pitch of the R / G photosensitive pixel array 111 is set to be twice as large as the pixel pitch (the pitch of photoelectric conversion elements such as photodiodes). R / G color filters (not shown) are alternately arranged on the R / G photosensitive pixel column 111, and light-shielding portions 113R and 113G are provided to shift the reading center of gravity in the sub-scanning direction. I have. FIG.
It is an enlarged view of this photosensitive pixel shape.

With this photosensitive pixel shape, the pitch of each color of the R / G photosensitive pixel row 111 is the same as that of the B photosensitive pixel row 112, and the R / G sampling centroid is set by the presence of the light shielding portions 113R and 113G. It will be shifted in the sub-scanning direction. Color CCD with this photosensitive pixel shape
The sensor intentionally set the deviation of the sampling centroid between R and G to 0.5 pixels of the sampling pitch in the main scanning direction in order to combine with the chromatic dispersion prism for line gap correction in the optical system. Things.

In the color CCD sensor according to the present embodiment, the R / G signal charges photoelectrically converted and accumulated by the R / G photosensitive pixel array 111 are read out to the lower side of the figure, and the save accumulation register is read. The signals are transferred to the horizontal transfer registers 116 and 117 of one system for each color through
Is read out to the horizontal transfer register 118 on the upper side of the figure, where the B signal charges photoelectrically converted and accumulated by the photosensitive pixel array 112 are stored. Horizontal transfer registers 116 and 11
Reference numerals 7 and 118 serve to sequentially transfer signal charges for one line of each color and output them as time-series signals.

More specifically, as shown in FIG. 42 for one block, shift gates 121 and 122 for shifting G and R signal charges are provided by R / G photosensitive pixel columns 11.
It is provided between each of the G and R pixels and the save accumulation register 114. Of the G and R signal charges transferred to the save accumulation register 114 via the shift gates 121 and 122, the G signal charge is guided to the G horizontal transfer register 116 via the shift gate 123, and Is transferred to the G horizontal transfer register 116 via the shift gate 123, further guided to the save accumulation register 115 via the shift gate 124, and further to the R horizontal transfer register 117 via the shift gate 125. Led to. Unnecessary signal charges can be discharged from the R horizontal transfer register 117 to the drain 127 via the shift gate 126.

To shift gates 121 to 126, shift pulses SH1 to SH6 are applied, respectively. The evacuation accumulation registers 114 and 115 are respectively provided with accumulation electrodes 114a and 11a.
5a, and storage pulses ST1 and ST2 are applied to these storage electrodes 114a and 115a, respectively. The horizontal transfer register 116 has two layers of transfer electrodes 116a and 116b for each block.
The two-phase horizontal transfer pulses φ1G and φ2G are applied to the terminals a and 116b to sequentially transfer the G signal charges horizontally and output them as a time-series signal. Horizontal transfer register 117
Similarly, the transfer electrode 117 having a two-layer structure is provided for each block.
a, 117b, and these transfer electrodes 117a, 117b.
By applying the two-phase horizontal transfer pulses φ1R and φ2R to b, the signal charges of R are horizontally transferred in order and output as a time-series signal.

In the above-structured color CCD sensor,
Since the signal charges of R and G are read from the lower part of the pixel (photoelectric conversion element) adjacent to each other to the horizontal transfer registers 116 and 117 existing below the figure, the vertical transfer path is It is inevitably shared for the transfer of the R and G signal charges. In this manner, the R / G photosensitive pixel column 111 to the G and R horizontal transfer registers 116 and 117 are used.
The vertical transfer path (the save accumulation register 114 and the shift gate 123) to the common part after the part where the shift gate 121 and the shift gate 122 merge with the save accumulation register 114;
Further, by providing the save accumulation register 114 to temporarily accumulate the signal charges exposed for a half cycle of the horizontal transfer, the monochrome double speed reading mode can be set by switching the pulse control conditions. .

Next, the operation of the color CCD sensor according to the seventh embodiment having the above structure in the case of realizing the monochrome double speed mode will be described with reference to the timing chart of FIG. 43 and FIGS. It will be described with reference to FIG. In FIGS. 44 to 46, the mark Ｒ indicates the signal charge of R, and the mark ● indicates the signal charge of G.

At time t0, the horizontal transfer operation for one cycle is completed. At this time, since the accumulation pulse ST1 is at the “H” level and the potential of the save accumulation register 114 is in a deep state, the save accumulation register 1
14 stores G signal charges for the first half cycle of the R / G photosensitive pixel column 111. Similarly, the accumulation pulse ST2
Is also at the “H” level, and the potential of the save accumulation register 115 is in a deep state. Therefore, the signal charge of R in the previous exposure cycle is accumulated in the save accumulation register 115.

From this state, the accumulation pulses ST1, ST2
To the "L" level, and in synchronization with this, the horizontal transfer register 11 for the shift pulses SH3, SH5 and G, R
6,117 horizontal transfer pulses φ1G, φ1R of the first phase
Both transition to the “H” level, so that the G and R signal charges accumulated in the save accumulation registers 114 and 115 are shifted through the shift gates 123 and 125 respectively.
Are transferred below the transfer electrodes 116a, 117a of the first phase of the horizontal transfer registers 116, 117 of the first embodiment.

Next, shift pulses SH3, SH5 and horizontal transfer pulses φ1G, φ1R both transition to “L” level, and in synchronization with this, shift pulses SH2, SH4, SH
When H6 and the accumulation pulses ST1 and ST2 both transition to the “H” level, the signal charges for the first half cycle of G stored in the G horizontal transfer register 116 are shifted by the shift gate 1
The data is transferred to the save / accumulation register 115 via the reference numeral 24. At this time, the signal charges of R in the previous exposure cycle, which have been stored in the horizontal transfer register 117 of R, are discharged to the drain 127 via the shift gate 126. At the same time, the newly exposed R signal charge is read out to the save accumulation register 114 via the shift gate 122 (period t1).

Next, shift pulses SH2, SH4, S
H6 and the accumulation pulses ST1 and ST2 both transition to "L" level, and in synchronization with this, the shift pulses SH3 and SH
5 and the first-phase horizontal transfer pulses φ1G and φ1R of the G and R horizontal transfer registers 116 and 117 both transition to the “H” level, whereby the first half cycle of G stored in the save accumulation register 115 is obtained. Is transferred below the first-phase transfer electrode 117a of the horizontal transfer register 117 of R via the shift gate 125, and the newly exposed signal charge of R read out to the save accumulation register 114 is Is transferred below the first-phase transfer electrode 116a of the G horizontal transfer register 116 via the shift gate 123 (period t2).

Next, the shift pulses SH3, SH5 and the horizontal transfer pulse φ1G of the first phase of the horizontal transfer register 116 both transition to the “L” level, and in synchronization with this, the shift pulses SH1, SH4 and the accumulation pulse are synchronized. ST1, S
When both T2 transition to “H” level, the newly exposed R signal charges of the horizontal transfer register 116 are transferred to the save accumulation register 115 via the shift gate 124,
At the same time, signal charges for the second half cycle of G of the R / G photosensitive pixel column 111 are read out to the save accumulation register 114 via the shift gate 121 (period t3).

Then, both shift pulses SH1 and SH4 and accumulation pulse ST1 transition to "L" level, and in synchronization with this, both shift pulse SH3 and horizontal transfer pulse .phi.1G of the first phase of horizontal transfer register 116 are changed. The transition to the “H” level causes the save accumulation register 11
4 is transferred to the G horizontal transfer register 116 via the shift gate 123.
The transfer is performed below the transfer electrode 116a of the phase (period t
4). As a result, R, G, G,
A series of read / vertical transfer operations to the R horizontal transfer registers 116 and 117 are completed.

Next, at time t5, the two-phase horizontal transfer pulses φ1G and φ2G and the horizontal transfer pulse φ1
The horizontal transfer operation of each of the G and R horizontal transfer registers 116 and 117 is started when R and φ2R are generated at a predetermined cycle. Then, half of this horizontal transfer period (half of the standard exposure period) elapses, and at the elapse time t6, the shift gate SH1 transitions to the “H” level. As a result, the signal charges for the first half cycle of G of the R / G photosensitive pixel column 111 are transferred to the save accumulation register 1 via the shift gate 121.
14 (period t7). Then, at the time point t8 when the horizontal transfer and exposure for the remaining half cycle have been performed and the operation is completed, the state returns to the time point t0.

Next, the operation for implementing normal color reading will be described with reference to the timing chart of FIG. 47 and the operation explanatory diagrams of FIGS. 48 and 49. In FIGS. 48 and 49, similarly to FIGS. 44 to 46, a circle indicates a signal charge of R, and a black circle indicates a signal charge of G, respectively.

At time t0, the horizontal transfer has been completed. From this state, when the shift pulse SH2 transitions to the “H” level, the accumulation pulse ST1 is already at the “H” level at this point, and the potential of the save accumulation register 114 is in a deep state. The signal charges of R in the column 111 are read out to the save accumulation register 114 via the shift gate 122 (period t1).

Next, both shift pulse SH2 and accumulation pulse ST1 transition to "L" level, and in synchronization with this, shift gate SH3 transitions to "H" level. Since the horizontal transfer pulse φ1G of the phase is at “H” level, the signal charges of R read out to the save accumulation register 114 are transferred via the shift gate 123 to the first phase of the horizontal transfer register 116 of G. Transferred under the electrode 116a (period t
2).

Next, both shift pulse SH3 and horizontal transfer pulse φ1G transition to “L” level, and in synchronization with this, shift pulse SH1, SH4 and accumulation pulse ST
1 transitions to the "H" level, the accumulation pulse ST2 is already at the "H" level, and the potential of the save accumulation unit 115 is in a deep state.
The 16 R signal charges are transferred to the save accumulation register 115 via the shift gate 124, and at the same time, the G signal charges of the R / G photosensitive pixel column 111 are read out to the save accumulation register 114 via the shift gate 121. (Period t
3).

Next, both shift pulses SH1 and SH4 and accumulation pulses ST1 and ST2 transition to "L" level, and in synchronization with this, horizontal transfer of shift pulses SH3, SH5 and G in the first phase of horizontal transfer register 116 is performed. When both the pulses φ1G transit to the “H” level, the first-phase horizontal transfer pulse φ1R of the R horizontal transfer register 117 is already at the “H” level, and the potential under the first-phase transfer electrode 117a is deep. , The signal charge of R of the save accumulation register 115 is transferred via the shift gate 125 to the transfer electrode 11 of the first phase of the horizontal transfer register 117 of R.
7a, and the G signal charges simultaneously read out to the save accumulation register 114 are transferred to the first-phase transfer electrode 1 of the G horizontal transfer register 116 via the shift gate 123.
It is transferred below 16a (period t4).

Thus, the signal charges of the respective read colors are set in the G and B horizontal transfer registers 116 and 117. Then, both the shift pulses SH3 and SH5 transition to the “L” level, and in synchronization with this, both the accumulation pulses ST1 and ST2 transition to the “H” level, and thereafter the two-phase horizontal transfer pulses φ1G, When the φ2G and the horizontal transfer pulses φ1R and φ2R are generated at a predetermined cycle, the horizontal transfer operation of the G and R horizontal transfer registers 116 and 117 starts (period t5). The timing at which this horizontal transfer operation ends is the timing at the next time t0.

As described above, a color CCD sensor having a photosensitive pixel shape having a configuration in which the deviation of the sampling center of gravity between R and G is intentionally set to 0.5 pixels of the sampling pitch in the main scanning direction is used. In some cases, 2
The horizontal transfer register 11 of two colors from the photosensitive pixel row 111 of two colors
6 and 117, and a save accumulation register 114, which accumulates signal charges for half-cycle exposure,
By providing the 115, the monochrome high-speed mode can be switched between the two modes only by changing the driving condition of the sensor, and can read twice the number of lines during one exposure period of the color reading mode. realizable.

The color CCD sensor according to the seventh embodiment is a special-purpose sensor combined with a color separation prism. The photosensitive pixel shape is not limited to the photosensitive pixel shape of the color CCD sensor according to the seventh embodiment as long as the photosensitive pixel shape is read out to the transfer path. For example, the photosensitive pixel shapes shown in FIGS. 50 to 52 may be used.

The shape of the photosensitive pixels shown in FIG. 50 is different from that of the ordinary three-line color CCD sensor in that the photosensitive pixel rows 111A of R / G are arranged so that the photosensitive pixel rows of three colors are equally spaced in the sub-scanning direction. The light-shielding portions 131R and 131G are formed so as to overlap at the center of the light receiving surface of each pixel in the main scanning direction. When a color CCD sensor having this photosensitive pixel shape is used, the color registration between the read colors is digitally corrected using an image memory.

In the photosensitive pixel shape shown in FIG. 51, the light-shielding portion for the R pixel is eliminated in the R / G photosensitive pixel row 111B so that the sensitivity of G is increased.
, The pixel area of G is increased by widening the width of the pixel. The photosensitive pixel shape shown in FIG. 52 is generated in the case of the photosensitive pixel shapes shown in FIGS. 50 and 51.
In order to eliminate “difference between the G and R sampling centroids in the main scanning direction” and “occurrence of moiré due to narrowing of the sampling window”, the R pixel is inclined obliquely in the R / G photosensitive pixel row 111C. Configuration.

Also in the photosensitive pixel shape of each of these modified examples (FIGS. 50 to 52), similarly to the photosensitive pixel shape according to the seventh embodiment (see FIG. 41), pixels of two colors are alternately arranged at the bottom in the drawing. 40, the signal charges are transferred to a common vertical transfer path via separate shift gates for the photosensitive pixel columns according to the seventh embodiment shown in FIG. Can be. Therefore, similarly to the color CCD sensor according to the seventh embodiment, it is possible to realize a monochrome high-speed mode capable of reading twice the number of lines during one exposure period in the color reading mode.

In the first to seventh embodiments described above, a three-line color CCD sensor having R, G, and B photosensitive pixel rows is used as a reading sensor. A save storage register for temporarily storing the stored signal charges is provided, and a plurality of exposure periods are set during one horizontal transfer period for a specific color photosensitive pixel row to obtain a plurality of systems of image information, thereby obtaining a high-speed monochrome image. Although the case of realizing the mode has been described as an example, the basic principle of the present invention is to obtain a plurality of systems of image information by setting a plurality of exposure periods during one horizontal transfer period for a photosensitive pixel row of a specific color. The basic idea is not limited to application to a color CCD sensor, but is similarly applicable to a monochrome (black and white) CCD sensor. Hereinafter, a case where a monochrome CCD sensor is used as a reading sensor will be described.

FIG. 53 is a schematic configuration diagram showing an eighth embodiment of the present invention. In FIG. 53, there is provided one black-and-white photosensitive pixel row 141 in which a large number of photoelectric conversion elements (pixels) such as photodiodes are linearly arranged, and this photosensitive pixel row 141 receives incident light in pixel units. The signal charges are converted into signal charges corresponding to the light quantity and stored. Photosensitive pixel row 1
For example, on one side of 41, a save accumulation register 142 for temporarily saving the signal charges of the photosensitive pixel array 141.
And first and second signals for horizontally transferring the signal charges read from the photosensitive pixel row 141 via the save accumulation register 142.
The second horizontal transfer registers 143 and 144 are arranged in order.

A shift gate 145 is provided between the photosensitive pixel array 141 and the save accumulation register 142, between the save accumulation register 142 and the first horizontal transfer register 143, and between the first and second horizontal transfer registers 143 and 144. , 14
6,147 are arranged respectively. Further, charge-voltage converters 148 and 149 having, for example, a floating diffusion amplifier configuration are provided adjacent to each end of the first and second horizontal transfer registers 143 and 144 on the transfer destination side. These charge-voltage converters 148, 149
Converts the signal charges sequentially transferred in pixel units by the horizontal transfer registers 143 and 144 into a signal voltage and outputs the signal voltage.

To the gate electrodes of shift gates 145, 146, and 147, shift pulses φSH1, φSH2, and φSH3 generated by pulse generation circuit 150 are applied at appropriate timings.
In 1, the photoelectrically converted and stored signal charges are read. Therefore, the exposure period of the photosensitive pixel row 141 is determined by the application timing of the shift pulse φSH1. First and second horizontal transfer registers 143 and 144
Are driven by two-phase horizontal transfer pulses φ1 and φ2 similarly generated by the pulse generation circuit 150.

In the monochrome CCD sensor having the above configuration, the reading speed is determined by the transfer speed of the horizontal transfer registers 143 and 144. In the present embodiment, a configuration is adopted in which a high-speed reading mode for reading a monochrome image at high speed can be selectively set in addition to the normal reading mode. That is,
When a three-line color CCD sensor is used as a reading sensor, the exposure period is set to twice, for example, twice during one horizontal transfer period for the photosensitive pixel array 141, as in the case of realizing the monochrome high-speed mode. Are transferred to the first and second horizontal transfer registers 14
3, 144 to transfer and output in parallel.

The setting of the normal reading mode / high-speed reading mode is performed by the mode setting circuit 151. When each mode is set by the mode setting circuit 151,
A mode switching signal corresponding to the mode is supplied to pulse generation circuit 150. The pulse generation circuit 150 receives the mode switching signal and shift pulses φSH1, φS
H2, φSH3, that is, the shift gate 14
Each mode is realized by controlling the respective drive timings of 5, 146 and 147.

Here, when the normal reading mode is set, shift pulse φSH1 is output from pulse generation circuit 150 in a cycle of one horizontal transfer period, and shift gate 1
45 is applied to the gate electrode. Thus, the exposure period of the photosensitive pixel row 141 is set to the same length as one horizontal transfer period. Then, the signal charges read from the photosensitive pixel array 141 pass through the save accumulation register 142, are shifted to the first horizontal transfer register 143, are horizontally transferred by the horizontal transfer register 143, and are further transferred to the charge-voltage converter 148. Is converted into a signal voltage and output as image information.

On the other hand, when the high-speed reading mode is set, shift pulse φSH 1 is output from pulse generation circuit 150 at, for example, a half cycle of one horizontal transfer period, and applied to the gate electrode of shift gate 145. You. As a result, the signal charge readout operation for the photosensitive pixel column 141 is performed twice in one horizontal transfer period, so that the exposure period is set twice in one horizontal transfer period.

The signal charges obtained during the first half of the exposure period are once saved in the save accumulation register 142 once they are read from the photosensitive pixel array 141. After the signal charges have been read out during the first half of the exposure period, the second half of the exposure is performed in the photosensitive pixel row 141. When reading out the signal charges in the latter half of the exposure period, the signal charges in the first half of the exposure period which have been once saved in the save accumulation register 142 are shifted to the second horizontal transfer register 144 through the first horizontal transfer register 143. In synchronization with this, the signal charges in the latter half of the exposure period are shifted to the first horizontal transfer register 143 through the save accumulation register 142.

As described above, the signal charges in the first half of the exposure period are temporarily saved in the save accumulation register 142, and the signal charges in the second half of the exposure period are shifted to the first horizontal transfer register 143. By simultaneously shifting the signal charges to the second horizontal transfer register 144, the signal charges in the first half exposure period and the signal charges in the second half exposure period are synchronized. The signal charges in the first half of the exposure period and the signal charges in the second half of the exposure period are stored in the horizontal transfer registers 144, 1
43, the data is horizontally transferred in parallel at the same timing, and further converted into signal voltages by the charge-voltage converters 149 and 148, respectively, and output as two-system image information.

As described above, the photosensitive pixel row 141, the save accumulation register 142, and the two-system horizontal transfer register 1
In a monochrome CCD sensor having 43 and 144,
During one horizontal transfer period, for example, 2
Exposure time is set, and each signal charge obtained in the two exposure periods is transferred to two horizontal transfer registers 143 and 144.
, The horizontal transfer registers 143, 1
Since the signal charges of the photosensitive pixel array 141 can be read at twice the limit speed of the horizontal transfer period determined by the transfer speed of 44 and the number of transfer electrode stages, a high-speed reading mode twice as fast as the normal reading mode can be realized. .

In the present embodiment, the signal charges during the first half of the exposure period and the signal charges during the second half of the exposure period are synchronized using the save accumulation register 142, and the two systems of horizontal transfer registers 144 and 143 are used at the same timing. The horizontal transfer is performed in parallel, but it is not always necessary to perform the horizontal transfer. The signal charges of the first half of the exposure period during the second half of the exposure period are transferred from the save accumulation register 142 to the second horizontal transfer register 14.
4 and the horizontal transfer is also possible. This can be similarly applied to the above-described embodiments.
However, simultaneous output in parallel at the same timing has the advantage that the timing control in an external signal processing system becomes easier and the circuit configuration can be simplified accordingly.

In the present embodiment, the save accumulation register 142 and the two horizontal transfer registers 143 and 144 are used.
Is provided only on one side of the photosensitive pixel row 141,
It is also possible to adopt a configuration provided on both sides of the photosensitive pixel row 141 to distribute the signal charges of the even-numbered pixels and the signal charges of the odd-numbered pixels of the photosensitive pixel row 141 to both sides of the photosensitive pixel row 141 to perform horizontal transfer. As a result, higher speed can be achieved.

In the case of the CCD sensor according to each of the embodiments described above, high-speed reading can be realized by having the save accumulation register. However, the CCD sensor (solid-state imaging device) according to the present invention described below is High-speed reading can be realized without having a save accumulation register.

FIG. 54 is a schematic configuration diagram showing a ninth embodiment of the present invention. In FIG. 54, a single monochrome (black and white) photosensitive pixel row 161 is provided in which a large number of photoelectric conversion elements (pixels) such as photodiodes are linearly arranged, and the photosensitive pixel row 161 is provided in pixel units. The incident light is converted into a signal charge having a charge amount corresponding to the light amount and stored.
For example, two systems of first and second horizontal transfer registers 162 and 163 for horizontally transferring signal charges read from the photosensitive pixel column 161 are arranged on both sides of the photosensitive pixel column 161.

The shift gates 164 and 165 are arranged between the photosensitive pixel row 161 and the first and second horizontal transfer registers 162 and 163, respectively. The shift gates 164 and 165 are provided for each pixel with respect to the photosensitive pixel row 161, and alternately transfer the signal charges of all the pixels of the photosensitive pixel row 161 for each exposure period to the first and second horizontal transfer registers 162. , 163. Each end of the first and second horizontal transfer registers 162 and 163 on the transfer destination side is provided with, for example, a charge-to-voltage converter 166 or 167 having a floating diffusion amplifier configuration.
Are provided adjacent to each other. These charge-voltage converters 16
6, 167 converts the signal charges sequentially transferred in pixel units by the horizontal transfer registers 162, 163 into signal voltages and outputs them.

Shift pulses .phi.SH1 and .phi.SH2 generated by pulse generating circuit 168 are applied to respective gate electrodes of shift gates 164 and 165 at appropriate timings, thereby, as shown in FIG. At 161, the signal charges of all the pixels that have been photoelectrically converted and accumulated are read. Therefore, the exposure period of the photosensitive pixel column 161 is determined by the application timing of the shift pulses φSH1 and φSH2. The horizontal transfer registers 162 and 163 are similarly driven by two-phase horizontal transfer pulses φ1 and φ2 generated by the pulse generation circuit 168.

In the monochrome CCD sensor having the above configuration, the reading speed is controlled by the first and second horizontal transfer registers 16.
It is determined by the transfer speed of 2,163. The present embodiment also has a configuration in which a high-speed reading mode for reading a monochrome image at high speed can be selectively set in addition to the normal reading mode.

In the normal reading mode, an exposure period having the same length as one horizontal transfer period is set for the photosensitive pixel row 161.
The signal charge obtained during this exposure period is read out, transferred, and output to only one of the first and second horizontal transfer registers 162, 163, for example, only the first horizontal transfer register 162. On the other hand, in the high-speed reading mode, the exposure period is set to, for example, two times in one horizontal transfer period for the photosensitive pixel row 161, and each signal charge obtained in the two exposure periods is set for each exposure period. The first and second horizontal transfer registers 162 and 163 are alternately read and alternately transferred and output.

The setting of the normal reading mode / high-speed reading mode is performed by the mode setting circuit 169. When each mode is set by the mode setting circuit 169,
A mode switching signal corresponding to the mode is supplied to pulse generation circuit 168. The pulse generation circuit 168 receives the mode switching signal and shift pulses φSH1, φS
Each timing of H2, that is, shift gates 164 and 165
Each mode is realized by controlling the respective drive timings.

Here, when the normal reading mode is set, shift pulse φSH1 is output from pulse generating circuit 168 in a cycle of one horizontal transfer period, and shift gate 1
64 are applied to the gate electrodes. Thus, the exposure period of the photosensitive pixel column 161 is set to the same length as one horizontal transfer period. Then, signal charges of all pixels obtained by photoelectric conversion in the photosensitive pixel row 161 during this exposure period are read out to the first horizontal transfer register 162 by the shift gate 164, and are horizontally transferred by the horizontal transfer register 162. Further, the charge-voltage converter 166 converts the signal voltage into a signal voltage and outputs the signal voltage as image information.

On the other hand, when the high-speed reading mode is set, shift pulses .phi.SH1 and .phi.SH2 having a period of one horizontal transfer period are shifted from each other by a half phase from pulse generating circuit 168, as shown in the timing chart of FIG. And output to the shift gates 164 and 165 alternately. As a result, the photosensitive pixel column 161
Read operation of the signal charge is performed two times in one horizontal transfer period.
Times, the exposure period is 2 during one horizontal transfer period.
Times.

The signal charges of all the pixels obtained in the first half of the exposure period (exposure periods 1, 3, 5,... In the figure) are obtained by applying shift pulse φSH2 to the gate electrode of shift gate 165. , From the photosensitive pixel column 161 to the second horizontal transfer register 163. After the signal charges have been read out during the first half of the exposure period, the second half of exposure is performed in the photosensitive pixel column 161 subsequently. Then, the signal charges of all the pixels obtained in the latter half of the exposure period (exposure periods 2, 4, 6,... In the figure) are applied to the photosensitive pixels by applying the shift pulse φSH1 to the gate electrode of the shift gate 164. The data is read from the column 161 to the first horizontal transfer register 162.

The signal charges of the first half of the exposure period read by the second horizontal transfer register 163 are horizontally transferred by the second horizontal transfer register 163 during the latter half of the exposure period and the subsequent first half of the exposure period. Voltage converter 167
Is converted to a signal voltage. Further, the signal charges in the latter half of the exposure period read out to the first horizontal transfer register 162 are:
The horizontal transfer is performed by the first horizontal transfer register 162 during the first half exposure period of the next one horizontal transfer period and the subsequent second half exposure period, and further converted into a signal voltage by the charge-voltage converter 166. Thereby, the charge-voltage converter 16
From 6,167, two systems of image information based on the signal charges of two scanning lines in each exposure period set twice in one horizontal transfer period are derived.

As described above, two pixels are provided on both sides of the photosensitive pixel row 161.
In a monochrome CCD sensor having first and second horizontal transfer registers 162 and 163,
The shift gates 164 and 165 are provided for each pixel of the photosensitive pixel row 161 between 1 and the horizontal transfer registers 162 and 163, and, for example, two exposure periods are set for the photosensitive pixel row 161 during one horizontal transfer period. Each signal charge obtained during these exposure periods is transferred to two horizontal transfer registers 16.
2 and 163 alternately, and by sharing and transferring the data by the horizontal transfer registers 162 and 163, twice the limit speed of the horizontal transfer cycle determined by the transfer speed of the horizontal transfer registers 162 and 163 and the number of transfer electrode stages. Since the signal charges of the photosensitive pixel row 161 can be read at a high speed,
A high-speed reading mode that is twice as fast as the normal reading mode can be realized.

FIG. 57 is a schematic configuration diagram showing a modification of the ninth embodiment. In this modification, the first and second horizontal transfer registers 162 and 163
6, 167, for example, two transfer paths 16
2-1, 162-2, 163-1, and 163-2, respectively, and accordingly, the charge-voltage converters 166 and 167 are also provided two by two for the horizontal transfer registers 162 and 163, that is, for the horizontal transfer registers 162. Transfer path 16 of two final transfer stages
2-1 and 162-2, two charge-voltage converters 166-
1 and 166-2, and two charge-voltage converters 167-1 and 167-2 are provided for the transfer paths 163-1 and 163-2 of the two final transfer stages of the horizontal transfer register 163, respectively. It has a configuration.

In the monochrome CCD sensor according to the modified example of the ninth embodiment, the horizontal transfer register 16
2, since the horizontal transfer register 162 is divided into two systems near the final stage, the signal charges of the odd-numbered pixels and the even-numbered pixels are divided at the branch portion. , And transferred to two charge-voltage converters 166-1 and 166-2 via two transfer paths 162-1 and 162-2, respectively. By being converted into a signal voltage at 166-2, the signal voltage is output as image information of two systems of odd pixels / even pixels. The same applies to the horizontal transfer register 163.

As described above, in the monochrome CCD sensor according to the ninth embodiment, the first and second horizontal transfer registers 162 and 163 are branched into two systems in the vicinity of the final transfer stage, respectively, so that the charge-voltage conversion output unit is provided. By parallelizing, the transfer period to the charge-voltage converters 166 and 167 can be made sufficiently long, and higher speed can be achieved. In addition, since the image is divided for each pixel in both the main scanning direction (the arrangement direction of the photosensitive pixel rows) and the sub-scanning direction (the direction orthogonal to the main scanning direction), four systems are provided for one photosensitive pixel row 161. Despite the configuration, the difference in output characteristics for each processing system appears on the image, but the pixel period is very short, one pixel cycle, and image unevenness is more conspicuous than in the method of dividing into four in the main scanning direction. It becomes difficult.

FIG. 58 shows the structure of image data (read data) read by the monochrome CCD sensor according to the modification of the ninth embodiment. As is clear from the drawing, the output system differs for each pixel in both the main scanning and the sub-scanning. In other words, it can be seen from the structure of the read data that the difference in the output characteristics for each processing system on the read data occurs in one pixel cycle.

FIG. 59 is a schematic diagram showing the tenth embodiment of the present invention, in which a three-line color CCD sensor is constructed using the basic principle of the CCD sensor according to the ninth embodiment. In FIG. 59, three photosensitive pixel rows 171, 172, and 173 in which photoelectric conversion elements (pixels) such as photodiodes are arranged in a straight line have a predetermined line interval L that is equal to each other. R,
They are arranged in order corresponding to the three colors G and B, respectively.
In the photosensitive pixel rows 171, 172, 173, color filters (not shown) corresponding to R, G, and B, respectively, are arranged on the light receiving surface. It is converted into an amount of signal charge and stored.

The three photosensitive pixel rows 171, 172, 173
Of the G photosensitive pixel column 172 and its peripheral structure,
The structure of the CCD sensor according to the ninth embodiment is applied. That is, two horizontal transfer registers 174 and 175 are arranged on both sides of the G photosensitive pixel column 172.
Then, the photosensitive pixel column 172 and the two horizontal transfer registers 1
Shift gates 176 and 177 are arranged between 74 and 175, respectively. These shift gates 176,
177 is provided for each pixel with respect to the photosensitive pixel column 172, and the signal charges of all the pixels of the photosensitive pixel column 172 are alternately read to the horizontal transfer registers 174 and 175 every exposure period.

On the other hand, each of the other two colors, that is, one side of the R and B photosensitive pixel rows 171 and 173, for example, the R photosensitive pixel row 17
1, the horizontal transfer register 17 is located on the lower side of the drawing, and the photosensitive pixel column 173 of B is located on the upper side of the drawing.
8,179 are arranged. Also, the photosensitive pixel column 171
Between the horizontal transfer register 178 and the photosensitive pixel row 17
3 and the horizontal transfer register 179, the shift gate 1
80 and 181 are arranged respectively.

At each end on the transfer destination side of the horizontal transfer registers 174 and 175 on both sides of the G photosensitive pixel column 172, for example, charge-voltage converters 182 and 183 having a floating diffusion amplifier configuration are provided adjacent to each other. ing.
Charge-to-voltage converters 184 and 185 having the same configuration are provided adjacent to the ends of the horizontal transfer registers 178 and 179 on one side of the R and B photosensitive pixel columns 171 and 173, respectively. I have. These charge-voltage converters 182, 183,
184, 185 are horizontal transfer registers 174, 175,
The signal charges sequentially transferred in pixel units by 178 and 179 are converted into signal voltages and output.

Shift gates φSH _G1 and φSH generated by pulse generation circuit 186 are applied to the gate electrodes of shift gates 176 and 177 and shift gates 180 and 181, respectively.
_G2 and shift pulse .phi.SH _R, .phi.SH _B is applied at an appropriate timing, respectively, thereby the photosensitive pixel columns 172 and R of G, in the photosensitive pixel rows 171 and 173 of the B photoelectric conversion and accumulated signal charges of all pixels Is read. The horizontal transfer registers 174, 175, 1
Transfers 78 and 179 are similarly driven by two-phase horizontal transfer pulses φ1 and φ2 generated by the pulse generation circuit 186.

In the three-line color CCD sensor according to the tenth embodiment having the above structure, a monochrome high-speed mode for reading a monochrome image at high speed can be set in addition to the normal color mode. In normal color mode,
R, G, B three photosensitive pixel rows 171, 172, 173
, An exposure period having the same length as one horizontal transfer period is set. The signal charges obtained during this exposure period are shown in FIG.
0 (A), the R and B photosensitive pixel columns 171, 1
73 is read out and transferred to the horizontal transfer registers 178 and 179, respectively, and output. For the G photosensitive pixel column 172, the two horizontal transfer registers 17
4, 175, for example, only the horizontal transfer register 174 is read, transferred, and output.

In contrast, in the monochrome high-speed mode,
The exposure period is set, for example, twice in one horizontal transfer period for the G photosensitive pixel column 172, and each signal charge obtained in the two exposure periods is used as shown in FIG. The two horizontal transfer registers 174 and 175 alternately every period
, And alternately transfer and output. The image information based on the signal charges obtained from the G photosensitive pixel column 172 is used as monochrome image information.

At this time, the R and B photosensitive pixel rows 171, 1
For 73, the same operation as in the normal color mode is performed, but their image information is not used. Therefore,
A shift gate and a drain are arranged on the side of the R and B horizontal transfer registers 178 and 179 opposite to the photosensitive pixel columns 171 and 173, and the signal charges read out to the horizontal transfer registers 178 and 179 are not horizontally transferred, and the shift gates May be discharged to the drain via the.

The mode setting of the normal color mode / monochrome high-speed mode is performed by the mode setting circuit 187. When each mode is set by the mode setting circuit 187, a mode switching signal corresponding to the mode is supplied to the pulse generation circuit 186. Pulse generation circuit 1
86 receives the mode switching signal and receives a shift pulse φ.
SH _G1 , φSH _G2 and shift pulses φSH _R , φSH
Each mode is realized by controlling each timing of _B , that is, each driving timing of the shift gates 176 and 177 and the shift gates 180 and 181.

Here, the operation in each of the normal color mode / monochrome high-speed mode will be described. First,
The operation of the normal color mode will be described with reference to the timing chart of FIG. 61. When the normal color mode is set, the pulse generation circuit 187 outputs shift pulses φSH _R , φSH _G1 , φSH _G1 ,. φSH
_B is output and applied to the respective gate electrodes of the shift gates 180, 176 and 181. Thus, the exposure periods of the R, G, and B photosensitive pixel columns 171, 172, and 173 are set to the same length as one horizontal transfer period.

During this exposure period, each photosensitive pixel row 17
1, 172, 173, are read out by the shift gates 180, 176, 181 to the horizontal transfer registers 178, 174, 179, respectively.
9 and the charge-voltage converter 18
4, 182, 185, which are converted into signal voltages and R, G, B
Are output as image information.

Next, the operation in the monochrome high-speed mode will be described with reference to the timing chart of FIG. When the monochrome high-speed mode is set, the pulse generation circuit 187 outputs the shift pulse φS in the cycle of one horizontal transfer period.
H _R, φSH _G1, is output .phi.SH _B, shift gate 1
80, 176, 181 and these shift pulses φSH _R , φSH _G1 , φSH
Shift pulse φSH of the same cycle shifted by half a phase with respect to _B
G2 is output and applied to the gate electrode of shift gate 177.

Thus, for the G photosensitive pixel column 172, the signal charge readout operation is performed twice in one horizontal transfer period, so that the exposure period is set twice in one horizontal transfer period. Become. R and B photosensitive pixel rows 171 and 17
For 3, the signal charge readout operation is performed in the same cycle as one horizontal transfer period, as in the case of the normal color mode. That is, one horizontal transfer period is one exposure period.

Here, the R and B photosensitive pixel rows 171, 17
3, the same operation as in the normal color mode is performed. However, for the G photosensitive pixel column 172, all pixels obtained during the first half of the exposure period (in the drawing, the exposure periods 1a, 2a, 3a,. Is applied to the gate electrode of the shift gate 177 by the shift pulse φSH _G2.
Is read out from the photosensitive pixel row 172 to the horizontal transfer register 175. After the signal charges have been read out during the first half of the exposure period, the second half of exposure is performed in the photosensitive pixel column 172 subsequently. The signal charges of all the pixels obtained in the latter half of the exposure period (exposure periods 1b, 2b, 3b,... In the figure) are exposed to light by applying the shift pulse φSH _G1 to the gate electrode of the shift gate 176. The data is read from the pixel column 172 to the horizontal transfer register 174.

The signal charges of the first half of the exposure period read out by the horizontal transfer register 175 are horizontally transferred by the horizontal transfer register 175 during the latter half of the exposure period and the subsequent first half of the exposure period. Converted to voltage. The signal charges in the second half of the exposure period read by the horizontal transfer register 174 are horizontally transferred by the horizontal transfer register 174 during the first half of the next one horizontal transfer period and the subsequent second half of the exposure period. The voltage is converted to a signal voltage by the voltage conversion unit 182. As a result, from the charge-voltage converters 183 and 182, two types of image information based on the signal charges of two scanning lines in each exposure period set twice in one horizontal transfer period are derived.

As described above, in the three-line color CCD sensor, two systems of horizontal transfer registers 174 and 175 are provided on both sides of the G photosensitive pixel row 172, and between the photosensitive pixel row 172 and the horizontal transfer registers 174 and 175. Shift gates 176, 17 for each pixel of the photosensitive pixel row 172.
7, and two exposure periods, for example, are set in one horizontal transfer period for the photosensitive pixel row 172, and each signal charge obtained in these exposure periods is alternately transferred to two horizontal transfer registers 174 and 175. And the horizontal transfer registers 174 and 175 share and transfer the photosensitive pixel rows at twice the limit speed of the horizontal transfer cycle determined by the transfer speed of the horizontal transfer registers 174 and 175 and the number of transfer electrode stages. Since 172 signal charges can be read, a monochrome high-speed mode twice as fast as the normal color mode can be realized.

FIG. 63 is a schematic diagram showing an eleventh embodiment of the present invention. Since the basic configuration of the eleventh embodiment is the same as the configuration of the tenth embodiment, FIG.
The same parts as those in FIG. 59 are denoted by the same reference numerals.

The three-line color CCD sensor according to the eleventh embodiment comprises three R, G, and B photosensitive pixel rows 17.
1, 172, 173 are arranged with a predetermined line interval, and two horizontal transfer registers 174, 175 are provided on both sides of the G photosensitive pixel column 172.
The horizontal transfer register 175 located between the G photosensitive pixel row 172 and the B photosensitive pixel row 173 is used to transfer the signal charge of the G photosensitive pixel row 172 in the monochrome high-speed mode and the B photosensitive level in the normal color mode. The configuration is also used for transferring the signal charges of the pixel column 173.

To realize this, the photosensitive pixel row 1 of B
Shift gate 181 for reading out the signal charge of 73
Are provided between the photosensitive pixel column 173 and the horizontal transfer register 175. In monochrome high-speed mode,
When the horizontal transfer register 175 is used for transferring the signal charge of the G photosensitive pixel column 172, the B photosensitive pixel column 17
3 cannot be read out to the horizontal transfer register 175. Since the signal charges of the photosensitive pixel array 173 of B in this mode are unnecessary charges in this mode, a shift gate for discharging the signal charges is used. 188 and drain 1
89 is the horizontal transfer register 17 of the B photosensitive pixel row 173
5 is provided on the opposite side.

On the other hand, pulse generation circuit 187 outputs shift pulses φSH _G1 , φSH _G2 and shift pulse φSH.
Shift pulses φSH _B1 and φSH _B2 are generated in addition to _R. Of these shift pulses φSH _B1 and φSH _B2 , shift pulse φSH _B1 is supplied to shift gate 181.
The shift pulse φSH _B2 is applied to a shift gate 188 located between the B photosensitive pixel column 173 and the drain 189. The normal color mode and the monochrome high-speed mode are set according to the generation timings of the shift pulses φSH _G1 and φSH _G2 and the shift pulses φSH _B1 and φSH _B2 .

Note that while the shift pulse φSH _SH is applied, the horizontal transfer pulses φ1 and φ2 need to be stopped. However, the horizontal transfer pulses φ1 and φ2 are set in advance at the timing when the switching of the shift pulse φSH _SH is predicted. , The same signal can be commonly used for the horizontal transfer pulses φ1 and φ2. Further, there is no induction of the shift pulse φSH _{SH on} the video output.

Here, the operation of reading signal charges in the normal color mode and the monochrome high-speed mode will be described with reference to the operation explanatory diagram of FIG. The difference between this read operation and the read operation in the tenth embodiment is that, as apparent from the comparison with the operation explanatory diagram of FIG.
The reading operation of the signal charges of the photosensitive pixel column 173 of B is in progress. That is, in the operation in the normal color mode (A),
The signal charges of the B photosensitive pixel column 173 are transferred to the shift gate 181.
Is read out to the horizontal transfer register 175 through the pixel transfer section 175. In the monochrome high-speed mode (B) operation, the B photosensitive pixel row 173 is read.
Of the drain 18 via the shift gate 188.
9 is discharged.

According to this structure, in addition to the effect of the tenth embodiment, the horizontal transfer register 175 is also used for transferring the signal charges of the B photosensitive pixel array 173 in the normal color mode, and the horizontal transfer register Charge voltage detector is 1
Since the number of systems can be reduced and the configuration can be simplified, the size of the entire sensor can be reduced as compared with the color CCD sensor according to the tenth embodiment, and downsizing can be achieved.

FIG. 65 is a timing chart of the normal color mode, and FIG. 66 is a timing chart of the monochrome high-speed mode. In the normal color mode, the shift pulses φSH _R , φSH _G1 , φSH _B1 are generated at equal intervals, and the shift pulses φSH _G2 , φSH _B2 are not generated, so that the R, G, B three-color photosensitive pixel row 17 is generated.
Exposure periods of 1,172,173 are set at equal intervals (one horizontal scanning period), and signal charges obtained by photoelectric conversion in the respective photosensitive pixel columns 171,172,173 are read. At this time,
The signal charge of the photosensitive pixel column 173 of B is, as described above,
The data is read out to the horizontal transfer register 175 via the shift gate 181.

On the other hand, in the monochrome high-speed mode, shift pulses φSH _R , φSH _G1 , and φSH _B2 are generated at equal intervals, and shift pulse φSH _G2 is shifted by half a phase from these shift pulses φSH _R , φSH _G1 , and φSH _B2. Occurs and the shift gate φSH _B1 is not generated. By doing so, the interval between the exposure samples of the G photosensitive pixel row 172 becomes twice the pitch of the normal color mode.
The doubled information amount is read by the horizontal transfer registers 174 and 175.

Thus, shift pulse φSH_G2You
And shift pulse φSH_B1, ΦSH _B2Each occurrence of timing
By switching the setting of each pixel, one photosensitive pixel row 1
72 operation mode to switch to full color reading mode
(Normal color mode) and monochrome high-speed reading mode
Can be In addition, the reading color used for reading is
Reads twice as fast as G, which has more exposure than other colors
Minimizes the effect of S / N reduction when exposure is reduced by half
Can be limited.

FIG. 67 is a schematic configuration diagram showing a modification of the eleventh embodiment. This modification corresponds to a modification of the ninth embodiment (see FIG. 57). That is,
Until the three horizontal transfer registers 174, 175, and 178 reach the charge-voltage converters 182, 183, and 184, for example, two transfer paths 174-1, 174-2, 175-1, and 1
75-2, 178-1, and 178-2, and two charge-voltage converters 182, 183, and 184 are provided for the horizontal transfer registers 174, 175, and 178 accordingly.

That is, two transfer paths 174-1 and 174-2 of the final transfer stage of the two systems of the horizontal transfer register 174
The charge-voltage converters 182-1 and 182-2 are connected to the transfer paths 175-1 and 175-1 of the two final transfer stages of the horizontal transfer register 175.
Two charge-voltage converters 183-1 and 183-1 are provided for 175-2.
3-2 is a configuration in which two charge-voltage converters 184-1 and 184-2 are provided for the transfer paths 178-1 and 178-2 of the two final transfer stages of the horizontal transfer register 178, respectively. Has become.

As described above, the three horizontal transfer registers 17
By branching the vicinity of each of the final transfer stages of 4,175,178 into two systems and paralleling the output units for performing charge-voltage conversion, the effect of increasing the speed of the present sensor can be further enhanced. However, there is a concern that the configuration will be complicated due to the doubling of the output system. However, the horizontal transfer register 175 is also used for transferring the signal charges of the B photosensitive pixel array 173 in the normal color mode. In the case where the present invention is applied to the eleventh embodiment, even if the output units are parallelized, the sensor output units need only have six systems similar to a normal three-line color sensor, and the current configuration can be maintained.

In the monochrome high-speed mode, unevenness due to the difference in the characteristics of the output system on the image occurs for each pixel in both main scanning and sub-scanning, as shown in FIG. Since no unevenness occurs, a unique effect that the unevenness on the image is less noticeable is obtained.

By the way, the transfer rate limit in the case where one system of the charge-voltage converter is connected to one horizontal transfer register is said to be 20 MHz. Can speed up to 30 MHz. This transfer rate is slower than paralleling horizontal transfer registers (20 MHz × 2 = 40 MHz equivalent), but is about 160 mm / sec in terms of the reading linear velocity when a sensor of 7,500 pixels is used. When the monochrome high-speed mode is set, the linear speed is 320 mm /
In seconds, a reading speed comparable to that of an analog high-speed copying machine can be obtained. This speed is the speed when the horizontal transfer registers are simply parallelized (about 210 mm / sec).
The reading speed is 1.5 times faster than the reading speed.

Next, an outline of the structure of an image reading apparatus using the color CCD sensors according to the first to seventh embodiments and the tenth and eleventh embodiments as reading sensors will be described. FIG. 68 is a block diagram illustrating an example of a configuration of a processing system of a color image reading device using the color CCD sensor according to each of the embodiments.

In FIG. 68, the color CCD sensor 21
0 is driven by the sensor driver 220. The sensor driver 220 includes a timing generation circuit 221.
Supply various timing pulses. Color C
The R, G, and B image signals output from the CD sensor 210 are supplied to DC cut circuits 222R, 222G, and 222B. DC cut circuits 222R, 222G, 222
B cuts a DC component for canceling temperature fluctuations and the like from the R, G, and B image signals.

The DC cut circuits 222R, 222G,
The R, G, and B image signals that have passed through 222B are
3R, 223G, 223B via synchronous ground circuit 224
R, 224G and 224B. Synchronous grounding circuit 2
24R, 224G, and 224B perform operations for DC reproduction and securing a black level during a dummy pixel period in each of the R, G, and B image signals. The dummy pixel period is a period of a light-shielded pixel portion which is read out prior to the effective pixel after the operation of the shift pulse, and assuming that the output of the dummy pixel portion is substantially equal to the black reading level, the DC reproduction is performed on the image of the dummy pixel portion This is realized by performing a clamp operation so that the signal level becomes the same as the ground level. Therefore, R,
A timing signal indicating a dummy pixel portion in each of the G and B image signals is transmitted from the timing generation circuit 221 to the synchronous ground circuit 22.
4R, 224G, and 224B.

Synchronous grounding circuits 224R, 224G, 224
The analog image signals of R, G, and B passing through B are A / D
After being converted into R, G, and B digital image signals by the converters 225R, 225G, and 225B, predetermined shading correction is performed by a shading correction circuit 226, and then color registration is corrected by a delay circuit 227. When the image signal output from the color CCD sensor 210 is divided into three systems of three colors of R, G, and B and two systems of even-numbered pixels and odd-numbered pixels, the A / D converter is not shown. A synthesizing circuit for synthesizing pixel signals of the even-numbered pixels and the odd-numbered pixels is provided at a stage preceding the 225R, 225G, and 225B.

Further, any one of the normal color mode / exposure phase adjustment mode / monochrome high-speed mode in the first to seventh embodiments, or the normal color mode / monochrome high-speed mode in the tenth and eleventh embodiments is selected. There is provided a mode setting circuit 228 for making the setting. When each mode is set by the mode setting circuit 228, a mode switching signal corresponding to the mode is supplied to the timing generation circuit 221. The timing generation circuit 221 receives the mode switching signal and sends a signal to the color CCD sensor 2 to the sensor driver 220.
Various timing pulses are supplied for driving the device 10 corresponding to each mode.

In this example, in a color image reading apparatus using a color CCD sensor as a reading sensor,
The case where the normal color mode and the monochrome high-speed mode can be selectively set has been described. However, the monochrome reading sensor and the monochrome high-speed mode according to the eighth and ninth embodiments are used as the reading sensors. It is also possible to configure as a monochrome image reading device that can selectively set.

[0234]

As described above, according to the present invention,
When reading an image using a solid-state imaging device having at least two systems of charge transfer units for one photosensitive pixel column as a reading sensor, two charge transfer units are required for one photosensitive pixel column during one transfer period of the charge transfer unit. By performing the read operation more than once, a plurality of exposure periods are set for the photosensitive pixel column, and each of the signal charges obtained in the plurality of exposure periods is shared and output by at least two charge transfer units. By doing so, high-speed reading in the monochrome mode can be realized at low cost.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram showing a first embodiment of the present invention.

FIG. 2 is a timing chart of a normal color mode.

FIG. 3 is a timing chart of an exposure phase adjustment mode.

FIG. 4 is a timing chart of a monochrome high-speed mode.

FIG. 5 is a block diagram illustrating a signal processing system of the image forming apparatus.

FIG. 6 is an explanatory diagram of an operation in an exposure phase adjustment mode (part 1).
It is.

FIG. 7 is an explanatory diagram of an operation in an exposure phase adjustment mode (part 2).
It is.

FIG. 8 is an explanatory diagram of an operation in a monochrome high-speed mode (part 1).
It is.

FIG. 9 is an explanatory diagram of the operation in the monochrome high-speed mode (part 2).
It is.

FIG. 10 is a timing chart of a color copying mode.

FIG. 11 is a timing chart of a monochrome high-speed copy mode.

FIG. 12 is a structural view of a main part showing a second embodiment of the present invention.

FIG. 13 is a structural diagram of one block of the second embodiment.

FIG. 14 is an explanatory diagram of an operation of a first transfer electrode array according to the second embodiment.

FIG. 15 is a diagram illustrating the operation of a second transfer electrode array according to the second embodiment.

FIG. 16 is an explanatory diagram of the operation of the save accumulation register according to the second embodiment.

FIG. 17 is a timing chart of a monochrome high-speed mode according to the second embodiment.

FIG. 18 is an operation explanatory diagram (part 1) of a monochrome high-speed mode according to the second embodiment.

FIG. 19 is a diagram (part 2) illustrating the operation in the monochrome high-speed mode according to the second embodiment.

FIG. 20 is a timing chart when two-stage exposure is performed in the second embodiment.

FIG. 21 is an explanatory diagram (part 1) of an operation when two-stage exposure is performed.

FIG. 22 is an explanatory diagram (part 2) of an operation when two-stage exposure is performed.

FIG. 23 is a structural view of a main part showing a third embodiment of the present invention.

FIG. 24 is a structural diagram of one block of the third embodiment.

FIG. 25 is a timing chart according to the third embodiment.

FIG. 26 is an operation explanatory view according to the third embodiment (part 1);
It is.

FIG. 27 is an operation explanatory diagram according to the third embodiment (part 2);
It is.

FIG. 28 is a structural diagram of a main part showing a modification of the third embodiment.

FIG. 29 is a structural diagram of one block according to a modification.

FIG. 30 is a timing chart according to a modification of the third embodiment.

FIG. 31 is an operation explanatory diagram according to a modification of the third embodiment.

FIG. 32 is a structural view of a main part showing a fourth embodiment of the present invention.

FIG. 33 is a structural diagram of one block of the fourth embodiment.

FIG. 34 is a timing chart according to the fourth embodiment.

FIG. 35 is an operation explanatory view according to the fourth embodiment (part 1);
It is.

FIG. 36 is an operation explanatory view according to the fourth embodiment (part 2);
It is.

FIG. 37 is an operation explanatory view according to the fourth embodiment (part 3);
It is.

FIG. 38 is a structural diagram of a main part showing a fifth embodiment of the present invention.

FIG. 39 is a structural view of a main part showing a sixth embodiment of the present invention.

FIG. 40 is a structural diagram of a main part showing a seventh embodiment of the present invention.

FIG. 41 is an enlarged view showing a photosensitive pixel shape according to a seventh embodiment.

FIG. 42 is a structural diagram of one block of the seventh embodiment.

FIG. 43 is a timing chart of a monochrome double speed mode according to the seventh embodiment.

FIG. 44 is an explanatory diagram (part 1) of an operation in the monochrome double speed mode according to the seventh embodiment.

FIG. 45 is an explanatory diagram (part 2) of the operation in the monochrome double speed mode according to the seventh embodiment.

FIG. 46 is an explanatory diagram (part 3) of an operation in the monochrome double speed mode according to the seventh embodiment;

FIG. 47 is a timing chart of a color mode according to the seventh embodiment.

FIG. 48 is an explanatory diagram (part 1) of an operation in a color mode according to the seventh embodiment.

FIG. 49 is an explanatory view (part 2) of an operation in a color mode according to the seventh embodiment;

FIG. 50 is an enlarged view (part 1) showing a modification of the shape of the photosensitive pixel according to the seventh embodiment.

FIG. 51 is an enlarged view (part 2) showing a modified example of the shape of the photosensitive pixel according to the seventh embodiment.

FIG. 52 is an enlarged view (part 3) showing a modified example of the shape of the photosensitive pixel according to the seventh embodiment.

FIG. 53 is a schematic configuration diagram showing an eighth embodiment of the present invention.

FIG. 54 is a schematic configuration diagram showing a ninth embodiment of the present invention.

FIG. 55 is an operation explanatory diagram of the ninth embodiment.

FIG. 56 is a timing chart according to the ninth embodiment.

FIG. 57 is a schematic configuration diagram showing a modification of the ninth embodiment;

FIG. 58 shows a monochrome CC according to a modification of the ninth embodiment.
FIG. 3 is a structural diagram of image data read by a D sensor.

FIG. 59 is a schematic configuration diagram showing a tenth embodiment of the present invention.

FIG. 60 is an operation explanatory diagram of the tenth embodiment;
(A) shows the normal color mode, and (B) shows the monochrome high-speed mode.

FIG. 61 is a timing chart of a normal color mode according to the tenth embodiment.

FIG. 62 is a timing chart of a monochrome high-speed mode according to the tenth embodiment.

FIG. 63 is a schematic configuration diagram showing an eleventh embodiment of the present invention.

FIG. 64 is an operation explanatory view of the eleventh embodiment;
(A) shows the normal color mode, and (B) shows the monochrome high-speed mode.

FIG. 65 is a timing chart of a normal color mode according to the eleventh embodiment.

FIG. 66 is a timing chart of a monochrome high-speed mode according to the eleventh embodiment.

FIG. 67 is a schematic configuration diagram showing a modification of the eleventh embodiment.

FIG. 68 is a block diagram illustrating an example of a configuration of an image reading device according to the present invention.

[Explanation of symbols]

R, 11, 51, 71, 91, 171... R
2, 52, 72, 92, 172... G photosensitive pixel rows, 1
B, 14, 55, 56, 77, 77o, 77e, 94, 3, 53, 73, 93, 112, 173.
117, 178... R horizontal transfer registers, 15, 57,
58, 76, 76o, 76e, 95, 116, 174,
175 ... G horizontal transfer register, 16, 78, 96, 1
18, 179... B horizontal transfer registers, 17, 54, 7
4,75,86A, 86B, 98,99,114,11
5 ... save accumulation register, 23, 150, 168, 186
... Pulse generation circuit, 111 ... R / G photosensitive pixel array

──────────────────────────────────────────────────の Continued on front page (51) Int.Cl. ⁶ Identification code FI H04N 1/46 A

Claims (23)

[Claims] 1. A single photosensitive pixel column; at least two shift gates provided for each pixel on both sides of the photosensitive pixel column to read out signal charges of all pixels in the photosensitive pixel column; At least two systems for transferring the signal charges read by the shift gates, and at least two systems provided adjacent to the transfer-destination-side end of each of the at least two systems of the charge transfer units. A solid-state imaging device comprising: a charge detection unit. 2. The solid-state imaging device according to claim 1, wherein each of the at least two systems of charge transfer units is branched into at least two systems until reaching the charge detection unit, and the branched charge transfer units are separated. Wherein the charge detection unit is provided for each of the solid-state imaging devices. 3. A photosensitive pixel row, at least two shift gates provided for each pixel on both sides of the photosensitive pixel row to read out signal charges of all pixels of the photosensitive pixel row, and the at least two shift gates. At least two systems for transferring the signal charges read by the shift gates, and at least two systems provided adjacent to the transfer destination side end of each of the at least two systems of the charge transfer units. A charge detection unit, wherein a plurality of exposure periods are set during one transfer period of the charge transfer unit for the photosensitive pixel row, and each exposure period is obtained in the plurality of exposure periods in the photosensitive pixel row. Sharing the signal charge with the at least two systems of shift gates and reading out the signal charges to the at least two systems of charge transfer units;
And a method of driving the solid-state imaging device, wherein the data is transferred to the corresponding at least two charge detection units by the at least two charge transfer units. 4. The method for driving a solid-state imaging device according to claim 3, wherein: a first reading mode for setting a plurality of exposure periods during one transfer period of the charge transfer unit for the photosensitive pixel column; A method for driving a solid-state imaging device, wherein a second reading mode in which an exposure period having the same length as one transfer period of the charge transfer unit is set for a photosensitive pixel row is used. 5. At least two pixels for one photosensitive pixel column
A solid-state imaging device having a system charge transfer unit; an exposure period setting unit configured to set a plurality of exposure periods during one transfer period of the charge transfer unit for the photosensitive pixel row; and the exposure period in the photosensitive pixel row. An image reading device comprising: transfer driving means for transferring each signal charge obtained in a plurality of exposure periods set by the setting means by the at least two charge transfer units. 6. The image reading apparatus according to claim 5, wherein the exposure period setting means sets a plurality of exposure periods during one transfer period of the charge transfer section for the photosensitive pixel row. And an ordinary reading mode in which an exposure period having the same length as one transfer period of the charge transfer section is set. 7. The image reading device according to claim 5, wherein the solid-state imaging device is configured to transfer a plurality of photosensitive pixel rows and signal charges read from each of the plurality of photosensitive pixel rows. Charge transfer unit, and a storage unit for temporarily storing signal charges read from the photosensitive pixel row, the exposure period setting unit, the exposure period setting means of the specific color of the plurality of photosensitive pixel rows The plurality of exposure periods are set for a photosensitive pixel column, and the transfer driving unit stores the signal charges obtained in a previous exposure period among the plurality of exposure periods in the specific color photosensitive pixel column. An image reading device that once accumulates the image data in a plurality of charge transfer units together with signal charges obtained in a later exposure period. 8. The image reading device according to claim 7, wherein the transfer driving unit is configured to temporarily store the signal charge obtained in the previous exposure period and the signal charge obtained in the subsequent exposure period. Wherein at least two of the charge transfer units of the plurality of colors transfer the same at the same timing. 9. The image reading device according to claim 7, wherein an exposure period having the same length as one transfer period of the charge transfer section is set for the plurality of photosensitive pixel rows, and A color mode in which each signal charge obtained in each of the photosensitive pixel columns is transferred by the charge transfer unit for the plurality of colors;
The plurality of exposure periods are set for the specific color photosensitive pixel column, and each signal charge obtained during the plurality of exposure periods in the specific color photosensitive pixel column is transferred to the charge transfer unit for the plurality of colors. An image reading apparatus comprising: a mode setting unit that selectively sets a monochrome high-speed mode in which transfer is performed by at least two of the charge transfer units. 10. The image reading apparatus according to claim 9, wherein said mode setting means includes an exposure phase adjustment mode for making exposure periods of said plurality of color photosensitive pixel rows different from each other in addition to said color mode and said monochrome high-speed mode. An image reading apparatus characterized by selectively setting the following. 11. The image reading device according to claim 7, wherein the transfer drive unit combines and outputs each signal charge of at least two of the plurality of photosensitive pixel rows. An image reading apparatus characterized by the above-mentioned. 12. The image reading apparatus according to claim 11, wherein the photosensitive pixel arrays for at least two colors are a photosensitive pixel array for red and a photosensitive pixel array for green. 13. The image reading device according to claim 7, wherein the solid-state imaging device has two systems of the charge transfer units for the plurality of colors for each color, and the transfer driving unit includes a plurality of charge transfer units. An image reading apparatus, wherein signal charges of even-numbered pixels and signal charges of odd-numbered pixels are transferred by the two-system charge transfer units. 14. The image reading device according to claim 5, wherein the solid-state imaging device is provided for a photosensitive pixel array of a plurality of colors and a photosensitive pixel array of a specific color among the plurality of photosensitive pixel arrays. And at least two systems of first charge transfer units and second charge transfer units provided for photosensitive pixel columns of other colors, respectively, wherein the exposure period setting means includes The plurality of exposure periods are set for a photosensitive pixel row, and the transfer driving unit transfers each signal charge obtained in the plurality of exposure periods in the specific color photosensitive pixel row to the at least two systems of first signals. An image reading device, wherein the image is transferred by a charge transfer unit. 15. The image reading apparatus according to claim 14, wherein an exposure period having the same length as one transfer period of the charge transfer unit is set for the plurality of photosensitive pixel columns, and the plurality of photosensitive pixels are arranged. A color mode in which each signal charge obtained in each of the columns is transferred by the charge transfer unit for the plurality of colors;
The plurality of exposure periods are set for the specific color photosensitive pixel column, and each signal charge obtained in the specific color photosensitive pixel column during the plurality of exposure periods is the first charge of the at least two systems. An image reading apparatus comprising: a mode setting unit that selectively sets a monochrome high-speed mode to be transferred by a transfer unit. 16. The image reading apparatus according to claim 14, wherein the first and second charge transfer units are branched into at least two systems near each of the last transfer stages. . 17. The image reading apparatus according to claim 7, further comprising: a charge discharging unit configured to discharge unnecessary signal charges at the time of transfer by the charge transfer unit. 18. The image reading apparatus according to claim 7, wherein the specific color photosensitive pixel row is a green corresponding photosensitive pixel row. 19. The image reading device according to claim 7, wherein the solid-state imaging device has a photosensitive pixel row without a color filter in addition to the plurality of photosensitive pixel rows with a color filter, An image reading apparatus, wherein an exposure period setting means sets a plurality of exposure periods for a photosensitive pixel row having no color filter. 20. An image reading method for reading an image using a solid-state imaging device having at least two systems of charge transfer units for one photosensitive pixel column, wherein the charge transfer is performed for the photosensitive pixel column. A plurality of read operations of the signal charge during one transfer period of the unit, and the signal charges obtained by the plurality of read operations are respectively transferred by the at least two charge transfer units to thereby obtain image information of at least two systems. An image reading method characterized in that it is obtained. 21. The image reading method according to claim 20, wherein a high-speed reading mode for performing a plurality of signal charge reading operations on the photosensitive pixel column during one transfer period of the charge transfer unit; An image reading method, wherein a normal reading mode in which a signal charge is read out in a cycle of one charge transfer period of the charge transfer section is selectively set for a column. 22. The image reading method according to claim 20, wherein the solid-state imaging device has a plurality of photosensitive pixel rows, and a plurality of photosensitive pixel rows for a specific color photosensitive pixel row. An image reading method, wherein a plurality of signal charge read operations are performed during one transfer period of the charge transfer section. 23. The image reading method according to claim 22, wherein a signal mode read operation is performed on the photosensitive pixel array of the plurality of colors in a cycle of one transfer period of the charge transfer unit; And a monochrome high-speed mode in which a signal charge readout operation is performed a plurality of times during one transfer period of the charge transfer unit for a photosensitive pixel row of a specific color among the photosensitive pixel rows. Image reading method.