JPH1098343A - Receiver - Google Patents

Receiver

Info

Publication number
JPH1098343A
JPH1098343A JP25008896A JP25008896A JPH1098343A JP H1098343 A JPH1098343 A JP H1098343A JP 25008896 A JP25008896 A JP 25008896A JP 25008896 A JP25008896 A JP 25008896A JP H1098343 A JPH1098343 A JP H1098343A
Authority
JP
Japan
Prior art keywords
converter
input
amplifier
voltage
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25008896A
Other languages
Japanese (ja)
Inventor
Kazumori Katou
数衛 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Denshi KK
Original Assignee
Hitachi Denshi KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Denshi KK filed Critical Hitachi Denshi KK
Priority to JP25008896A priority Critical patent/JPH1098343A/en
Publication of JPH1098343A publication Critical patent/JPH1098343A/en
Pending legal-status Critical Current

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  • Circuits Of Receivers In General (AREA)
  • Control Of Amplification And Gain Control (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the error of a received code, due to saturation at the time of the high input of an AD converter in the receiver of a linear demodulation system. SOLUTION: A circuit, detecting a received input level as a DC voltage from the output of an intermediate frequency stage at an AGC preamplifier, is provided, and a detected voltage is inputted to a comparator to be compared with a previously set reference voltage. Thereby with respect to an input over a regulated value, a variable attenuator 4 provided at the preceding stage of an amplifier at a reception front/end stage is continued to instantly reduce an input level to the AD converter 11 for preventing the saturation of the AD converter 11 to reduce error of the code received.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は線形(リニア)復調
方式の受信機の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement in a linear demodulation type receiver.

【0002】[0002]

【従来の技術】従来の線形復調方式の受信機の復調部ブ
ロック図を図2に示す。振幅情報を有するディジタル線
形変調方式の信号を復調するためには受信波の振幅情報
を保存して増幅するための線形増幅器が必要であり、一
般にAGC(自動利得制御)増幅器が用いられている。
2. Description of the Related Art FIG. 2 is a block diagram of a demodulation section of a conventional linear demodulation type receiver. In order to demodulate a signal of the digital linear modulation method having amplitude information, a linear amplifier for storing and amplifying amplitude information of a received wave is required, and an AGC (automatic gain control) amplifier is generally used.

【0003】受信到来波はアンテナ1から入力され、ア
ンテナ端子2を介して受信フロントエンド部のバンドパ
スフィルタ3に入力される。所定通過域の信号はバンド
パスフィルタ3を通過後、増幅器5で増幅され、ミクサ
6で第1中間周波数(IF)に変換される。IF周波数
に変化された受信信号は、水晶フィルタ等のIFフィル
タで帯域制限され、線形増幅器8に入力される。ここで
一般に増幅器8は前述のとおりAGC増幅器が用いられ
る。受信信号はさらにミクサ9で第2中間周波数に変換
されたのちセラミックフィルタ等の帯域制御フィルタ1
0を介して、AD変換器11に入力される。
A arriving incoming wave is input from an antenna 1 and is input via an antenna terminal 2 to a band-pass filter 3 in a reception front end. After passing through the band-pass filter 3, the signal in the predetermined pass band is amplified by the amplifier 5, and is converted to the first intermediate frequency (IF) by the mixer 6. The reception signal changed to the IF frequency is band-limited by an IF filter such as a crystal filter, and is input to the linear amplifier 8. Here, an AGC amplifier is generally used as the amplifier 8 as described above. The received signal is further converted to a second intermediate frequency by a mixer 9 and then a band control filter 1 such as a ceramic filter.
0 is input to the AD converter 11.

【0004】受信波は、AD変換器11でアナログから
ディジタル信号に変換され、復調器12で所要の帯域制
限を含め、復調処理がなされ、受信データとして復調さ
れ、復調出力端子13から出力される。
The received wave is converted from an analog signal into a digital signal by an AD converter 11, subjected to demodulation processing including a required band limitation by a demodulator 12, demodulated as received data, and output from a demodulation output terminal 13. .

【0005】ここでAD変換器の出力値の平均値を積分
器14で算出し、DA変換器15を介してAGCアンプ
8に制御電圧を帰還し、利得を制御するフィードバック
型の線形増幅器を用いて、AD変換器11への入力レベ
ルを調整し、入力信号レベルがAD変換器のダイナミッ
クレンジを越えないように制御する方式が広く知られて
いる。
Here, the average value of the output values of the AD converter is calculated by the integrator 14, and the control voltage is fed back to the AGC amplifier 8 via the DA converter 15 to use a feedback type linear amplifier for controlling the gain. A method of controlling the input level to the AD converter 11 so that the input signal level does not exceed the dynamic range of the AD converter is widely known.

【0006】図2において、16及び17はそれぞれ第
1及び第2ローカル信号を示す。特に移動無線の回線で
は送受信間距離あるいはフェージング変動等により、受
信機のアンテナ端子2の入力レベルは、例えば通常の通
話状態では−130dBm〜−40dBmのように90
dB以上も変動する。一例として、AD変換器のビット
数を12ビット精度とすると、AD変換器のダイナミッ
クレンジは、約74dBとなるので、AGCアンプで
は、16dB(約20dB)の入力レベルの制御が必要
となる。ここでこのような受信機を基地局に採用するこ
とを考える。このとき、相手の移動局が当該基地局のご
く近傍で送信をした場合は、受信機のアンテナ入力レベ
ルは、前述の受信レベルを越えることが想定される。例
えば受信到来波が−30dBm〜−20dBmで入力さ
れる場合は、AGCアンプは、AD変換器の入力レベル
を更に10〜20dB低減させ、AD変換器が飽和しな
いように制御することが必要となる。
In FIG. 2, reference numerals 16 and 17 denote first and second local signals, respectively. In particular, in the case of a mobile radio line, the input level of the antenna terminal 2 of the receiver is, for example, -130 dBm to -40 dBm in a normal communication state due to fluctuations in transmission / reception distance or fading.
It fluctuates by more than dB. As an example, if the number of bits of the AD converter is 12 bits, the dynamic range of the AD converter is about 74 dB. Therefore, the AGC amplifier needs to control the input level of 16 dB (about 20 dB). Here, it is considered that such a receiver is adopted for a base station. At this time, if the mobile station of the other party transmits in close proximity to the base station, the antenna input level of the receiver is expected to exceed the above-mentioned reception level. For example, when the incoming arriving wave is input at -30 dBm to -20 dBm, the AGC amplifier needs to further reduce the input level of the AD converter by 10 to 20 dB and control the AD converter so as not to be saturated. .

【0007】[0007]

【発明が解決しようとする課題】この場合、AGCアン
プ8は、高い入力レベルに対して、AD変換器への入力
レベルを当該AD変換器が飽和しないように利得を低げ
る制御を行なうことで、原理的には線形復調を行なうこ
とが可能である。しかし、AGCアンプの制御は、AD
変換器の出力レベルから入力レベルの平均値を算出して
制御する帰環型であるため、平均値の算出が終了するま
での間、AD変換器が飽和し、復調器に線形の信号を入
力できない欠点がある。本発明の、第1の目的はこのよ
うな欠点を除去し、高い受信入力時においても、AD変
換器の飽和を低減することを目的とする。
In this case, the AGC amplifier 8 controls the input level to the A / D converter to lower the gain so that the A / D converter does not saturate for a high input level. Thus, linear demodulation can be performed in principle. However, the control of the AGC amplifier is
The AD converter saturates and inputs a linear signal to the demodulator until the calculation of the average value is completed because of the recirculation type in which the average value of the input level is calculated and controlled from the output level of the converter. There are drawbacks that can not be done. A first object of the present invention is to eliminate such a drawback and reduce the saturation of the AD converter even at a high reception input.

【0008】[0008]

【課題を解決するための手段】本発明は、上記の目的を
達成するために、AGCアンプ前段の中間周波数段の出
力を分岐して、その一方の信号から受信入力レベルを直
流電圧として検出して比較器に入力し、検出電圧があら
かじめ設定した値を越えた場合に比較器を動作させる。
更に比較器出力により、受信フロントエンド部の増幅器
の前段に設けた可変減衰器の入切動作をさせるようにし
たものである。
According to the present invention, in order to achieve the above object, an output of an intermediate frequency stage before an AGC amplifier is branched, and a reception input level is detected as a DC voltage from one of the signals. Input to the comparator to operate the comparator when the detected voltage exceeds a preset value.
Further, the output of the comparator causes the variable attenuator provided in the preceding stage of the amplifier in the reception front end unit to be turned on and off.

【0009】[0009]

【発明の実施の形態】以下にこの発明の一実施例を図1
により説明する。受信到来波は従来の回路と同様に、ア
ンテナ1から入力されアンテナ端子2を介して受信フロ
ントエンド部のバンドパスフィルタ3に入力される。つ
いで新たに設けた可変減衰器4に入力される。通常この
可変減衰器4の減衰量は0dBとなるように設定してお
く。受信波はさらに増幅器5で増幅され、ミクサ6で第
1中間周波数(IF)に変換される。IF周波数に変換
された受信信号は、IFフィルタ7で帯域制限される。
ここで、この出力を2分岐して、一方はAGCアンプ8
に、また他方はミクサ28に入力する。AGCアンプ8
以降の動作は、図2に示す線形復調の動作と同一であ
る。ミクサ28に入力された分岐信号は以下のように処
理される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention is shown in FIG.
This will be described below. The incoming arriving wave is input from the antenna 1 and input to the band-pass filter 3 of the reception front-end unit via the antenna terminal 2 as in the conventional circuit. Then, it is input to the newly provided variable attenuator 4. Normally, the attenuation of the variable attenuator 4 is set to be 0 dB. The received wave is further amplified by an amplifier 5 and converted to a first intermediate frequency (IF) by a mixer 6. The reception signal converted to the IF frequency is band-limited by the IF filter 7.
Here, this output is branched into two, one of which is an AGC amplifier 8
And the other is input to the mixer 28. AGC amplifier 8
The subsequent operation is the same as the operation of the linear demodulation shown in FIG. The branch signal input to the mixer 28 is processed as follows.

【0010】ミクサ28では、分岐された第2ローカル
信号17と交混され、第2中間周波数に変換され、セラ
ミックフィルタ10と同様のフィルタにより帯域制限さ
れる。ついで、この信号を対数増幅器21で増幅し、検
波ダイオード23を介して直流出力に変換する。このと
き抵抗22及びコンデンサ24の値を適切に選択するこ
とにより、時定数τ1を小さくすることが可能である。
例えば、τ1は、AD変換器11の出力値を平均する積
分器14の処理時間の1/10程度に設定することで、
伝送レートに対して充分に短い時間で、入力信号レベル
の変化を知ることが可能である。一例として、データの
シンボルレートを4.8ksps(キロシンボル/秒)
とし、数シンボル分の平均受信レベルを算出することを
想定すると、AGCアンプが制御されるまでの時定数は
約1ms(0.208ms/シンボル×5シンボル)
程度となる。この間の数シンボル分は到来受信波の入力
レベルが非常に高い場合、AD変換器は飽和してしまう
ことになり、受信符号誤りを増大させる。これに対し
て、1/2シンボル(0.1ms)程度の時定数で検
波ダイオード23の制御電圧を出力すると想定すると、
仮に、22の抵抗Rの値を10kΩとすれば、コンデン
サ24の容量値を0.01μFにすることで実現可能と
なり、伝送レートに対して充分に速い時定数で受信信号
のレベルを検出することができる。
In the mixer 28, the mixed signal is mixed with the branched second local signal 17, converted into a second intermediate frequency, and band-limited by a filter similar to the ceramic filter 10. Next, this signal is amplified by a logarithmic amplifier 21 and converted into a DC output via a detection diode 23. At this time, by appropriately selecting the values of the resistor 22 and the capacitor 24, the time constant τ 1 can be reduced.
For example, by setting τ 1 to be about 1/10 of the processing time of the integrator 14 for averaging the output value of the AD converter 11,
It is possible to know the change in the input signal level in a sufficiently short time with respect to the transmission rate. As an example, the symbol rate of data is set to 4.8 ksps (kilo symbol / second).
And then, assuming that calculates an average reception level of a few symbols, constants about 1ms (~ 0.208ms / Symbol × 5 symbols) time until the AGC amplifier is controlled
About. If the input level of the arriving received wave is very high for several symbols during this time, the AD converter will saturate, increasing the received code error. In contrast, assuming that outputs a control voltage of the detector diode 23 with a time constant of about 1/2 symbol (~ 0.1 ms),
Assuming that the value of the resistor R of 22 is 10 kΩ, it can be realized by setting the capacitance value of the capacitor 24 to 0.01 μF, and the level of the received signal can be detected with a time constant sufficiently fast with respect to the transmission rate. Can be.

【0011】このように受信電界入力に比例した直流出
力を検出し、比較器26に入力する。比較器26では、
あらかじめ定める参照電圧27と比較し、参照電圧を越
える受信電界入力時に、出力をHighとする。
As described above, the DC output proportional to the received electric field input is detected and input to the comparator 26. In the comparator 26,
Compared with a predetermined reference voltage 27, the output is set to High when a reception electric field input exceeding the reference voltage is input.

【0012】可変減衰器4には比較器26から入力され
るHighの制御電圧を受けて、一定の減衰量となるも
のを選定する。このような可変減衰減衰器は市販品とし
て容易に入手することができる。例えば減衰量として2
0dBのものを選定すれば、到来波が−20〜−30d
Bm以上のときに、可変減衰器が20dB挿入されるた
め、増幅器5以降の入力レベルは−40〜−50dBm
となり、AGCアンプ8の時定数よりも充分に速い時間
で、瞬時に入力レベルを減じることができる。このた
め、AD変換器11の飽和を瞬時に軽減することができ
る。その後、AD変換器は、AGCアンプ8による帰還
ループの時定数で制御されるので線形復調を行なうこと
ができる。
The variable attenuator 4 receives a High control voltage input from the comparator 26 and selects a variable attenuator having a constant attenuation. Such a variable attenuation attenuator can be easily obtained as a commercial product. For example, the attenuation is 2
If 0 dB is selected, the arriving wave is -20 to -30 dB
At Bm or more, the variable attenuator is inserted by 20 dB, so that the input level after the amplifier 5 is -40 to -50 dBm
The input level can be instantaneously reduced in a time sufficiently faster than the time constant of the AGC amplifier 8. Therefore, the saturation of the AD converter 11 can be reduced instantaneously. After that, the AD converter is controlled by the time constant of the feedback loop by the AGC amplifier 8, so that it can perform linear demodulation.

【0013】また、図1の破線ブロック25で示す回路
はRSSI(受信電界強度表示)機能のICとして市販
品として、比較的安価に容易に入手することもできる。
なお、可変減衰器の所要減衰量及び受信入力レベルの切
替動作条件(参照電圧27の設定値)等は、通信システ
ムにより、最適な値を選ぶことで良い。また可変減衰器
は受信到来波のレベルが高い時にのみ動作するので、通
常時の受信感度を劣化させることはない。
The circuit indicated by the broken line block 25 in FIG. 1 is a commercially available IC having an RSSI (reception field strength display) function, and can be easily obtained at relatively low cost.
The required amount of attenuation of the variable attenuator, the switching operation condition of the reception input level (set value of the reference voltage 27), and the like may be appropriately selected depending on the communication system. Further, since the variable attenuator operates only when the level of the received incoming wave is high, the reception sensitivity in the normal state does not deteriorate.

【0014】[0014]

【発明の効果】本発明によれば、AGCアンプの応答特
性よりも速く、AD変換器の入力レベルを制御すること
ができるので、非常に大きな受信到来波に対しても、伝
送レートに対して充分に速い時定数でAD変換器の飽和
を防ぐことが可能である。このため、AD変換器の飽和
による受信符号誤りの増大を軽減することが可能とな
る。
According to the present invention, the input level of the AD converter can be controlled faster than the response characteristic of the AGC amplifier. It is possible to prevent the AD converter from being saturated with a sufficiently fast time constant. For this reason, it is possible to reduce an increase in received code errors due to saturation of the AD converter.

【0015】また、受信機フロントエンド部の増幅器の
前段に可変減衰器が挿入されるため、非常に大きな受信
入力レベルにおいても、可変減衰器の所定減衰量分だけ
当該増幅器の入力レベルが低くなるため、当該増幅器の
飽和に起因する非線形歪みの発生を抑えることが可能と
なり、この面からも高入力時の受信符号誤りを軽減する
上で有効である。さらに受信電界レベルの検出は汎用の
ICで回路を構成することができることから、安価でか
つ簡便な手段で受信性能の向上を図ることが可能であ
る。
Further, since the variable attenuator is inserted in the front stage of the amplifier in the receiver front end section, the input level of the amplifier is reduced by the predetermined attenuation of the variable attenuator even at an extremely large reception input level. Therefore, it is possible to suppress the occurrence of nonlinear distortion due to the saturation of the amplifier, and this is also effective in reducing received code errors at high input. Further, since the circuit for detecting the reception electric field level can be constituted by a general-purpose IC, it is possible to improve the reception performance by inexpensive and simple means.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施例を示すブロック図。FIG. 1 is a block diagram showing one embodiment of the present invention.

【図2】従来の線形復調方式の受信機のブロック図。FIG. 2 is a block diagram of a conventional linear demodulation receiver.

【符号の説明】[Explanation of symbols]

1:アンテナ、2:アンテナ端子、3:フロントエンド
帯域制限フィルタ、4:可変減衰器、5:増幅器、6:
ミクサ、7:第1IF用帯域制限フィルタ、8:AGC
アンプ、9:ミクサ、10:第2IF用帯域制限フィル
タ、11:AD変換器、12:復調器、13:復調出力
端子、14:積分器、15:DA変換器、16:第1ロ
ーカル信号、17:第2ローカル信号、20:第2IF
用帯域制限フィルタ、21:対数増幅器、22:抵抗、
23:検波ダイオード、24:コンデンサ、25:RS
SI用IC、26:比較器、27:参照電圧、28:ミ
クサ。
1: antenna, 2: antenna terminal, 3: front-end band limiting filter, 4: variable attenuator, 5: amplifier, 6:
Mixer, 7: band limiting filter for first IF, 8: AGC
Amplifier, 9: mixer, 10: second IF band limiting filter, 11: AD converter, 12: demodulator, 13: demodulation output terminal, 14: integrator, 15: DA converter, 16: first local signal, 17: second local signal, 20: second IF
Band limiting filter, 21: logarithmic amplifier, 22: resistor,
23: detection diode, 24: capacitor, 25: RS
SI IC, 26: comparator, 27: reference voltage, 28: mixer.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 可変利得増幅器あるいは利得を可変する
機能を含む増幅回路及びAD変換器を有する線形復調方
式の受信機において、到来波の受信電界強度を直流電圧
として検出する回路とこの電圧と参照電圧を比較する比
較器及びフロントエンド部に減衰器を設けて、中間周波
数段の可変利得制御回路の時定数と異なる時間数でフロ
ントエンド部に設けた当該減衰器の限定量設定を入切可
能とすることを特徴とする受信機。
1. A linear demodulation type receiver having a variable gain amplifier or an amplification circuit having a function of varying a gain and an AD converter, a circuit for detecting a received electric field strength of an incoming wave as a DC voltage, and a reference voltage and a reference voltage. A comparator for comparing the voltage and an attenuator in the front-end unit can be used to turn on / off the limited amount setting of the attenuator provided in the front-end unit in a time period different from the time constant of the variable gain control circuit of the intermediate frequency stage. A receiver characterized by the following.
【請求項2】 上記請求項1において、前記比較器の比
較レベルを複数として、検出した受信電界強度に応じて
段階的に前記減衰器の減衰量を可変とすることを特徴と
する受信機。
2. The receiver according to claim 1, wherein a plurality of comparison levels of the comparator are provided, and an attenuation amount of the attenuator is varied stepwise according to a detected received electric field intensity.
JP25008896A 1996-09-20 1996-09-20 Receiver Pending JPH1098343A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25008896A JPH1098343A (en) 1996-09-20 1996-09-20 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25008896A JPH1098343A (en) 1996-09-20 1996-09-20 Receiver

Publications (1)

Publication Number Publication Date
JPH1098343A true JPH1098343A (en) 1998-04-14

Family

ID=17202640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25008896A Pending JPH1098343A (en) 1996-09-20 1996-09-20 Receiver

Country Status (1)

Country Link
JP (1) JPH1098343A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100414371B1 (en) * 2001-07-25 2004-01-07 엘지전자 주식회사 Apparatus and method for controlling operation range of receiver by using automatic gain control voltage
KR20110037922A (en) * 2009-10-07 2011-04-13 페어차일드 세미컨덕터 코포레이션 Automatic gain control

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100414371B1 (en) * 2001-07-25 2004-01-07 엘지전자 주식회사 Apparatus and method for controlling operation range of receiver by using automatic gain control voltage
KR20110037922A (en) * 2009-10-07 2011-04-13 페어차일드 세미컨덕터 코포레이션 Automatic gain control

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