JPH1056376A - Semiconductor integrated circuit for control and electronic controller having the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently switch hardware resources and to apply them to many systems by providing an arithmetic processing circuit which includes a CPU and a memory and a logic circuit for input and output whose internal wires can be changes according to a predetermined program. SOLUTION: An FPGA block 22 is programmed for internal wire alterations matching an input-side external device 24, an output-side external device 25, etc., of a system which uses a system LSI 20, and optimum hardware resources are allocated. A memory 27 in a microcomputer 21 includes a ROM and a RAM and the operation of the CPU 26 is performed according to a program stored in a ROM. The ROM is also stored with data for internal wire alterations of the FPGA block 22. The data are read in an FPGA block automatic wiring device 30 to alter the wiring of the FPGA block 22. Therefore, one kind of control semiconductor integrated circuit is adaptive to many systems.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control semiconductor integrated circuit capable of adapting circuit specifications to use conditions, and an electronic control device equipped with the same.

[0002]

2. Description of the Related Art FIG. 6 shows a schematic configuration of a typical conventional control semiconductor integrated circuit according to the prior art. In such a control semiconductor integrated circuit, the microcomputer 1 is a core, and a dedicated logic circuit 2 including an input interface and a dedicated logic circuit 3 including an output interface are provided. Input signals from an external device 4 including various sensors and the like are processed by a dedicated logic circuit 2 and input to the microcomputer 1 through an input interface. An output from the microcomputer 1 is sent directly from an output interface or through a dedicated logic circuit 3 to an external device 5 such as various actuators.
As an output signal. Microcomputer 1
It includes a central processing unit (hereinafter abbreviated as “CPU”) 6, a memory 7 such as a ROM and a RAM, an input device 8 and an output device 9. The input device 8 and the output device 9 are provided for an electrical interface to dedicated logic circuits 2 and 3, buffers, and the like.
The dedicated logic circuits 2 and 3 are provided for selecting and controlling the external devices 4 and 5, for example.

A control semiconductor integrated circuit as shown in FIG. 6 is a type of large-scale integrated circuit (hereinafter abbreviated as "LSI") and is manufactured as a system LSI 10 adapted to a specific application. Efficiently design LSI for specific applications,
The manufacturing technology is called ASIC, and it combines standard cells, gate arrays, field programmable gate arrays (hereinafter abbreviated as “FPGA”) and programmable -Logic devices (hereinafter abbreviated as "PLD") and the like are properly used. The system LSI 10 includes standard cells and gates due to manufacturing costs.
An array is used. A function set by the operation of the CPU 6 can be changed by a program set in the memory 7.

As another prior art including a CPU and capable of changing functions, for example, Japanese Patent Application Laid-Open No. 2-140851 discloses
There is disclosed a configuration in which an operation mode setting register is formed in a large-scale integrated circuit, and data for switching operations can be externally written at a specific timing. Japanese Patent Application Laid-Open No. 3-71307 discloses a prior art in which a plurality of control programs are selected and executed according to an externally applied command. JP-A-4-282740 discloses that C
A prior art for rewriting a PU microprogram itself has been disclosed.

[0005]

In the prior art shown in FIG. 6, dedicated logic circuits 2 and 3 are required, so that one system LSI 10 can correspond to only one system. Therefore, the function can be changed only within a range that can be realized by the operation of the CPU. Even in the prior arts such as JP-A-3-71307 and JP-A-4-282740, the function can be changed only within a range achievable by the operation of the CPU. While the functions of these prior arts are changed by software, Japanese Unexamined Patent Publication No.
In the prior art of 140851, the function can be changed by switching hardware. However, hardware capable of executing all of the possible operation modes is provided, and only a portion related to the operation mode selected from among the hardware operates, and a portion not involved in the operation is played. As a result, the utilization efficiency of hardware resources decreases. Moreover, the present invention can be applied only to a system that has been switched in advance.

An object of the present invention is to provide a control semiconductor integrated circuit which can be applied to many systems by efficiently switching hardware resources, and an electronic control device having the same.

[0007]

According to the present invention, a control circuit includes an arithmetic processing circuit including a CPU and a memory, and an input / output logic circuit whose internal wiring can be changed according to a predetermined program. It is a semiconductor integrated circuit. According to the present invention, the internal wiring of the input / output logic circuit to the arithmetic processing circuit can be changed in accordance with a predetermined program. , Hardware resources can be allocated appropriately, and efficient control can be performed.

Further, in the present invention, the memory includes a nonvolatile memory for storing data for changing an internal wiring of the logic circuit according to the program. According to the present invention, since the data for changing the internal wiring of the logic circuit is stored in the nonvolatile memory provided in the memory, the data can be easily read out to the external device for changing the internal wiring of the logic circuit. Function can be changed.

In the present invention, the logic circuit is an FPGA. According to the present invention, if the logic circuit is F
Because it is a PGA, relatively large-scale changes can be made easily.

In the present invention, the data is wiring data for a printing device for changing internal wiring for the logic circuit. According to the present invention, since the wiring data for the printing device for changing the internal wiring of the logic circuit is stored in the memory, the function can be easily changed only by connecting the printing device to the outside.

In the present invention, the data is circuit data indicating a circuit to be changed in the logic circuit in a hardware description language. According to the present invention, since the circuit data indicating the circuit to be changed in the hardware description language is stored in the memory, the function of the circuit is easy to understand, and many types of circuits are efficiently stored in the memory. can do.

In the present invention, the logic circuit has a plurality of input or output circuit blocks formed in advance,
The connection state of each circuit block to a plurality of input or output external connection terminals can be replaced by changing the internal wiring. According to the present invention, by changing the internal wiring, the connection state of the plurality of input or output circuit blocks formed in advance to the plurality of input or output external connection terminals can be replaced. The connection state can be replaced in accordance with the frequency of use, and the circuit blocks can be used efficiently.

Further, in the present invention, the logic circuit has an input or output circuit block connected in advance to an input or output external connection terminal, and an unconnected circuit block, respectively. Thus, a circuit component for a circuit block connected to an external connection terminal can be added. According to the present invention, by changing the internal wiring, the input or output circuit block previously connected to the input or output external connection terminal is connected to the unconnected circuit block according to the frequency of use of the external connection terminal. Circuit blocks can be added, and hardware resources can be used efficiently.

Further, according to the present invention, a control semiconductor integrated circuit capable of switching a plurality of types of functions set in advance by changing internal wiring of the logic circuit according to the data, and instructing a function switching of the control semiconductor integrated circuit. Switching instruction means, and wiring for changing internal wiring of a logic circuit based on data stored in a memory in the control semiconductor integrated circuit when a function switching of the control semiconductor integrated circuit is instructed by the switching instruction means. An electronic control device comprising a change unit. According to the present invention, the function switching is instructed by the switch instructing means to the control semiconductor integrated circuit capable of switching among a plurality of types of functions set in advance by changing the internal wiring of the logic circuit. The wiring changing means changes the internal wiring of the logic circuit based on data stored in the memory in the control semiconductor integrated circuit. An electronic control device equipped with such a control semiconductor integrated circuit can change the configuration of a logic circuit in accordance with many systems and perform efficient control.

[0015]

FIG. 1 shows a system LSI 20 as a control semiconductor integrated circuit according to an embodiment of the present invention.
1 shows a schematic configuration of an electronic control device equipped with the same. The system LSI 20 basically includes a microcomputer 21 as a nucleus and an FPGA block 22 as a periphery indicated by hatching. The FPGA block 22 is provided with a program for changing internal wiring in accordance with an external device 24 on the input side such as various sensors and an external device 25 on the output side including various actuators in a system in which the system LSI 20 is used. Optimal hardware resource allocation is performed.

The microcomputer 21 has a CPU
26, a memory 27, an input device 28, and an output device 29. The memory 27 includes a ROM and a RAM.
Operation 26 is performed. The ROM also stores data for changing the internal wiring of the FPGA block 22. This data is read into the FPGA block automatic wiring device 30 and can be used as a program for changing the wiring of the FPGA block 22.

FIG. 2 shows an example of a component that can be programmed to change internal wiring in the FPGA block 22. (A) shows a portion where a plurality of logic blocks 31 can be changed, and (b) shows a configuration of a connection point for changing a back wiring. As shown in (a), while a plurality of logic blocks 31 are distributed at intervals, a vertical local line 33 and a horizontal local line 34 which are the basis of the wiring crossing in the switch matrix 32 are formed.
Are formed. In addition to the local lines 33 and 34, a long line 35 and a direct line 36 are also formed. The lines 33 to 36 are formed in different layers on the semiconductor integrated circuit substrate, and can be electrically connected to each other by providing connection points 37.

In order to make the electrical connection at the connection point 37 programmable, each connection point 37 is provided with a program RAM 40 as shown in FIG. The output of the program RAM 40 controls the switching pass transistor 41. When the pass transistor 41 conducts, the upper line 42 and the lower line 43 are electrically connected. That is, conduction or non-conduction at the connection point 37 can be switched according to the data to be written into the program RAM 40. However, R for program
In order to set data in the AM, it is necessary to follow a predetermined write program.

In general, in a programmable logic circuit such as an FPGA or a PLD, high-speed operation is possible by using many resources and increasing parallel processing. Therefore, it is necessary to set the connection point 37 so that a resource element such as the logic block 31 is distributed to a significant part.

FIG. 3 shows an example of the internal configuration of the FPGA block automatic wiring device 30 of FIG. The data stored in the memory 28 is, for example, circuit data in a hardware description language (hereinafter abbreviated as “HDL”), and is created in advance as required by a control system to which the system LSI 20 is applied. The data is selected from a plurality of circuit data and input to the HDL compiler 51. HD
The result of compiling the circuit data by the L compiler 51 is given to the automatic placement and routing program 52 in the form of, for example, a netlist, and is converted into wiring data in which the printing device 53 can operate. Baking device 53
Performs writing for changing the internal wiring to the FPGA block 22 in FIG. 1 according to the converted wiring data.

FIG. 4 shows a configuration related to a system LSI 60 as another embodiment of the present invention. In the present embodiment, portions corresponding to the embodiment of FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In the system LSI 60, a plurality of FPGA blocks 62A, 62B, 62C, 62
D, 62E, and 62F, and a plurality of external input devices 7
1, 72 and the external output devices 81, 82 can be assigned to external connection terminals respectively.

External input device 71 and external output device 81
Constitute a first system, and the external input device 72 and the external output device 82 constitute a second system. For example, assuming that the amount of input information from the external input device 71 is large, the FPGA blocks 62A, 62B, 62
D and 62E are assigned to the first system, and FPGA blocks 62C and 62F are assigned to the second system. When the amount of information of the second system increases, the FPGA block 62
The rearrangement is performed by changing the internal wiring so that B, 62C, 62E, and 62F are assigned to the second system, and the FPGA blocks 62A and 62D are assigned to the first system.
If the amount of input information is evaluated, and the rearrangement of assignment among a plurality of FPGA blocks is automatically performed, dynamic optimization can be achieved.

FIG. 5 shows a configuration related to a system LSI 90 as still another embodiment of the present invention. In the present embodiment, the same reference numerals are given to portions corresponding to the embodiment of FIG. 1 or FIG. System LSI 9
0, a plurality of FPGA blocks 92A, 92B, 9
2C, 92D, 92E, and 92F are formed in advance and assigned to the external input devices 71 and 72 and the external output devices 81 and 82. In the system LSI 90, additional blocks 93A, 93B, 93C, 93 as shown by hatching
D, 93E, and 93F are left as FPGA areas that can be used. If necessary, writing is performed by the FPGA automatic wiring device 30 so that each of the FPGA blocks 92A, 92B, 92C, 92D, 92E, and 92F. Respectively. Further, the additional blocks 93A, 93B, 93C, 93D, 93E, 93F are:
Corresponding FPGA blocks 92A, 92B, 92C, 9
It can also be added to an FPGA block different from 2D, 92E, and 92F. In this way, the FPGA
The information processing speed can be improved by rewriting the circuit block according to the information balance of the applied system.

In each of the embodiments described above, although the HDL circuit data is stored in the memory, it is also possible to store wiring data that can be directly given to the printing apparatus 53. If the HDL data is used as it is, the work time of the designer can be greatly reduced.
Further, the amount of circuit data that can be stored in memories having the same storage capacity can be increased.

In each of the above embodiments, if a rewritable nonvolatile memory such as an EEPROM or a flash ROM is used as a memory for storing data for changing internal wiring,
After the system LSIs 20, 60, and 90 are mounted on the electronic control unit, it is easy to rewrite the data to the latest one. For example, in a car navigation system or the like, a program for updating software is added to a CD-ROM containing the latest map data, and at the same time, the input / output of the device is handled in accordance with the correction of the software. An application in which data for change is also attached is possible.

[0026]

As described above, according to the present invention, the internal wiring of the input / output logic circuit to the arithmetic processing circuit can be changed according to a predetermined program.
Various types of control semiconductor integrated circuits can cope with many systems. Since mass production is possible, cost reduction can be realized. It is also possible to allocate hardware resources appropriately according to the amount of information, improve the processing speed of information in response to changes in the external environment, and perform efficient control.

Further, according to the present invention, the function can be easily changed by reading data for changing the internal wiring of the logic circuit from the nonvolatile memory provided in the memory.

According to the invention, the logic circuit is an FPGA.
Therefore, a relatively large-scale change can be easily performed.

Further, according to the present invention, the function can be easily changed using the wiring data for changing the internal wiring simply by connecting the printing apparatus to the outside.

Further, according to the present invention, since the circuit data indicating the circuit to be changed in the hardware description language is stored in the memory, the function of the circuit can be easily understood and many types of circuits can be stored in the memory. It can be stored efficiently. Since the data in the hardware description language is used as it is, the work time of the designer can be reduced, and the work load can be reduced.

Further, according to the present invention, the assignment of hardware resources can be changed by replacement by changing the internal wiring, so that the connection state is replaced according to the frequency of use of the external connection terminal, and the circuit is changed according to the amount of information. Blocks can be used efficiently.

Further, according to the present invention, the distribution of the circuit blocks can be optimized according to the amount of information, and the hardware resources can be used efficiently by the addition by changing the internal wiring.

Further, according to the present invention, the internal wiring of the logic circuit can be changed based on the data stored in the memory in the control semiconductor integrated circuit, and the function can be optimized. An electronic control device equipped with a control semiconductor integrated circuit can change the configuration of a logic circuit in accordance with many systems and perform efficient control.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration related to a system LSI 20 according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a basic configuration of an FPGA block 22 in the system LSI 20 of FIG.

FIG. 3 is a block diagram showing a configuration of an FPGA block automatic wiring device 30 of FIG. 1;

FIG. 4 is a system LSI 60 according to another embodiment of the present invention.
FIG. 3 is a block diagram showing a configuration related to.

FIG. 5 is a system LS according to still another embodiment of the present invention.
It is a block diagram which shows the structure relevant to I90.

FIG. 6 is a block diagram showing a configuration related to a control semiconductor integrated circuit according to the prior art.

[Explanation of symbols]

20, 60, 90 System LSI 21 Microcomputer 22, 62A to 62F, 92A to 92F FPGA block 24, 25 External device 26 CPU 27 Memory 30 Device for automatic FPGA block wiring 31 Logic block 32 Switch matrix 37 Connection point 40 Program RAM 41 Pass transistor 51 HDL compiler 53 burning device 71,72 external input device 81,82 external output device 93A-93F additional block

Claims (8)

[Claims] 1. A control semiconductor integrated circuit comprising: an arithmetic processing circuit including a CPU and a memory; and an input / output logic circuit whose internal wiring can be changed according to a predetermined program. 2. The control semiconductor integrated circuit according to claim 1, wherein said memory includes a nonvolatile memory for storing data for changing internal wiring of said logic circuit according to said program. 3. The control semiconductor integrated circuit according to claim 1, wherein said logic circuit is an FPGA. 4. The control semiconductor integrated circuit according to claim 1, wherein said data is wiring data for a printing device for changing internal wiring for said logic circuit. 5. The control semiconductor integrated circuit according to claim 1, wherein the data is circuit data indicating a circuit to change the logic circuit in a hardware description language. 6. The logic circuit has a plurality of input or output circuit blocks formed in advance and connects each circuit block to a plurality of input or output external connection terminals by changing internal wiring. The control semiconductor integrated circuit according to claim 1, wherein the state is replaceable. 7. The logic circuit has an input or output circuit block previously connected to an input or output external connection terminal, respectively, and an unconnected circuit block. The control semiconductor integrated circuit according to claim 1, wherein a circuit component for a circuit block connected to the external connection terminal can be added. 8. The control semiconductor integrated circuit according to claim 1, wherein a plurality of functions set in advance can be switched by changing an internal wiring of said logic circuit according to said data. Instruction means for instructing the function switching of the control semiconductor integrated circuit, and when the function instruction of the control semiconductor integrated circuit is instructed by the switching instruction means, An electronic control unit comprising: wiring changing means for changing internal wiring of a logic circuit based on data stored in a memory.