JPH1055975A - Silicon crystal body for semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily produce a large-diameter, highly pure silicon single crystal wafer by providing a single crystal rod with a resistivity controlled by neutron irradiation in an area for element, providing a polycrystal through CVD method in an area for handling around the single crystal rod, and by forming a concentric double circular layer thereby. SOLUTION: The head and bottom parts of a single crystal are cut off and removed, and their periphery is shaped, and then it is cut into cylindrical block, resulting in a silicon single crystal rod 10 whose resistivity is controlled in the area for element through neutron irradiation. A single crystal layer or a polycrystal silicon layer 11 is piled up around the rod 10. It is cut into wafers, and they are ground and cleaned to obtain a silicon semiconductor substrate 12, so that the concentric central area thereof is formed of an NTD high-quality single crystal 13 and the peripheral area thereof is formed of double circular layer of CVD single crystal or polycrystal 14. Thus, a large-diameter highly pure silicon single crystal wafer can be produced easily.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a silicon single crystal used for a semiconductor device, particularly a large capacity semiconductor device such as a thyristor.

[0002]

2. Description of the Related Art In recent years, with the increase in domestic power demand, it has become necessary to increase the size of equipment for power system interconnection and stabilization. Conventionally, 300 to 6 for small capacity interconnection at system terminals
00MW frequency converter FC (Frequency Converter),
DC power transmission converter HVDC (High Voltage Direct Curren
t) is used. In the new trend, HVDC, a DC transmission converter of 2000 to 3000 MW in large capacity interconnection in the trunk system, frequency converter FC, DC interconnection equipment BTB (Back To Back), reactive power compensator SVC (St.
atic Var Conpensator) is indispensable. In these power converters, several to hundreds of semiconductor devices are connected and used in a straight line. In order to achieve high reliability, compactness, and high efficiency by reducing the number of components of the power converter, it is essential to increase the capacity and reduce the loss of the semiconductor device.

A conventional large-capacity semiconductor device is formed using a circular silicon single crystal semiconductor substrate (wafer) and a substantially circular semiconductor element (pellet) which is slightly smaller than the substrate. A semiconductor element for a large-capacity semiconductor device having a withstand voltage of several kV and a current capacity of several kA or more can be obtained from a single semiconductor substrate.
One is made.

In order to increase the capacity of a semiconductor device, in particular, to increase the current capacity, it is effective to increase the size of the semiconductor element as much as possible (to increase the area). For this purpose, a semiconductor substrate having a large area is required. .

On the other hand, a semiconductor substrate for manufacturing a semiconductor device having a high withstand voltage has a high resistivity and uniformity, has excellent crystallinity, has a low impurity content of not only heavy metals but also oxygen and carbon, and has a high purity. It is required to be. For this reason, in the production of single crystals of silicon, they are prepared by a zone melting method (floating zone method: FZ) that can obtain high-purity crystals without using a crucible or the like, and then the resistivity is precisely adjusted. For this purpose, neutrons are irradiated in a nuclear reactor to convert silicon into phosphorus by a nuclear reaction and doping (Neutron Transmutaion Doping: NTD).

Japanese Patent Application Laid-Open No. Sho 50-81473, “Silicon Crystal Growth and Wafer Processing” by Takao Abe, Baifukan, (1994)
May), Tatsuo Ito and Masato Toda: Radiation processing of semiconductors
Neutron irradiation doping of silicon: Radiation and industry No. 64
Nos. 19 to 23 (December 1994) and the like.

[0007]

In order to develop a large-capacity semiconductor device, the following is required.

(1) a large-diameter high-purity silicon single crystal wafer as a material; (2) a design technology for a large-capacity semiconductor device;
(3) Process equipment and process technology for processing large-diameter wafers uniformly, (4) Packaging technology for large-diameter pellets, (5) High-voltage, large-current characteristic evaluation equipment and analysis technology Most of these are current A difficult but difficult task that can be achieved by expanding the technology is the production of large-diameter silicon single-crystal wafers. It is not an exaggeration to say that the history of increasing the capacity of silicon semiconductor devices so far is the history of increasing the purity and diameter of silicon single crystals. At present, high-purity and high-precision doping by the NTD method is possible up to a diameter of about 6 inches, but this is the limit due to restrictions on equipment and facilities (irradiation hole diameter of a nuclear reactor). For doping of silicon, a heavy water reactor (power 5 to 20 MW class) that has many thermal neutrons useful for transmutation and few fast neutrons that cause irradiation defects is suitable.
Currently, heavy water reactors that can be irradiated in Japan are up to 158 mm in diameter, and it is not economically easy to enlarge the irradiation hole.

On the other hand, as a processing apparatus and a processing technique for uniformly processing a large-diameter wafer, an 8-inch diameter silicon wafer is commonly used in the field of LSI, and a study is being made on a processing apparatus and technology for a 12-inch diameter. Therefore, the present invention can be applied to a process of a large-capacity semiconductor device.

An object of the present invention is to manufacture a large-diameter high-purity silicon single crystal wafer relatively easily.

[0011]

The above object is achieved by the following means.

(1) A single-crystal layer or a polycrystalline layer is deposited around a cylindrical high-quality NTD semiconductor single-crystal rod manufactured by a conventional method. Then, it is processed into a wafer shape.

(2) An ordinary semiconductor manufacturing process is performed using the semiconductor substrate wafer having the double-layered structure.
At this time, a semiconductor element is formed using the entire surface of the high-quality crystal region, and a wafer is handled using a single-crystal layer or a polycrystal layer region deposited therearound.

(3) The above wafer is pelletized to remove a single crystal layer or a polycrystal layer around the wafer, and the end face is processed.

Thus, the entire surface of the high-quality single crystal can be used, and a large-capacity semiconductor device can be manufactured. When a large-capacity semiconductor device is developed, the number of components in a power conversion device using the semiconductor device can be reduced, and miniaturization, high reliability, low loss, and large capacity can be achieved.

[0016]

Embodiments of the present invention will be described below in detail with reference to the drawings.

Embodiment 1 FIG. 1 shows a manufacturing process of a large capacity semiconductor device according to the present invention.

FIG. 1A shows a silicon single crystal rod 10. Manufacturing method Floating zone method (FZ method), diameter about 1
60 mm, crystal growth direction <111>, resistivity 4500Ω
−cm or more. The shoulder (head) and tail (tail) of this single crystal are cut and removed, the periphery is shaped, and the diameter is 156 ± 1 mm.
, And then cut into a cylindrical block having a length of about 650 mm. After that, neutrons were irradiated in a heavy water reactor. The neutron irradiation is performed at a neutron flux density of 1.5 × 10 ¹³ n / cm ² · s for 65 min while the silicon block is rotated for uniformity. After cooling the radioactivity and washing with water, and after examining the residual radioactivity, it was annealed in an oxygen stream at 1200 ° C. for 1 hour to remove irradiation damage. The resistivity is 340-390Ω-
cm.

FIG. 1B shows a state in which a single crystal layer or a polycrystalline silicon layer 11 is deposited around the silicon single crystal rod. The single-crystal layer or the polycrystalline silicon layer 11 has a thickness of 20 by hydrogen reduction of silane trichloride (SiHCl ₃ ), similarly to the deposition of a polycrystalline rod as a raw material of the FZ method.
２５25 mm. At this time, since the silicon single crystal rod 10 of the substrate is a single crystal, a single crystal layer may be deposited by epitaxial growth. Especially silicon single crystal rod 1
The periphery in contact with 0 is apt to be single crystallized. However, in the following steps, it does not matter whether the deposited layer 11 is a single crystal layer or a polycrystalline layer.

FIG. 1 (c) shows an outer periphery ground and notched, and then cuts (slicing) into a wafer.
Further, a schematic cross-sectional view of the silicon semiconductor substrate 12 completed by mechanical polishing (lapping), chamfering (beveling), chemical mechanical polishing (polishing), and cleaning is shown. The silicon semiconductor substrate 12 has a diameter of 165 ± 0.5 mm and a thickness of 1.250 mm. The center region of the concentric circle is an NTD high-grade single crystal 13, and the surrounding region is a double ring layer of a CVD single crystal or polycrystal 14. Structure. This process is the same as a normal wafer manufacturing process.

FIG. 1E shows the silicon semiconductor substrate 12.
Thyristor pellets 15 prepared using
Is shown. Oxidation, ion implantation, diffusion,
A pnpn four-layer structure and an electrode are formed by using a process technology such as photolithography, metal deposition, and passivation, and then are pelletized and edge-processed, and have a diameter of 150 mm. A light receiving section is installed in the pellet because the thyristor is triggered by an infrared light emitting diode as a trigger method. By using a large-area substrate, the degree of freedom in the arrangement of the light receiving portion and the gate pattern can be obtained, the speed of spreading the turn-on of the thyristor can be increased, and the spreading region can be widened.

FIG. 1F shows a state in which the optical fiber 16 made of quartz is set in a press-contact type package 17 together with the optical fiber 16.

As a result, the forward and reverse breakdown voltage is 6 kV or more, the current capacity (average on current) is 6.6 kA, the surge on current of one pulse is 550 kA, the maximum on voltage is 2.1 V, and the critical on current rise rate (di / dt). 350 A / μs or more was confirmed.

When a conventional silicon wafer having a diameter of 150 mm is used, the diameter of the pellet is up to about 136 mm, and the current capacity is up to 5.6 kA in the element structure equivalent to the above.

In order to manufacture the 2000 MW DC interconnection equipment BTB, 672 light trigger thyristors are required. On the other hand, about 800 elements are required for a conventional element having a withstand voltage of 6 kV and a current capacity of 5.6 kA, and about 15 elements of the power converter are required.
% Size reduction and 9% loss reduction were achieved. Also, high reliability can be expected by reducing the number of parts.

Embodiment 2 FIGS. 2A and 2B are a plan view and a sectional view of a pellet 20 for a large-capacity gate turn-off thyristor according to the present invention. NTD high quality single crystal 21 and CVD similar to FIG.
It is manufactured using a single crystal or polycrystal 22 and a double-layered large-area silicon substrate. Pnp by process technology such as oxidation, ion implantation, diffusion, photolithography, metal deposition, passivation, etc.
An n-layer structure and electrodes were formed. Element size is diameter 1
50 mm. Thereafter, it was packaged in a pressure welding type.

This gate turn-off thyristor has a fine unit (length 1.8 mm, width 0.16 mm) of about 12,000.
The pieces are arranged in multiple rings. By using a large-area substrate, the degree of freedom in the arrangement of the gate pattern can be obtained, and the operation of turning on and off the thyristor in the pellet (between units) can be made uniform. As a result, the forward breakdown voltage is 8 kV or more, and the controllable current capacity is 8 kV.
A, a maximum on-voltage of 4.2 V and a turn-off time of 40 μs were confirmed.

The above gate turn-off thyristor 384
Using a self-excited power converter of 300 MVA class (F
C, BTB) can be assembled. On the other hand, a conventional device of a withstand voltage of 6 kV and a current capacity of 6 kA class has about 56
Zero power is required, which can contribute to high reliability by downsizing the power converter, reducing loss, and reducing the number of parts.

In the above embodiment, one pellet per wafer having a diameter of 150 mm or more has been described. However, the present invention can be applied to a case where a plurality of round pellets or square pellets having a diameter of several tens mm are manufactured from one wafer. FIGS. 3A and 3B show a state in which a plurality of pellets are cut out from one wafer.
The size of the pellet can be afforded, and not only the capacity can be increased, but also the degree of freedom in pattern design can be ensured to achieve high performance and low cost.

[0030]

According to the present invention, a large-area semiconductor substrate and a large-area semiconductor element (pellet) using the same can be easily formed, and a large-capacity semiconductor device can be achieved.

Further, since a semiconductor substrate having a large area can be obtained, the degree of freedom in designing a pattern of a semiconductor element is increased, and the element characteristics can be improved.

Further, since a large-capacity semiconductor device can be manufactured, it is possible to reduce the size, increase the reliability, and increase the efficiency of a power converter that uses a large number of semiconductor devices.

[Brief description of the drawings]

FIG. 1 is a schematic view showing a manufacturing process of a large-area semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic view showing a plane and a cross section of a pellet of a large-area semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram of a planar arrangement of pellets of a large-area semiconductor device according to a third embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 10 ... Single-crystal silicon rod, 11 ... Single-crystal or polycrystalline silicon layer, 12 ... Silicon semiconductor substrate, 13, 21
... NTD high-quality single crystal, 14, 22 ... CVD single crystal or polycrystal, 15 ... Pellet for large capacity thyristor, 17 ...
Package, 20: Pellet for large-capacity gate turn-off thyristor.

Claims (1)

[Claims] 1. A silicon crystal for a semiconductor element,
A silicon crystal wherein the element region is a single crystal whose resistivity is controlled by neutron irradiation, and the surrounding handling region is a single crystal or polycrystalline concentric double-ring layer formed by a CVD method.