JPH1055282A - Interruption processing method and interruption processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce processing delay by the frequent occurrence of interruption by counting the number per unit time of interruption factors generated during the execution of a processing, disconnecting the interruption factor from the processing and not performing a corresponding processing in the case of being larger than an allowable interruption factor. SOLUTION: The number of the interruption factors generated per unit time is counted for each interruption factor, and in the case that the number exceeds an allowable interruption number, the interruption factor is disconnected from the processing and a corresponding interruption processing is not performed even when the interruption factor at the time is inputted to a processor 2 thereafter. When a counted value becomes smaller than the stipulated allowable interruption number, the disconnected interruption factor is connected to the processing again. Thus, in the case that key input is frequently generated by the fault of the contact of a keyboard 11 for instance, the frequently generated interruption factor is temporarily disconnected and the processor 2 is prevented from being turned into a hung state without being able to operate the part of the interruption processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interrupt processing method when an interrupt occurs during the execution of a processing in a processing device comprising a computer, software, and the like and performing processing according to a predetermined program, and an interrupt processing for executing the interrupt processing method. It concerns the device.

[0002]

2. Description of the Related Art FIGS. 15 and 16 are explanatory diagrams showing an example of a conventional interrupt processing method. In the drawings, reference numeral 1 denotes a keyboard, a mouse, a sensor, etc. for inputting an interrupt factor to a processing unit 2 described later. Each input device has various interrupt factors for each input device 1. For example, when the input device 1 is a keyboard, the input of the key A and the key B while the processing device 2 is performing a specific process is performed.
When the input device 1 is a mouse, there is an interrupt factor such as a left click or a right click of the mouse in a state where the processing device 2 is performing a specific process. If 1 is a sensor,
There are interrupt factors such as a measured value output from a sensor and an alarm output. Hereinafter, an interrupt signal input to the processing device 2 corresponding to these various interrupt factors is also referred to as an interrupt factor.

Reference numeral 2 denotes a processing unit which comprises a computer including a CPU, a ROM, a RAM, and the like and performs processing in accordance with a predetermined program. The processing unit 2 receives an interrupt factor during execution of the process and responds to the interrupt factor. Performs interrupt processing.

Reference numeral 3 denotes an OR operation circuit, and reference numeral 4 denotes an interrupt factor bit assignment register to which interrupt factors are assigned in bit units.

Next, the operation will be described. FIG. 15 shows an interrupt processing method when the processing device 2 can simultaneously receive a plurality of interrupt factors. Each interrupt factor generated in the input device 1 is directly transmitted to the processing device 2, and Performs processing according to each interrupt factor.

FIG. 16 shows an interrupt processing method in the case where the processing device 2 can accept only one interrupt factor at the same time. In FIG. 16, a logical sum of a plurality of interrupt factors is output as an interrupt via the logical sum operation circuit 3. Transmitted to the processing unit 2 and the interrupt factor bit allocation register 4
Is read by the processing device 2, the processing device 2 determines the type of the interrupt factor and performs a process corresponding to the interrupt factor.

[0007]

Since the conventional interrupt processing method and the conventional interrupt processing apparatus are configured as described above, when an interrupt factor occurs at a frequency exceeding the processing speed of the processing apparatus, the processing apparatus sets the interrupt level. However, there is a problem that the processing device may appear to be hung, because the interrupt processing portion corresponding to the interrupt factor cannot be operated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem. Even when an interrupt factor occurs at a frequency exceeding the processing speed of the processing device, if the processing device appears to hang. It is an object of the present invention to provide an interrupt processing method and an interrupt processing apparatus which can surely perform a process corresponding to an interrupt factor without reducing a processing delay due to a large number of interrupts.

[0009]

According to a first aspect of the present invention, there is provided an interrupt processing method for determining the number of interrupt factors occurring during execution of a process per unit time for a processing device performing a process according to a predetermined procedure. Counting and comparing this with a preset allowable number of interrupts per unit time, and when the former is large, any interrupt cause is separated from the processing so that the corresponding processing is not performed. .

According to a second aspect of the present invention, in the interrupt processing method, the number of interrupt factors per unit time is counted for each interrupt factor, and the number of interrupt factors is set as a predetermined number of interrupts per unit time for each interrupt factor. In comparison, when the former is large, the interrupt factor is separated from the processing.

According to a third aspect of the present invention, when the number of interrupt factors counted per unit time becomes equal to or less than a preset allowable number of interrupts per unit time, the interrupt processing method is disconnected. The interrupt factor is connected to the processing.

According to the fourth aspect of the present invention, the interrupt processing method determines whether the operating state is a reduced operation state in which an isolated interrupt factor exists or a normal operating state in which an isolated interrupt factor does not exist. During operation, processing set for degenerate operation is performed in response to interrupt factors that have not been separated.

According to a fifth aspect of the invention, an interrupt processing method is provided in which a process corresponding to an interrupt factor that is not disconnected is performed according to a preset priority of the interrupt factor.

According to a sixth aspect of the present invention, in the degenerate operation in which the separated interrupt factor is present, a predetermined priority of the interrupt factor for the degenerate operation is set as the priority of the interrupt factor. It is intended to be used.

According to a seventh aspect of the present invention, in the case where the counted number of interrupt factors per unit time is larger than the allowable number of interrupts, an interrupt factor having a low priority of the preset interrupt factor is determined. This is to separate it from the processing.

In the interrupt processing method according to the present invention, the interrupt factor disconnected during the degenerate operation is saved in the storage means, and the interrupt factor saved when returning from the degenerate operation to the normal operation is stored. The processing is restored by returning from the storage means.

According to a ninth aspect of the present invention, there is provided an interrupt processing method, comprising:
Only a high-priority interrupt factor of a preset interrupt factor is saved.

In the interrupt processing method according to the present invention, when returning from the degraded operation to the normal operation, the processing corresponding to the interrupted factor which has been saved is performed with a higher priority of the preset interrupt factor. They are performed in order.

According to an eleventh aspect of the present invention, the priority of a preset interrupt factor can be changed.

According to a twelfth aspect of the present invention, a change in the priority of a specific interrupt factor is prohibited.

According to a thirteenth aspect of the present invention, the interrupt processing apparatus generates a signal representing a unit time between an input device for inputting an interrupt factor to a processing device that performs processing according to a predetermined procedure and the processing device. A unit time signal generating device, an interrupt number counting device for counting the number of interrupt factors generated within a unit time indicated by the signal indicating the unit time, and a unit time for which a count value of the interrupt number counting device is set in advance. When the number of permissible interrupts is exceeded, an interrupt selection device for separating an interrupt factor at that time from processing is provided.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 is a schematic diagram for explaining an interrupt processing method according to Embodiment 1 of the present invention.
Are input devices such as a keyboard, a mouse, and a sensor for inputting an interrupt factor to the processing device 2. For example, when the input device 1 is a keyboard, the input of the key A and the input of the key B in a state where a specific process is being performed in the processing device 2. When the input device 1 is a sensor, such as a left-click or right-click of the mouse in the state where the processing is performed, various interrupts corresponding to each input device 1 such as a measured value output from the sensor, an alarm output, etc. There are factors. Hereinafter, an interrupt signal output to the processing device 2 in response to these various interrupt factors is also referred to as an interrupt factor.

Reference numeral 2 denotes a processing unit which comprises a computer including a CPU, a ROM, a RAM, and the like, performs processing according to a predetermined program, and performs a predetermined processing when an interrupt factor is input during execution of the processing. In this case, the interrupt factor is connected to the process, and the process corresponding to the interrupt factor is performed. In other predetermined cases, the interrupt factor is separated from the process, and the process corresponding to the interrupt factor is not performed.

FIG. 2 is a block diagram of the processing device 2 and the input device 1 for performing the interrupt processing method according to the first embodiment of the present invention. In the processing device 2, portions related to interrupt processing are extracted and shown. I have. In the figure, 11 is a keyboard as an input device, 12 is a mouse as an input device, 13 is a sensor as an input device, and 14 is a processing device 2
A keyboard interface 15 is provided in the processing device 2 to interface with the mouse 12, and a mouse interface 16 is provided in the processing device 2 and interfaces with the mouse 12.
An I / O board 17 for interfacing with the I / O board;
S (Operating System) and 18 are application programs executed when the processing device 2 performs a predetermined process.

In the first embodiment, an interrupt processing method performed by software in the OS 17 or the application program 18 will be described.

Next, the operation will be described. FIG. 3 is a flowchart showing a flow of processing of the interrupt processing method according to the first embodiment of the present invention. The following processing can be performed by the OS 17 or the application program 18 as software. First, in step ST1, the processing device 2 receives an input of an interrupt factor generated in the input device 1. In step ST2, the number of inputs of each interrupt factor per unit time is counted,
The count value is compared with a prescribed allowable interrupt number preset for each interrupt factor (step ST3). If the count value exceeds the prescribed allowable interrupt number, the interrupt factor is separated from the processing (step ST4). ), Step S
The process returns to T1. As a result, processing corresponding to the interrupt factor is not performed. As a method of acquiring the type of the interrupt factor, a method of referring to an address where the interrupt factor is stored, or a method of acquiring as a variable depending on a programming language can be used.

On the other hand, if the counted value is equal to or smaller than the specified allowable interrupt number in step ST3, it is determined in step ST5 whether the interrupt factor is separated.
If it has been disconnected, the interrupt factor is connected to the processing (step ST6), and the processing returns to step ST1. As a result, the application program 18 of the processing device 2 performs normal interrupt processing corresponding to the interrupt factor. On the other hand, step ST
If the interrupt factor is not separated in step 5, the process returns to step ST1 while the interrupt factor remains connected to the process. The above processing is performed for each interrupt factor.

As described above, according to the first embodiment, the number of interrupt factors generated per unit time is counted for each interrupt factor, and if this exceeds the allowable number of interrupts, the interrupt factor is processed. After that, even if the interrupt factor at that time is input to the processing device 2, the corresponding interrupt processing is not performed, and when the count value becomes equal to or less than a specified allowable interrupt number, the disconnected interrupt factor is determined. Since the connection to the processing is made again, for example, when a key input occurs frequently due to a failure of the contact point of the keyboard 11, the frequently occurring interrupt factor can be temporarily separated, and the processing device 2 responds to the interrupt factor due to the frequent occurrence of the interrupt factor. To prevent a situation in which the interrupt processing part that was It possible to perform the processing corresponding to the interrupt factor, it is possible to reduce the processing delay due to the interrupt frequently.

Further, only interrupt factors whose frequency of occurrence exceeds a prescribed allowable number of interrupts are separated from processing, and other interrupt factors are not separated. When a specific interrupt factor occurs frequently, another interrupt factor is set. The above-described effect can be obtained while preventing processing omissions due to factors.

In the above process, the allowable interrupt number as a criterion when disconnecting an interrupt factor from a process is the same as the allowable interrupt number as a criterion when connecting an interrupt factor to a process. It goes without saying that a process in which the number of allowable interrupts serving as a criterion for connection to processing is set smaller than the number of allowable interrupts serving as a criterion for disconnection from the process is also possible.

Embodiment 2 Note that the counting of the interrupt factors per unit time performed in step ST2 of the process of the first embodiment is performed not for each interrupt factor but for the total of all interrupt factors input to the processing device 2, and When the total occurrence frequency of the factors exceeds a prescribed allowable number of interrupts, any of the input interrupt factors can be separated from the processing.

Next, the operation will be described. FIG. 4 is a flowchart showing a processing flow of an interrupt processing method according to the second embodiment of the present invention. The following processing can be performed by the OS 17 or the application program 18 as software. First, step ST11
, The processing device 2 receives an input of an interrupt factor generated in the input device 1. And step ST1
In step 2, the total number of interrupt factors input to the processing device 2 per unit time is counted, and the counted value is compared with a specified allowable interrupt number (step ST13), and the counted value exceeds the specified allowable interrupt number. If so, the interrupt factor at that time is separated from the process (step ST14), and the process returns to step ST11. As a result, interrupt processing corresponding to the separated interrupt factor is not performed.

On the other hand, if it is determined in step ST13 that the count value is equal to or smaller than the prescribed allowable number of interrupts, step ST15
It is determined whether there is an interrupt factor that has been disconnected at that time. If there is an interrupt factor that has been disconnected, the disconnected interrupt factor is connected to the process (step ST16), and the process proceeds to step ST11. Back. On the other hand, if there is no interrupt factor that has been separated in step ST15, the process proceeds directly to step ST1.
Return the processing to 1.

As described above, according to the second embodiment, the total number of interrupt factors generated per unit time is counted, and if the counted value exceeds the allowable number of interrupts, the interrupt factor at that time is counted. Is separated from the processing so that the corresponding interrupt processing is not performed even if the interrupt factor is input to the processing device 2, and when the count value becomes equal to or less than the specified allowable interrupt number, the separated interrupt factor is re-determined. Since the connection is made to the processing, it is possible to suppress the input of an interrupt factor having a frequency exceeding the allowable number of interrupts set according to the processing allowance of the processing device 2, and to prevent an apparent hang state in the processing device 2. In addition, the processing delay can be reduced.

Embodiment 3 FIG. FIG. 5 is a block diagram showing a configuration of an interrupt processing apparatus according to Embodiment 3 of the present invention. In FIG. 5, reference numeral 21 denotes a unit time signal generation apparatus for generating a signal representing a unit time, and 22 denotes an interrupt factor within the unit time. The interrupt number counting device 23 counts the number of occurrences of interrupts. When the count value of the interrupt number counting device 22 exceeds the allowable interrupt number, the interrupt selection device 23 separates the interrupt factor at that time from the processing. Note that the same or corresponding portions as those shown in FIG. 1 are denoted by the same reference numerals, and redundant description will be omitted.

In the first and second embodiments, the OS 17 or the application program 1
The countermeasures by software in 8 are shown
In the third embodiment, measures taken by hardware in the processing device 2 will be described. The unit time signal generating device 21, the interrupt number counting device 22, and the interrupt selecting device 23 illustrated in FIG. 5 are, for example, the keyboard interface 14, the mouse interface 15, the I / O illustrated in FIG.
It can be provided between the board 16 and the OS 17.

FIG. 6 is a block diagram showing an example of the actual hardware configuration of the unit time signal generating device 21, interrupt number counting device 22, and interrupt selecting device 23 of the interrupt processing device according to the third embodiment of the present invention. At 24
Is a pulse oscillator (a unit time signal generation device) that outputs a pulse signal at a predetermined cycle, 25 is a counter of a predetermined number of bits (interrupt number counting device) that counts the number of interrupt factors generated within the predetermined period, and 26 is A permissible value register (interrupt selection device) 27 that holds a prescribed permissible number of interrupts in a predetermined number of bits, 27 compares the permissible number of interrupts held in the permissible value register with the count value of the counter 25 and allows the count value of the counter 25 to be allowed. A comparator (interrupt selection device) such as a magnitude comparator that outputs 1 if the number of interrupts is equal to or less than the number of interrupts and outputs 0 if the count value of the counter 25 exceeds the allowable number of interrupts, and 28 indicates a case where the output of the comparator 27 is 1 Only an AND gate (interrupt selection device) that allows an interrupt factor input from the input device 1 to pass through.

Next, the operation will be described. The interrupt factor generated in the input device 1 is input to the AND gate 28, and the counter 25 is incremented every time the interrupt factor is generated. The counter 25 counts the number of interrupt factors that have occurred while being cleared at predetermined intervals by the pulse oscillator 24 that outputs pulse signals at predetermined intervals. The permissible value register 26 holds a prescribed permissible interrupt number, and the comparator 27 compares the permissible interrupt number with the count value of the counter 25. In this comparison, while the count value of the counter 25 is equal to or less than the allowable interrupt number, the comparator 27 outputs 1 to the AND gate 28, whereby the interrupt factor input to the AND gate 28 is output. Interrupt processing corresponding to the interrupt factor is performed.

In the comparison, while the count value of the counter 25 exceeds the allowable interrupt number, the comparator 2
7 outputs 0, whereby the interrupt factor input to the AND gate 28 is not output, and the application program 18 does not perform interrupt processing corresponding to this interrupt factor.

In connection and disconnection of the interrupt factor processing by the hardware, the interrupt number counting device 22 and the interrupt selection device 23 are connected to the keyboard interface 14, the mouse interface 15, and the I / O board 16 in FIG. Each of the input devices may be provided so as to be connected to and disconnected from the processing of the interrupt factor. The unit time signal generating device 21, the interrupt number counting device 22, and the interrupt selecting device 23 are illustrated in FIG. A set may be provided immediately before the OS 17 in 2 to collectively connect and disconnect the interrupt factor processing for all input devices.

As described above, according to the third embodiment, the number of interrupt factors occurring within a unit time is counted, the number of interrupt factors is compared with the number of allowable interrupts, and connection to processing of interrupt factors is performed.
Since the disconnection is not performed by software as in the first and second embodiments, but performed by hardware, the processing device 2 does not impose a load on the processing in the processing device 2 and the processing device 2 can be used when interrupt factors frequently occur. It is possible to execute a process corresponding to an interrupt factor by preventing an apparently hung state, thereby reducing a process delay due to a large number of interrupts.

Embodiment 4 In the first embodiment, the processing at the time of the interrupt performed in response to each interrupt factor is performed during the normal operation in which no interrupt factor is present and interrupt processing is normally performed, or the interrupted interrupt is performed. Although the same operation was performed irrespective of the time of the degenerate operation in which the factor exists, in the fourth embodiment,
The processing performed in response to the interrupt factor is changed depending on whether the operation is the normal operation or the degenerate operation.

Next, the operation will be described. FIG. 7 is a flowchart showing a flow of processing of an interrupt processing method according to Embodiment 4 of the present invention. First, step ST21
, The processing device 2 receives an input of an interrupt factor generated in the input device 1. In step ST22, the number of interrupt factors per unit time is counted for each interrupt factor. In step ST23, the number of interrupt factors is compared with the specified allowable interrupt number for each interrupt factor. If the counted value exceeds the specified allowable interrupt number, The interrupt factor is separated from the processing (step ST24), and step ST2 is performed.
Then, the process proceeds to 7. On the other hand, if the counted value is equal to or smaller than the specified allowable interrupt number in step ST23, it is determined in step ST25 whether the interrupt factor is disconnected. If the interrupt factor is disconnected, the interrupt factor is connected to the process (step ST25). ST26) If not separated, the process is left as it is, and the process proceeds to step ST27.

In step ST27, it is determined whether or not the above check has been completed for all interrupt factors. If not, the process returns to step ST23.
If completed, in the next step ST28, it is determined whether or not the current operation state is the degenerate operation state in which the separated interrupt factor exists. The determination as to whether or not the operation is the degenerate operation is performed by, for example, storing the connection state of the interrupt factor due to the disconnection of the interrupt factor in step ST24 and the connection of the interrupt factor in step ST26 in a storage unit such as a RAM of the processing device 2, This can be performed by referring to this storage means.

If it is determined in step ST28 that the operating state is the degenerate operation state, in step ST29, the interrupt factor which has not been disconnected is determined by the application program 1
In step 8, the process is connected to the interrupt process set for the degenerate operation so that the interrupt process according to the setting for the degenerate operation is performed. On the other hand, if it is not in the degenerate operation state in the determination in step ST28, the application program 18 performs a normal interrupt process for the interrupt factor that has not been disconnected.

As described above, according to the fourth embodiment, the degenerate operation in which the interrupt factor is disconnected from the process due to the frequent occurrence of the interrupt factor, and the normal operation in which the process for the interrupt factor is normally performed Different interrupt processing can be performed at different times, and the interrupt processing in the processing device 2 can be given flexibility depending on the processing status.

Embodiment 5 In the first embodiment, the processes for the interrupt factors that have not been separated are all performed in the order in which the interrupt factors are generated. However, in the fifth embodiment, the processes corresponding to the interrupt factors that are not separated are set in advance. The interrupt is performed according to the priority of the interrupt factor.

Next, the operation will be described. FIG. 8 is a flowchart showing a flow of processing of the interrupt processing device according to the fifth embodiment of the present invention. In the figure, step S
The process of disconnecting and connecting the interrupt factor by comparing the number of interrupt factors and the number of allowable interrupts from T21 to step ST27 is the same as the process in the fourth embodiment described with reference to FIG. Thereafter, if it is determined in step ST27 that the above checks for all the interrupt factors have not been completed, step S27
The process returns to T23, and if completed, the next step S
At T30, a process corresponding to the interrupt factor that has not been disconnected is performed according to a preset priority of the interrupt factor. Here, the processing is performed according to the priority of the interrupt factor. For example, when a high-priority interrupt factor occurs during the execution of the process corresponding to the low-priority interrupt factor, the high-priority interrupt is performed at that time. Executes the process corresponding to the cause and interrupts the process corresponding to the low-priority interrupt factor if a low-priority interrupt occurs during the process corresponding to the high-priority interrupt factor This means that the process corresponding to the interrupt factor with a high priority is continued without performing the process.

The execution of the process according to the priority of the interrupt factor is performed by, for example, storing the priority of the interrupt factor in a storage unit such as a ROM of the processing device 2 in advance, and referring to the storage unit. be able to.

As described above, according to the fifth embodiment, the execution of the low-priority interrupt processing does not interfere with the execution of the high-priority interrupt processing. High interrupt processing can be ensured.

Embodiment 6 FIG. In the first embodiment, the interrupt factor whose count value is larger than the permissible interrupt count is separated, but in the sixth embodiment, a preset low-priority interrupt factor is separated.

Next, the operation will be described. FIG. 9 is a flowchart showing a flow of processing of the interrupt processing device according to the sixth embodiment of the present invention. In the figure, step S
The processes of T1 to T3 and steps ST5 and ST6 are the same as those of the first embodiment described with reference to FIG.

When the count value of the interrupt factor per unit time exceeds the specified allowable interrupt number in step ST3, it is determined in step ST34 whether the preset priority of the interrupt factor is low. I do. The priority of the interrupt factor is stored in advance in, for example, a storage unit such as a ROM of the processing device 2. If the priority obtained by referring to the storage unit is equal to or lower than a predetermined priority, the lower priority is set. It is said.

If it is determined in step ST34 that the interrupt factor is of low priority, the interrupt factor is separated from the process in step ST35, and the process returns to step ST1. On the other hand, if the interrupt factor is not low priority in the determination in step ST34, the process returns to step ST1 without disconnecting. In addition,
The above processing is performed for each interrupt factor.

As described above, according to the sixth embodiment, even if the frequency of occurrence per unit time exceeds the permissible number of interrupts, interrupt factors having a high priority are not separated from the processing, so that a high priority interrupt factor is not separated. The processing delay in the processing device 2 due to the frequent occurrence of the interrupt factor can be reduced while preventing the omission of the interrupt processing.

Embodiment 7 FIG. In the fifth embodiment, the case where the processing corresponding to the interrupt factor which is not separated is performed according to one preset priority is described. However, in the seventh embodiment, the priority of the interrupt factor during the normal operation is determined. The priority of the interrupt factor during the degenerate operation is set in advance, and the processing corresponding to the interrupt factor that has not been separated is performed according to different priorities during the normal operation and during the degenerate operation.

Next, the operation will be described. FIG. 10 is a flowchart showing a flow of processing of the interrupt processing device according to the seventh embodiment of the present invention. In the figure, the processing from step ST21 to step ST27 is the same as the processing in the fifth embodiment described with reference to FIG. Thereafter, if the above check has not been completed for all the interrupt factors in step ST27, the process returns to step ST23, and if completed, in the next step ST28, the interrupt in which the current operation state is disconnected is performed. It is determined whether there is a degenerate operation state in which a factor exists.

If it is determined in step ST28 that the operation is in the degenerate operation state, in step ST40, a process corresponding to the interrupt factor that has not been disconnected is performed according to a preset priority of the interrupt factor in the degeneration operation. On the other hand, if it is not the degeneration operation state in the determination in step ST28, in step ST41, the processing corresponding to the interrupt factor that has not been disconnected is performed according to the preset priority of the interrupt factor in normal operation.

As described above, according to the seventh embodiment, the priority of the interrupt processing is provided between the normal operation and the degenerate operation, so that the interrupt processing in the processing device 2 can be flexibly performed according to the processing status. It can have sex. For example, taking an example of a key input to the keyboard 11 as an example of an interrupt factor, if the priority of the key input during the degenerate operation is set lower than the priority during the normal operation, the processing device 2 may generate many interrupts. The response speed of the key input is reduced. When a person thinks, "Is input not accepted?" In this way, it is possible to reduce a decrease in response speed to processing other than the processing newly generated by the interrupt processing.

Embodiment 8 FIG. In the eighth embodiment, an interrupt factor that has not been separated from the process during the degenerate operation and has not been subjected to a corresponding process is temporarily saved in a storage unit such as a RAM of the processing device 2 and is returned to a normal operation. The interrupt factor saved in the storage means is restored in a time series, and a corresponding process is performed.

Next, the operation will be described. FIG. 11 is a flowchart showing a flow of processing of the interrupt processing device according to the eighth embodiment of the present invention. In the figure, processing other than step ST50 and step ST51 is the same as the processing in the second embodiment described with reference to FIG. 4, and redundant description will be omitted. In the eighth embodiment, when the count value of the total number of interrupt factors per unit time input to the processing device 2 exceeds the prescribed allowable interrupt count, in step ST14, the interrupt factor at that time is determined from processing. After the disconnection, in step ST50, the disconnected interrupt factor is temporarily saved in a storage unit such as a RAM of the processing device 2.

If the count value is equal to or less than the prescribed allowable interrupt number in step ST13 and there is an interrupt factor which has been separated in step ST15, the process proceeds to step ST15.
In step ST51, the interrupt factors saved in the storage unit are restored in time series, and the interrupt factors disconnected in step 16 are connected to the processing to shift from the degenerate operation mode to the normal operation mode. Perform the process corresponding to the factor.

As described above, according to the eighth embodiment, the interrupt factor separated during the degenerate operation is temporarily saved in the storage means, and when the normal operation is resumed, the interrupt factor saved in the storage means is saved. By executing the degenerate operation, it is possible to prevent the omission of the processing of the interrupt processing by performing the degenerate operation by separating some interrupt factors from the process because the corresponding process is performed by returning to the system. It is possible to reduce the occurrence of processing delay in the processing device 2 due to the occurrence of the above.

Embodiment 9 In the eighth embodiment, the case where all the separated interrupt factors are saved is shown. However, in the ninth embodiment, only the interrupt factor having the higher priority among the separated interrupt factors is saved.

Next, the operation will be described. FIG. 12 is a flowchart showing a flow of processing of the interrupt processing device according to the ninth embodiment of the present invention. In the figure, processing other than step ST60 is the same as the processing in the eighth embodiment described with reference to FIG.
In the ninth embodiment, in step ST60, only the interrupt factors having a higher priority among the separated interrupt factors are saved in the storage means, and in step ST51, the saved interrupt factors having a higher priority are stored. Process on series.

As described above, according to the ninth embodiment, only high-priority interrupt factors are saved, so that high-priority interrupts due to low-priority interrupt processing when returning to normal operation are performed. The effects described in Embodiment 8 can be obtained while preventing the influence on the processing.

Embodiment 10 FIG. In the above-described eighth and ninth embodiments, the interrupt factor saved in the storage unit is restored in a time series and the corresponding processing is performed. However, the saved interrupt factor is replaced with a preset interrupt factor. According to the tenth embodiment, the processing corresponding to the higher priority of the interrupt factor may be performed by a method such as returning to the higher priority of the priority. The processing corresponding to the interrupted high-priority interrupt factor that has been saved can be performed immediately.

Embodiment 11 FIG. In the ninth embodiment,
Although the case where the processing is performed with the priority of the interrupt fixed has been described, in the eleventh embodiment, the priority of the interrupt factor can be changed.

Next, the operation will be described. FIG. 13 is a flowchart showing a flow of processing of the interrupt processing device according to the eleventh embodiment of the present invention. In the figure, processing other than step ST70 is similar to the processing in the ninth embodiment described with reference to FIG. 12, and redundant description will be omitted. In the eleventh embodiment, step ST70
After changing the priority of the interrupt factor that has been disconnected in the above from the prior priority, connection to the processing is performed (step ST16). The priority of the interrupt factor can be changed by, for example, increasing (or lowering) the priority by a predetermined point for the interrupt factor that has occurred more than a predetermined number of times in the disconnected state. it can.

As described above, according to the eleventh embodiment, since the priority of the separated interrupt factor can be changed, the processing relating to the priority at the time of the next reduced operation can be performed at the time of the current reduced operation. The effects described in the ninth embodiment can be obtained while giving flexibility to the processing related to the priority of the interrupt factor, such as changing the processing according to the processing status.

In the above description, it is possible to change the priority used as a reference when saving the interrupt factor in the storage means. However, the priority used as a reference in other processing in each of the above embodiments can be changed. Similarly, it is possible to obtain the effects described in the above embodiments, while giving flexibility to the processing regarding the priority of the interrupt factor.

Embodiment 12 FIG. In the eleventh embodiment, the case where the priority of an arbitrary interrupt factor can be changed has been described. However, in the twelfth embodiment, it is determined whether or not the priority can be changed, so that the specific interrupt factor can be changed. Forbid changing priority.

Next, the operation will be described. FIG. 14 is a flowchart showing a flow of processing of the interrupt processing device according to the twelfth embodiment of the present invention. In the figure, processes other than steps ST80 and ST81 are the same as those in FIG.
3 is the same as the processing in the eleventh embodiment described with reference to FIG. In the twelfth embodiment, it is determined whether or not the priority of each interrupt factor disconnected in step ST80 can be changed.
At 81, the priority is changed for the interrupt cause for which the priority can be changed. The determination of whether the priority can be changed is, for example,
The type of the interrupt factor for which the priority change is prohibited is stored in a storage device such as a ROM of the processing device 2 and the stored content of the storage device is compared with each of the separated interrupt factors. Can be.

As described above, according to the twelfth embodiment, the change of the priority of a specific interrupt factor is prohibited. For example, the processing status of a specific interrupt factor with a high priority is controlled. Regardless of the priority, the process relating to the priority of the interrupt factor is made more flexible by changing the priority, for example, by always saving the priority to the storage unit in step ST60 without changing the priority.
Processing can be performed with a certain priority for a specific interrupt factor regardless of the processing status.

The above-described processing of prohibiting the change of the priority for a specific interrupt factor when the priority of the interrupt factor can be changed is the same as that of the other embodiments that perform the process related to the priority. It is needless to say that the same effect can be obtained.

[0076]

As described above, according to the first aspect of the present invention, the number of interrupt factors per unit time generated during execution of a process is counted for a processing device that performs a process according to a predetermined procedure. This is compared with a preset allowable number of interrupts per unit time, and if the former is large, one of the interrupt factors is separated from the process so that the corresponding process is not performed. Even if the error occurs at a frequency exceeding the processing speed of the processing unit, the degenerate operation that separates any interrupt factor from the processing prevents the processing unit from appearing to hang and interrupts This makes it possible to execute a process corresponding to the factor, and to reduce a processing delay due to a large number of interrupts.

According to the second aspect of the present invention, the number of interrupt factors per unit time is counted for each interrupt factor, and this is compared with a preset allowable number of interrupts per unit time for each interrupt factor. If the former is large, the interrupt factor is separated from the processing.
For example, when key input occurs frequently due to a failure of a keyboard contact, it is possible to isolate only the interrupt factor that frequently occurs, and to prevent processing leaks from occurring for other interrupt factors while the processing device appears to hang. The state can be prevented from being executed, and processing corresponding to the interrupt factor can be executed, so that there is an effect that a processing delay due to frequent occurrence of interrupts can be reduced.

According to the third aspect of the present invention, when the counted number of interrupt factors per unit time becomes equal to or less than a preset allowable number of interrupts per unit time, the interrupt factor that has been separated is determined. Since it is configured to be connected to the process, there is an effect that the interrupt factor that has been separated when the frequency of occurrence of the interrupt factor is reduced is automatically reconnected to the process, thereby preventing omission of the process.

According to the fourth aspect of the present invention, it is determined whether the operation is in the degenerate operation state in which the separated interrupt factor exists or in the normal operation state in which the separated interrupt factor does not exist. Because the processing set for the degenerate operation is performed in response to the interrupt factor that has not been separated, the processing for the degenerate operation in which the interrupt factor separated from the process exists and the process for the interrupt factor normally Different interrupt processing can be performed in the normal operation that is being performed, and there is an effect that the interrupt processing in the processing device can have flexibility according to the processing status.

According to the fifth aspect of the present invention, the processing corresponding to the interrupt factor which has not been disconnected is performed according to the preset priority of the interrupt factor. To prevent the execution of the processing that corresponds to the high-priority interrupt factor from being interrupted, and to ensure that the processing that corresponds to the high-priority interrupt factor that has not been separated is performed. There is an effect that can be done.

According to the sixth aspect of the present invention, in a degenerate operation in which an isolated interrupt factor exists, a preset priority of the interrupt factor for the degenerate operation is used as the priority of the interrupt factor. With this configuration, there is an effect that the priority of the interrupt processing is set to be different between the normal operation and the degenerate operation, so that the interrupt processing in the processing device can have flexibility depending on the processing state.

According to the seventh aspect of the present invention, when the counted number of interrupt factors per unit time is larger than the allowable number of interrupts, the interrupt factor having a lower priority set in advance is separated from the processing. With such a configuration, there is an effect that the processing delay in the processing device due to the frequent occurrence of the interrupt factor can be reduced while preventing the omission of the high-priority interrupt process.

According to the eighth aspect of the present invention, the interrupt factor disconnected at the time of the degenerate operation is saved in the storage means, and the interrupt factor saved at the time of returning from the degenerate operation to the normal operation is stored in the storage means. The system is configured to perform the corresponding processing by returning from the process, so that the execution of the degenerate operation prevents the occurrence of the omission of the processing of the interrupt processing by separating some interrupt factors from the processing and performing the degenerate operation. There is an effect that a processing delay in the processing device due to a large number of factors can be reduced.

According to the ninth aspect of the invention, of the interrupt factors separated during the degenerate operation, only the interrupt factor having a higher priority of the preset interrupt factor is saved, so that the normal operation can be performed. While returning, the processing corresponding to the low-priority interrupt factor is prevented from affecting the processing corresponding to the high-priority interrupt factor. There is an effect that generation can be prevented.

According to the tenth aspect, when returning from the degenerate operation to the normal operation, the processing corresponding to the interrupted factor saved is performed in the descending order of the priority of the preset interrupt factor. Therefore, there is an effect that the process corresponding to the saved high-priority interrupt factor can be promptly performed without being affected by the process corresponding to the low-priority interrupt factor.

According to the eleventh aspect of the present invention, the priority of the interrupt factor set in advance can be changed, so that the process relating to the priority of the interrupt factor is provided with flexibility. , 6, 7, 9, and 10, the effect of the invention described in any one of the above aspects can be obtained.

According to the twelfth aspect of the present invention, the change of the priority is prohibited for a specific interrupt factor, so that the process relating to the priority of the interrupt factor has more flexibility by changing the priority. In this case, there is an effect that processing can be performed with a certain priority for a specific interrupt factor regardless of the processing status.

According to the thirteenth aspect of the present invention, a unit time for generating a signal representing a unit time is provided between an input device for inputting an interrupt factor to a processing device for performing processing according to a predetermined procedure and the processing device. A signal generating device, an interrupt counting device that counts the number of interrupt factors occurring within a unit time indicated by the signal indicating the unit time, and a count value of the interrupt counting device which is set to a predetermined value per unit time. When the number of interrupts exceeds the number of interrupts, the system is equipped with an interrupt selection device that separates the cause of the interrupt from processing. The connection and disconnection to the processing are not performed by the software in the processing device but by the above hardware, so that the processing in the processing device can be performed. While preventing that the load is applied,
It is possible to prevent the processing device from appearing to be hung when an interrupt occurs frequently, to execute a process corresponding to the interrupt cause, and to reduce the processing delay caused by the interrupt occurring frequently.

[Brief description of the drawings]

FIG. 1 is a schematic diagram for explaining an interrupt processing method according to a first embodiment of the present invention;

FIG. 2 is a configuration diagram of a processing device and an input device that perform an interrupt processing method according to the first embodiment of the present invention;

FIG. 3 is a flowchart showing a processing flow of an interrupt processing method according to the first embodiment of the present invention;

FIG. 4 is a flowchart showing a processing flow of an interrupt processing method according to a second embodiment of the present invention;

FIG. 5 is a block diagram showing a configuration of an interrupt processing device according to a third embodiment of the present invention.

FIG. 6 is a block diagram illustrating a hardware configuration example of a unit time signal generation device, an interrupt counting device, and an interrupt selection device of an interrupt processing device according to a third embodiment of the present invention.

FIG. 7 is a flowchart showing a processing flow of an interrupt processing method according to a fourth embodiment of the present invention.

FIG. 8 is a flowchart showing a processing flow of an interrupt processing method according to a fifth embodiment of the present invention.

FIG. 9 is a flowchart showing a processing flow of an interrupt processing method according to a sixth embodiment of the present invention.

FIG. 10 is a flowchart showing a processing flow of an interrupt processing method according to a seventh embodiment of the present invention.

FIG. 11 is a flowchart showing a processing flow of an interrupt processing method according to an eighth embodiment of the present invention.

FIG. 12 is a flowchart showing a processing flow of an interrupt processing method according to a ninth embodiment of the present invention;

FIG. 13 is a flowchart showing a process flow of an interrupt processing method according to an eleventh embodiment of the present invention.

FIG. 14 is a flowchart showing a process flow of an interrupt processing method according to a twelfth embodiment of the present invention.

FIG. 15 is an explanatory diagram showing an example of a conventional interrupt processing method.

FIG. 16 is an explanatory diagram showing an example of a conventional interrupt processing method.

[Explanation of symbols]

Reference Signs List 1 input device, 2 processing device, 11 keyboard (input device), 12 mouse (input device), 13 sensor (input device), 21 unit time signal generating device, 22 interrupt counting device, 23 interrupt sorting device, 24 pulse oscillator (Unit time signal generation device), 25 counter (interrupt counting device), 26 allowable value register (interrupt selection device), 27 comparator (interrupt selection device),
28 AND gate (interrupt screening device).

Claims (13)

[Claims] 1. A processing apparatus that performs processing in accordance with a predetermined procedure counts the number of interrupt factors per unit time generated during execution of the processing, and determines the number of interrupt factors per unit time as a preset allowable number of interrupts per unit time. In comparison, when the former is large, any interrupt factor is separated from the processing and the corresponding processing is not performed. 2. The number of interrupt factors per unit time is counted for each interrupt factor, and this is compared with the allowable number of interrupts per unit time preset for each interrupt factor. 2. The interrupt processing method according to claim 1, wherein the interrupt factor is separated from the processing. 3. When the counted number of interrupt factors per unit time becomes equal to or less than a preset allowable number of interrupts per unit time, the disconnected interrupt factor is connected to processing. 3. The interrupt processing method according to claim 1, wherein 4. Determine whether the operating state is a degenerate operation state in which an isolated interrupt factor exists or a normal operation state in which no isolated interrupt factor exists. 4. The interrupt processing method according to claim 1, wherein a process set for a degenerate operation is performed. 5. The interrupt according to claim 1, wherein a process corresponding to the interrupt factor that has not been separated is performed in accordance with a preset priority of the interrupt factor. Processing method. 6. The degraded operation in which an isolated interrupt factor is present, wherein a preset priority of the degenerate operation interrupt factor is used as the interrupt factor priority. Interrupt handling method. 7. The method according to claim 1, wherein when the counted number of interrupt factors per unit time is larger than the allowable number of interrupts, interrupt factors having a lower priority of the preset interrupt factors are separated from the processing. The interrupt processing method according to any one of claims 1 to 4. 8. An interrupt factor disconnected during the degenerate operation is saved in the storage means, and when the normal operation is returned from the degenerate operation, the saved interrupt factor is restored from the storage means to perform a corresponding process. 8. The interrupt processing method according to claim 1, wherein the method is performed. 9. The method according to claim 8, wherein, of the interrupt factors separated during the degraded operation, only interrupt factors having a higher priority among preset interrupt factors are saved.
The described interrupt handling method. 10. The method according to claim 9, wherein when returning from the degraded operation to the normal operation, the processing corresponding to the interrupted factor saved is performed in descending order of the priority of the preset interrupt factor. Interrupt handling method. 11. The method according to claim 5, wherein the priority of a preset interrupt factor can be changed. The interrupt processing device according to the item. 12. The interrupt processing method according to claim 11, wherein the change of the priority is prohibited for a specific interrupt factor. 13. A unit time signal generation device for generating a signal representing a unit time between an input device for inputting an interrupt factor to a processing device for performing processing according to a predetermined procedure and said processing device, An interrupt number counting device that counts the number of interrupt factors that occur within a unit time indicated by a signal indicating the number of interrupts, and when the count value of the interrupt number counting device exceeds a preset allowable number of interrupts per unit time, And an interrupt selection device for separating the interrupt factor from the processing.