JPH1051662A - Gamma correction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain the gamma correction circuit suitable for a television camera conducting digital processing by storing gamma correction value data represented by a continuous curve in a gamma correction value storage device and reading the gamma correction value depending on a level of a video signal so as to apply the gamma correction processing to the data. SOLUTION: When power to a television camera is applied, picture required parameters are sequentially fed to a parameter input terminal 4 and given to an arithmetic operation parameter storage memory 8, in which the required parameters are sequentially stored. Then a control circuit is given to a counter 5 from an input terminal 3, the counter counts number of the received clock signals, increases number of bits of the clock signals up to number of bits required for a set dynamic range and the result is outputted to the arithmetic operation parameter storage memory 8, multipliers 6, 10 and a gamma correction value storage memory 9. Then a picked-up digital video signal is fed to a terminal 2 and given to the memory 9, then a gamma correction value corresponding to the input value is outputted from the memory 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gamma correction circuit suitable for use in a television camera for processing video signals by digital processing.

[0002]

2. Description of the Related Art A television camera, whether it is an analog processing television camera or a digital processing television camera, covers the entire television system from imaging by a television camera to emission of a cathode ray tube by a television receiver. A gamma correction circuit is provided which corrects a gamma value between an input and an output to a required value.
FIG. 3 shows an example of a conventional gamma correction circuit used in a digital processing television camera, and FIG. 4 shows input / output characteristics of the gamma correction circuit approximated to a curve formed by continuous broken lines.

The configuration and operation of a conventional gamma correction circuit will be described. The conventional gamma correction circuit shown in FIG.
As an input / output characteristic which becomes the output voltage Eo at the input voltage Ei, a required parameter K of a linear expression shown in the following expression (1) is used.
By providing n and An in accordance with the value of the input voltage Ei and outputting the value of the output voltage Eo, the required linear characteristics shown in FIG. 4 are obtained. And Eo = Kn × Ei + An (1) where: n = 1, 2, 3,... In FIG. This is a straight line when the input voltage Ei is added, and the angle 33 is
The inclination of the straight line 32 is shown.

In the gamma correction circuit 21 shown in FIG.
22 is a digital video signal input terminal, 23 is an address signal generating circuit for generating an address signal for reading data stored in the memory, and 25 is a
A memory in which a plurality of required values of parameters Kn and An of the arithmetic expression Kn · X + An are recorded.
A multiplier for multiplying the digital video signal from the memory 2 by the parameter Kn from the memory 25;
An adder for adding the parameter An from the memory 25 to the multiplied value of the digital video signal from No. 4 and the parameter Kn, and 27 denotes an output terminal of the gamma-corrected digital video signal.

When the captured video signal is digitized and applied to the video signal input terminal 22, the digital video signal (Ei) is converted into an address signal generation circuit 23 and a multiplier 2.
4 is input. One address signal generating circuit 23
Generates an address signal corresponding to the signal level Ei of the input digital video signal and outputs it to the memory 25. The memory 25 has an address designated by an address signal input from the address signal generation circuit 23, and stores a plurality of parameters K of an arithmetic expression Kn · X + An stored in advance.
The specified parameter Kn is output to the multiplier 24 and the specified parameter An is output to the adder 26 from n and An.

The other multiplier 24 is connected to the video signal input terminal 2
Digital video signal (Ei) input from memory 2 and memory 2
The multiplication with the parameter Kn input from 5 is performed, and the multiplication value Kn × Ei is output to the adder 26. The adder 26
A multiplication value Kn × Ei of the digital video signal input from the multiplier 24 and the parameter Kn is added to the parameter An input from the memory 25, and the gamma-corrected digital video signal Kn × Ei + An is output to the video signal output terminal. 27. From the video signal output terminal 27, a gamma corrected digital video signal (Eo) is output to another circuit.

[0007]

In the gamma correction circuit according to the prior art, since the input / output characteristic of gamma correction, which should be a curve, is a curve formed by a series of broken lines, the number of divisions by broken lines is increased in order to approximate the curve. Otherwise, there is a problem that the correction error increases. In order to solve the above-mentioned problem, the present invention provides an operation parameter storage device that stores a plurality of required parameters of a quadratic operation expression, and a plurality of multipliers and adders that perform an operation of a quadratic operation expression. It is an object of the present invention to provide a gamma correction circuit which generates gamma correction value data according to the above, stores the data in a gamma correction value storage device, reads a gamma correction value according to the level of a video signal, and performs gamma correction.

[0008]

Means for Solving the Problems] To achieve the above object, the gamma correction circuit of the present invention, the secondary computing equation Eo = a _n
Required of _{^{· Ei 2 + b n · Ei}} + c n a plurality of operation parameters, and the arithmetic parameter storage unit for storing a plurality according to the value of the dynamic range set for the video signal to the gamma correction, the clock signal, the gamma correction A counter for sequentially counting a required number in accordance with the value of the dynamic range set for the video signal; and a count output signal from the counter and a plurality of calculation parameters of a secondary calculation expression from the calculation parameter storage device. A plurality of multipliers and adders configured to calculate a gamma correction value by multiplying and adding according to the following arithmetic expression, and a plurality of required gamma correction values from the plurality of multipliers and the adder, Gamma correction value according to the level of the video signal to be stored and gamma corrected sequentially with the count output signal from the counter A gamma correction value storage device that reads out, stores a plurality of required calculation parameters of a secondary calculation expression to be input in the calculation parameter storage device, sequentially counts input clock signals with the counter,
A plurality of operation parameters are sequentially read from the operation parameter storage device with the counted output signal, and the counted output signal and the plurality of operation parameters are multiplied and added by the plurality of multipliers and adders, thereby obtaining a gamma correction value. Is calculated, and a plurality of gamma correction values are sequentially stored in the gamma correction value storage device using the counted output signal, and a video signal is input to the gamma correction value storage device, and a gamma correction value corresponding to the level of the video signal is calculated. Is read and output to perform gamma correction.

[0009] More specifically, the gamma correction circuit of the present invention, the secondary computing equation ^{_{Eo = a n · Ei 2 +}} b n · Ei + c n
A plurality of multipliers and adders configured to calculate a gamma correction value by multiplying and adding according to
Count output signal from the input to the counter and the calculation parameters Parameter a _n a multiplier for outputting a multiplication value a _n · Ei by multiplying from the storage device, and the multiplication value a _n · Ei from the multiplier to the input The parameter b _n from the operation parameter storage device is added to add the value a _n · Ei + b _n
An adder for outputting, a multiplier for outputting the added value from the count output signal and the adder by multiplying the a _n · Ei + b _n multiplier _{^{a n · Ei 2 + b n}} · Ei from the counter to enter , The multiplied value a _n · Ei ² from the multiplier
+ B _n · Ei and the parameter c _n from the operation parameter storage device to add the gamma correction value a _n · Ei ² + b _n ·
It is made of an adder for outputting ei + c _n.

The operation of the present invention will be described. The gamma correction circuit of the present invention stores a plurality of required operation parameters of an input quadratic operation expression in an operation parameter storage device. Then, the input clock signal is sequentially counted by a counter, a plurality of operation parameters are sequentially read from the operation parameter storage device with the counted output signal, and the counted output signal and the plurality of operation parameters are multiplied by a plurality of multipliers and A gamma correction value is calculated by multiplication and addition by an adder, and a plurality of gamma correction values are sequentially stored in the gamma correction value storage device using the counted output signals. The video signal to be gamma corrected is input to the gamma correction value storage device storing a plurality of gamma correction values, and the gamma correction is performed by reading and outputting the gamma correction value corresponding to the level of the video signal.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a gamma correction circuit of the present invention used in a digital processing television camera will be described with reference to a block diagram shown in FIG. 1 and a gamma correction input / output characteristic diagram shown in FIG. do. The gamma correction circuit of the present invention performs gamma correction using a required correction curve based on a series of quadratic curves. 1, the gamma correction circuit of the present invention, as input-output characteristics in the input voltage Ei becomes the output voltage Eo, the required parameters a _n quadratic equation shown in the following equation (2), b _n, the c _n , Input voltage E
By giving the value according to the value of i and outputting the value of the output voltage Eo, the required curve characteristic shown in FIG. 2 is obtained, and the required correction characteristic is obtained by making it continuous. ^{_{Eo = a n · Ei 2 +}} b n · Ei + c n ····· (2) where: n = 1,2,3, ··· (2 ) expression of the arithmetic expression, for example, as shown in FIG. 2, n = 1
, A curve 16 when n = 2, and a curve 17 when n = 3.
It is determined to be in contact on the threshold value B.

In the gamma correction circuit 1 shown in FIG.
Are digital video signal input terminals for gamma correction, 3
Is a clock signal input terminal, 4 is a parameter input terminal, 5 is a counter for counting the clock signal input from the clock input terminal 3 to a required number of clock signals, 8 is an arithmetic expression input from the parameter input terminal 4 a
parameters a _n of ^{_{n · X 2 + b n ·}} X + c n, b n, c n
Operation parameter storage memory for storing a predetermined plurality of values of, 6, and a count output signal to be input from the counter 5, a multiplier for multiplying the parameters a _n input from the operation parameter storage memory 8, 7, The adder 10 adds the multiplied value input from the multiplier 6 and the parameter b _n input from the operation parameter storage memory 8. The adder 10 outputs the count output signal input from the counter 5 and the added value input from the adder 7. , And 11 is a multiplier 1
A multiplier value input from 0, adder for a gamma correction value by adding the parameters c _n input from the operation parameter storage memory 8, 9, the count output signal input from the counter 5, the input from the adder 11 The gamma correction value to be stored is stored in advance, and the gamma correction value corresponding to the input level of the video signal input from the input terminal 2 is read out,
A gamma correction value storage memory that outputs a gamma corrected video signal, and 12 denotes a gamma corrected digital video signal output terminal.

[0013] When the power of the television camera provided with a gamma correction circuit of the present invention is turned on, the arithmetic equation Eo = a _n · X ² to the block diagram of the gamma correction circuit occurred in the circuit that are not listed in FIG. 1 + b _n · X + c _n required multiple parameters a _n on the right side of, b _n, is c _n is sequentially applied to the parameter input terminal 4, and input to the arithmetic parameter storage memory 8, the required plurality of parameters a _n, b _n , c _n
Are sequentially stored in the operation parameter storage memory 8. Next, the clock signal is input from the input terminal 3 to the counter 5, and the counter 5 counts the input clock signal and changes the count output from 0 to the number of bits of the dynamic range set one by one (to the video signal input level). Equivalent)
Output to the memory 8 for storing operation parameters, the multiplier 6, the multiplier 10, and the memory 9 for storing gamma correction values.

Here, the counter 5 has, for example, the input terminal 2
If the dynamic range of the digital video signal input to the device is set to 10 bits (0 to 1023),
The counter 5 counts the input clock signal from 0 to 1023 and outputs it.
Is combined with the count output of the up 1023, the multiplier 6 in sequence parameters a _n, the adder parameter b _n 7
And outputs the parameter c _n to the adder 11. In this case, if the output value of the counter 5 is equal to or less than the threshold value A shown in FIG. If B or more, parameters a _n , b _n , and c _n are output from the calculation parameter storage memory 8 so that the calculation is performed using the calculation formula of the curve 17. The multiplier 6 has a count output of the clock signal inputted from the counter 5, by multiplying the parameters a _n input from the operation parameter storage memory 8, the multiplication value a _n Ei
Is output to the adder 7.

The adder 7 adds the multiplication value a _n · Ei input from the multiplier 6 and the parameter b _n input from the operation parameter storage memory 8 to obtain an addition value a _n · Ei +
b _n is output to the multiplier 10. The multiplier 10 includes the adder 7
Is multiplied by the count output of the clock signal input from the counter 5 and the added value a _n · Ei + b _n input from
The multiplied value a _n · Ei ² + b _n · Ei is output to the adder 11. The adder 11 calculates the multiplied value a _n input from the multiplier 10
Ei ² + b _n · Ei is added to the parameter c _n input from the calculation parameter storage memory 8 and an added value (this added value is a gamma correction value) a _n · Ei ² + b
The _n · Ei + c _n outputs to the gamma correction value storage memory 9. The gamma correction value storage memory 9 stores the gamma correction value a _n · Ei ² + b _n · Ei + c _n input from the adder 11.
Are sequentially stored for all gamma correction values according to the count output of the clock signal input from the counter 5.

Next, in the gamma correction value storage memory 9, all gamma correction values (for example, if the dynamic range of a digital video signal is set to 10 bits, 102
After the storage of (4) is completed, the captured digital video signal is applied to the video signal input terminal 2 and input to the gamma correction value storage memory 9 to be used as a read address according to the level Ei of the video signal. When input, the gamma correction value corresponding to that value is stored in the gamma correction value storage memory 9.
, And as a result, the gamma correction is performed, and the gamma-corrected video signal is output to the output terminal 12. From the video signal output terminal 12, a gamma-corrected digital video signal Eo is output to another circuit.

[0017]

According to the present invention, an operation parameter storage device for storing required plural parameters of a quadratic operation expression,
A plurality of multipliers and adders that perform a quadratic operation generate gamma correction value data based on a continuous curve and store the data in a gamma correction value storage device. A gamma correction circuit that performs the correction can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram of a gamma correction circuit according to the present invention.

FIG. 2 is a gamma correction input / output characteristic diagram of a gamma correction circuit according to the present invention.

FIG. 3 is a block diagram of a conventional gamma correction circuit.

FIG. 4 is a gamma correction input / output characteristic diagram of a conventional gamma correction circuit.

[Explanation of symbols]

 1, 21 Gamma correction circuit 2, 22 Video signal input terminal 3 Clock signal input terminal 4 Parameter input terminal 5 Counter 6, 10, 24 Multiplier 7, 11, 26 Adder 8 Operation parameter storage memory 9 Gamma correction value storage Memory 12, 27 Gamma-corrected video signal output terminal 23 Address signal generation circuit 25 Memory

Claims (2)

[Claims] 1. A secondary computing equation ^{_{Eo = a n · Ei 2 +}} b n ·
Dynamic a required plurality of operation parameters of ei + c _n, a calculation parameter storage unit for storing a plurality according to the value of the dynamic range set for the video signal to the gamma correction, the clock signal, and sets the video signal to the gamma correction A counter for sequentially counting a required number according to the value of the range; a count output signal from the counter and a plurality of operation parameters of a secondary operation expression from the operation parameter storage device, multiplied according to the secondary operation expression And a plurality of multipliers and adders configured to calculate a gamma correction value by adding, and a plurality of required gamma correction values from the plurality of multipliers and adder, a count output signal from the counter. To sequentially read out the gamma correction value according to the level of the video signal to be gamma corrected A correction value storage device, storing a plurality of required calculation parameters of a secondary calculation expression to be input in the calculation parameter storage device, sequentially counting clock signals to be input by the counter, and counting the counted output signal A plurality of operation parameters are sequentially read from the operation parameter storage device, and a gamma correction value is calculated by multiplying and adding the counted output signal and the plurality of operation parameters by the plurality of multipliers and adders. A plurality of gamma correction values are sequentially stored in the gamma correction value storage device based on the counted output signal, a video signal is input to the gamma correction value storage device, and a gamma correction value corresponding to the level of the video signal is read and output. A gamma correction circuit characterized by performing gamma correction by: 2. A plurality of multiplications according to claim 1, wherein the multiplication and the multiplication are performed in accordance with the quadratic expression Eo = a _n Ei ² + b _n Ei + c _n to calculate the gamma correction value. vessels and adder and multiplier to output the parameters a _n a multiplication value a _n · Ei by multiplying the count output signal from the arithmetic parameter storage unit from the counter that inputs the multiplication from the multiplier to the input addition of the value a and _n · Ei and the arithmetic parameter storage unit by adding the parameter b _n from the additional value a _n · Ei + b _n to output the adder, the adder and the count output signal from the counter input value a _n · Ei + b _n and the multiplication to the multiplication value a _n
A multiplier for outputting Ei ² + b _n · Ei, and a multiplied value a _n · Ei ² + b _n · E from the multiplier for input
i and the parameter c _n from the operation parameter storage device are added to obtain a gamma correction value a _n · Ei ² + b _n · Ei + c _n
A gamma correction circuit, comprising: