JPH10336485A - Horizontal automatic frequency control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the horizontal automatic frequency control circuit that provides an output of a prescribed control pulse to a horizontal oscillation circuit at all times against every fluctuation in a horizontal deflection output. SOLUTION: A chevroned wave horizontal deflection output H1 whose level is decreased/increased and whose width is increased/decreased depending on art increase/decrease in an amplitude of an image input signal is given to a noninverting input terminal of an operational amplifier 11, and a slice level voltage S generated by a slice level generating section 10 based on an ABL voltage B corresponding to the increase/decrease in the amplitude of the image input signal is given to an inverting input terminal of the operational amplifier 11 to allow the operational amplifier 11 to provide a control signal C with a constant pulse width at all times.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal automatic frequency control circuit (hereinafter referred to as "horizontal AFC circuit") for controlling the phase of a horizontal deflection output pulse of a television receiver.
It is about.

[0002]

2. Description of the Related Art In a conventional television receiver, a horizontal oscillation circuit is stabilized by comparing the phase of an image input signal with the phase of a horizontal deflection output. However, since the waveform of the horizontal deflection output depends on the high voltage value of the CRT, that is, depends on the luminance of the television receiver, there is no problem in uniform image output. However, when a locally high luminance signal is input, According to the method, the phase of the image input signal and the phase of the horizontal deflection output are relatively shifted during the period depending on the peak value and the width of the horizontal deflection output. Therefore, a horizontal AFC circuit that matches the phases of the image input signal and the horizontal deflection output has been devised. FIG. 5 is a circuit diagram showing a conventional horizontal AFC circuit, and FIG. 6 is a circuit diagram showing another conventional horizontal AFC circuit. The horizontal AFC circuit 100 of FIG. 5 inputs the horizontal deflection output H1 obtained by dividing the horizontal deflection output H by the capacitors C1 and C2 to the positive input terminal of the comparator 110, and divides the power supply V by the resistors R10 and R11. The obtained constant voltage is input to the negative input terminal as the slice level L. As a result, as shown in FIG. 7, the slice level L is preset to the level of the points P1 and P2 where the widths coincide with the horizontal deflection outputs H1 having different widths, and the control having a constant pulse width P1-P2. The pulse C is output from the comparator IC to the horizontal oscillation circuit. On the other hand, the horizontal AFC circuit 101 of FIG. 6 inputs the horizontal deflection output H1 to the negative input terminal of the comparator 110, and generates a trigger point of the control pulse C by the diode D10, the resistors R12, 13, R14 and the capacitor C11. It has a configuration. Thereby, as shown in FIG. 8, two horizontal deflection outputs H having different widths are obtained.
The control pulse C having a constant pulse width P1-P2 is set in advance so as to trigger at a point P1 where the width coincides with 1 and the comparator 110 outputs the control pulse C to the horizontal oscillation circuit.

[0003]

However, the above-mentioned conventional horizontal AFC circuit has the following problems. FIG.
In the horizontal AFC circuits 100 and 101 shown in FIG.
Since the slice level L is preset to the level of the points P1 and P2 whose widths match the horizontal deflection output H1 of a different width, and has a fixed configuration that is preset so as to trigger at the point P1, It is not possible to cope with variations in the horizontal deflection output H1 having various widths. That is, the horizontal deflection output H
When the height or width of 1 changes, the level at which the two horizontal deflection outputs H1 having different widths match due to the change may not match the set slice level L or trigger point. For this reason, the pulse width of the control pulse C changes according to the fluctuation of the horizontal deflection output H1, and the phase between the image input signal and the horizontal deflection output H is shifted. As a result, in the window pattern as shown in FIG. 9, a part which is originally symmetrical as shown in FIG. 9A becomes asymmetrical as shown in FIG. 9B.

An object of the present invention is to provide a horizontal AFC circuit capable of always outputting a constant control pulse to a horizontal oscillation circuit with respect to all fluctuations of a horizontal deflection output. And

[0005]

In order to solve the above-mentioned problems, the present invention reduces and increases the level of an image input signal in accordance with the amount of increase and decrease of the amplitude, and increases and decreases the voltage width thereof. A horizontal AFC that generates a mountain-shaped signal to be generated based on a horizontal deflection output and generates a control signal for controlling a horizontal oscillation circuit based on the mountain-shaped signal
In the circuit, a slice level generation unit that generates a slice level signal that increases or decreases the voltage level in accordance with the amount of increase or decrease in the amplitude of the image input signal, and compares the peak signal and the slice level signal, When the voltage level is equal to or higher than the voltage level of the slice level signal, a comparison unit that outputs a control signal of a constant voltage level is provided. With this configuration, when the amplitude of the image input signal increases (or decreases), a low and wide (or high and narrow) mountain-shaped signal is generated, and the voltage level is high in the slice level generation unit ( (Or lower) slice level signals are generated, and these signals are compared in the comparator. When the voltage level of the peak signal is equal to or higher than the voltage level of the slice level signal, a control signal of a constant voltage level is output.

[0006]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a horizontal deflection adjusting portion of a television receiver including a horizontal AFC circuit according to one embodiment of the present invention, and FIG. 2 is a circuit diagram of the horizontal AFC circuit shown in FIG. As shown in FIG. 1, the horizontal deflection adjusting portion for the CRT 40 of the television receiver includes a horizontal AFC circuit 1, a horizontal oscillation circuit 2, a horizontal drive circuit 3, and a horizontal output circuit 4 connected in series.
Are provided.

The horizontal output circuit 4 is a circuit that outputs a horizontal deflection output H for synchronizing horizontal scanning of the CRT 40 based on a signal from the horizontal drive circuit 3. Specifically, N
It has a PN type bipolar transistor Q2, and a capacitor C3 and an S-shaped correction capacitor C4 which form a resonance circuit together with the horizontal deflection coil of the CRT 40 are sequentially connected to the collector of the transistor Q2. Further, a pin correction circuit including a coil L1, a capacitor C5 and a diode D1 is connected to these capacitors C3 and C4.

The output terminal of the horizontal output circuit 4 is connected to a horizontal AF circuit via a division circuit 5 and an ABL voltage generation circuit 6.
It is also connected to the C circuit 1. The dividing circuit 5 includes series capacitors C1 and C2, and has a function of dividing the horizontal deflection output H input from the capacitor C1 side and outputting a horizontal deflection output H1 as a mountain-shaped signal. On the other hand, A
The BL voltage generation circuit 6 uses the ABL
A flyback transformer T provided between the output terminal of the horizontal output circuit 4 and the anode of the CRT 40; and resistors connected to the primary and secondary sides of the flyback transformer T, respectively. R4, R5, a constant power source E1 for supplying a constant voltage V1 to the resistor R4, and a capacitor C6 provided at a connection point between the resistors R4, R5.
The ABL voltage B is output from the connection point between the terminals 4 and R5. Specifically, the voltage value VB of the ABL voltage B is expressed by the following equation (1). Here, I is a beam current flowing from the secondary side of the flyback transformer T to the anode of the CRT 40 via the diode D2. VB = V1−R4 × I (1) When the amplitude of the image input signal increases, the current value of the beam current I increases, and as a result, the ABL voltage B decreases. Conversely, when the amplitude of the image input signal decreases, the ABL voltage B increases.

The horizontal AFC circuit 1 includes horizontal deflection outputs H1 and AB from the dividing circuit 5 and the ABL voltage generation circuit 6.
This is a circuit that generates a control signal C having a constant pulse width based on the L voltage B, and includes a slice level generation unit 10 and an operational amplifier 11.

As shown in FIG. 2, the slice level generating section 10 generates a slice level voltage S based on the ABL voltage B from the ABL voltage generating circuit 6,
The base has a PNP bipolar transistor Q1 connected to the output terminal of the ABL voltage generation circuit 6 via a resistor R1 and a capacitor C7. This transistor Q1
Is connected to a constant power supply E2 via a resistor R3, and the collector is connected to a negative input terminal of the operational amplifier 11 via a grounded resistor R2.

On the other hand, the operational amplifier 11 is an element for comparing the horizontal deflection output H1 from the dividing circuit 5 with the slice level voltage S from the slice level generator 10, and has a positive input terminal connected to the connection point of the capacitors C1 and C2. Connected to
The negative input terminal is connected to the resistor R2 of the slice level generator 10. The operational amplifier 11 has a horizontal deflection output H
When the first voltage level is equal to or higher than the slice level voltage S, the control signal C having a constant voltage is output to the horizontal oscillation circuit 2.

Next, the operation of the horizontal AFC circuit of this embodiment will be described. As shown in FIG. 1, the horizontal deflection output H corresponding to the image input signal is output from the horizontal output circuit 4 to the horizontal deflection coil of the CRT 40, and the CRT 40 is horizontally synchronized. In parallel with this, the horizontal deflection output H
Is output to the dividing circuit 5 and becomes a horizontal deflection output H1 and is input to the operational amplifier 11 of the horizontal AFC circuit 1,
The predetermined ABL voltage B is input from the ABL voltage generator 6 to the slice level generator 10.

At this time, when the amplitude of the image input signal increases and the screen of the CRT 40 changes from dark to bright, the horizontal A
The waveform of the horizontal deflection output H1 input to the positive input terminal of the operational amplifier 11 of the FC circuit 1 is as shown in FIG.
It changes to a chevron shape with a low level and a wide width. When the amplitude of the image input signal increases, the beam current I flowing from the flyback transformer T to the anode of the CRT 40 shown in FIG.
The L voltage B decreases. As a result, the base voltage of the transistor Q1 in the slice level generator 10 of the horizontal AFC circuit 1 decreases, the current to the resistor R2 increases, and the slice level input to the negative input terminal of the operational amplifier 11 via the resistor R2. The level of the voltage S moves in the higher level direction. As a result, as shown in FIG. 3A, the slice level voltage S reaches the level of “M1”, and the point P of the width a
A constant voltage is output between 1 and P2. Therefore, as shown in FIG. 3B, the control signal C having the pulse width a
Is input from the operational amplifier 11 to the horizontal oscillation circuit 2.

In this state, when the amplitude of the image input signal decreases and the screen of the CRT 40 becomes dark, the waveform of the horizontal deflection output H1 input to the positive input terminal of the operational amplifier 11 changes as shown in FIG. , Change to a chevron shape with a high level and a narrow width. Therefore, as shown by the two-dot chain line, when the slice level voltage S remains at the previous level M1, the control signal C having a width b smaller than the width a is obtained.
Is generated. However, when the amplitude of the image input signal decreases, the beam current I shown in FIG.
Since the ABL voltage B from the BL voltage generating circuit 6 increases, the base voltage of the transistor Q1 increases, and the level of the slice level voltage S moves in the low level direction corresponding to the waveform of the horizontal deflection output H1. As a result, as shown by the solid line in FIG.
The control signal C having a pulse width a is output from the operational amplifier 11 to the horizontal oscillation circuit 2 as shown in FIG. 4B.

As described above, according to the horizontal AFC circuit of this embodiment, the control signal C having a constant pulse width a is always supplied to the horizontal AFC circuit 1 in accordance with the amplitude fluctuation of the image input signal, that is, the waveform change of the horizontal deflection output H1. Output to the horizontal oscillation circuit 2, no phase shift of the horizontal deflection output H occurs.
As a result, the distortion of the window pattern as shown in FIG. 9B does not occur, and a normal image without distortion can be displayed on the CRT 40.

The present invention is not limited to the above embodiment, and various modifications and changes can be made within the scope of the invention. In the above embodiment, the slice level signal is generated using the automatic luminance limiting voltage. However, the slice level signal can be generated using the image input signal.

[0017]

As described above in detail, according to the horizontal AFC circuit of the present invention, the voltage level of the slice level signal increases or decreases in accordance with the change of the mountain-shaped signal corresponding to the change of the image input signal. A control signal having a constant pulse width can always be output in response to a change in the amplitude of the image input signal, that is, any change in the horizontal deflection output. As a result, the phase of the image input signal and the horizontal deflection output can always be accurately determined. There is an excellent effect that they can be combined.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a horizontal deflection adjusting portion of a television receiver including a horizontal AFC circuit according to one embodiment of the present invention.

FIG. 2 is a circuit diagram of the horizontal AFC circuit shown in FIG.

3A is a waveform diagram showing a horizontal deflection output and a slice level voltage when the amplitude of an image input signal is large, and FIG. 3B is a control signal generated in that case; FIG.

4A is a waveform diagram showing a horizontal deflection output and a slice level voltage when the amplitude of an image input signal is small, and FIG. 4B is a control signal generated in that case; FIG.

FIG. 5 is a circuit diagram showing a conventional horizontal AFC circuit.

FIG. 6 is a circuit diagram showing another conventional horizontal AFC circuit.

FIG. 7 is an explanatory diagram showing control signal generation by the horizontal AFC circuit of FIG. 5;

FIG. 8 is an explanatory diagram showing control signal generation by the horizontal AFC circuit of FIG. 6;

FIG. 9A is a schematic diagram showing an abnormal window pattern, and FIG. 9B is a schematic diagram showing an asymmetrical abnormal window pattern.

[Explanation of symbols]

1: Horizontal AFC circuit, 2: Horizontal oscillation circuit, 3: Horizontal drive circuit, 4: Horizontal output circuit, 5: Split circuit,
6 ... ABL voltage generation circuit, 10 ... Slice level generation unit, 11 ... Op amp, B ... ABL voltage, C ...
Control signal, H: horizontal deflection output, H1: split horizontal deflection output S: slice level voltage

Claims (3)

[Claims] 1. A mountain-shaped signal that decreases and increases its level according to the amount of increase and decrease of the amplitude of an image input signal and increases and decreases its voltage width based on a horizontal deflection output, A horizontal automatic frequency control circuit for generating a control signal for controlling a horizontal oscillation circuit based on the mountain-shaped signal, wherein a slice level signal for increasing or decreasing a voltage level according to an increase or decrease in amplitude of the image input signal is generated. A slice level generation unit that compares the peak signal and the slice level signal,
A horizontal automatic frequency control circuit, comprising: a comparator that outputs the control signal at a constant voltage level when the voltage level of the peak signal is equal to or higher than the voltage level of the slice level signal. 2. The horizontal automatic frequency control circuit according to claim 1, wherein the slice level generating section generates the slice level signal for decreasing and increasing a voltage level in accordance with an increase and decrease of an automatic luminance limit voltage. A horizontal automatic frequency control circuit, characterized in that: 3. The horizontal automatic frequency control circuit according to claim 2, wherein the mountain-shaped signal is a divided horizontal deflection output obtained by dividing the horizontal deflection output by a capacitor, A PNP-type bipolar transistor having a base to which the automatic brightness limiting voltage is input, an emitter to which a constant voltage is input, and a collector having one end connected to a grounded resistor; A horizontal automatic frequency control circuit, comprising: an operational amplifier having a positive input terminal for inputting a deflection output and a negative input terminal connected to the collector of the transistor via the resistor.