JPH10335210A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable light exposure conditions to be accurately determined by a method wherein a region of the same film structure with the main part of a semiconductor device is formed when a resist pattern is formed, and one or more indexes for confirming the dimensions or forming conditions of the resist pattern are provided to the region. SOLUTION: A semiconductor device 13, alignment marks, and indexes are formed for an exposure region. An index 12 is formed on a scribe line 11 nearly at the center of the exposure region. The dimension confirming index 34 of the index 12 is formed identical in dimensions to the most important part of the semiconductor device 13 and simple in shape, and a first and a second focus position confirming indexes, 35 and 36, are formed so as to decrease gradually in size with a distance from the center. The step structure at the index 12 is set similar to that of the most important part of the semiconductor device, whereby the behavior of a resist pattern in the semiconductor device is grasped basing on that of a resist pattern on the index 12. By this setup, the forming conditions of a resist pattern can be objectively and surely determined.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and its manufacture, and more particularly to a lithography process for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In recent years, the miniaturization of semiconductor devices has been progressing year by year.
Resolution below the line wavelength is also required. The lithography step of the semiconductor device manufacturing is the most important step in forming a pattern, and the lower layer film is etched using the resist film formed in the lithography step as a mask. This greatly affects the performance and yield of the semiconductor device. At present, reduction projection exposure is mainly used in the lithography process. An important condition in the reduction projection exposure is determination of an exposure time and a focus position of an exposure apparatus. As described above, in performing the resolution equal to or longer than the exposure wavelength, the setting of the exposure time and the focal position is performed in the manufacturing process of the semiconductor device while fully considering the film configuration and the steps of each process of the semiconductor device. Various characteristics of the exposure apparatus must be sufficiently understood. A method for confirming and determining the exposure conditions of such a reduced projection exposure apparatus is described in Japanese Patent Application Laid-Open No. 04-162511.
According to the above-mentioned Japanese Unexamined Patent Publication, a method of exposing a semiconductor substrate using a dedicated photomask is adopted, and the method is characterized in that exposure conditions can be easily confirmed. It is not possible to consider steps in manufacturing and various characteristics of the reduced projection exposure apparatus, and it is not sufficient to confirm exposure conditions with a finer pattern.

[0003] Next, a conventional method for confirming general exposure conditions will be described with reference to FIGS. 8, 9 and 10. FIG. 8 is a diagram simply showing a lithography process for forming a gate electrode in a general semiconductor device manufacturing, and a cross-sectional view is shown in FIG.
It is the figure seen from C direction of A line. In FIG. 8, an oxide film 81 (hereinafter, referred to as a Locos oxide film) for element isolation is selectively formed to have a thickness of about 400 nm, and a gate oxide film having a thickness of about 10 nm is formed on the active portion 82. Further, polycrystalline silicon 8 as a gate electrode material
3 is formed to a thickness of 170 nm. The resist pattern 84 is formed so as to extend over the Locos oxide film 81 and the active region 82. The shape of the resist pattern 84 changes greatly depending on the exposure conditions of the reduction projection exposure apparatus. The exposure conditions are roughly divided into an exposure time and a focus position. It is no exaggeration to say that the resist shape is determined by the above two conditions. FIG. 9 shows a general method for determining the two conditions. FIG. 9 is a view showing semiconductor devices 92 arranged on a semiconductor substrate 91. Each of the semiconductor devices 92 is independently exposed by reduced projection exposure. In the example of FIG. 9, the exposure amount is changed in the horizontal direction, and the focal position is changed in the vertical direction. Since each semiconductor device 92 is exposed under different conditions by this method, there is an optimum exposure condition in the semiconductor device 92, and the semiconductor device 92 is exposed to an electron beam scanning microscope (hereinafter, referred to as SEM) or the like. The optimal conditions can be determined by observation. However, it is difficult to observe a defect as shown in FIG. 10 by observation using an SEM or the like. FIG. 10 is a view of the resist pattern 101 as viewed from above and a cross-sectional view as viewed from the direction C of the line AA. When the resist pattern is formed with a good resist pattern 103 on the semiconductor substrate 104, the resist pattern has a clean rectangular shape. Such a pattern is formed like a pattern 102, and it is difficult to find such a pattern by observing with a SEM or the like, and it is easy to find it by observing a cross section. It becomes a factor to lower.

[0004]

However, the above-mentioned prior art has the following problems.

In general, the exposure amount and the focus position, which are the main exposure conditions of the reduced projection exposure, are observed from above the semiconductor substrate by SEM or the like, and the cross section cannot be observed. Therefore, if the resist pattern shape is, for example, a reverse taper, it is difficult to capture the resist pattern, and when such a pattern is observed, it is not possible to confirm whether the pattern is optimal, and consequently the exposure condition is not optimal. In many cases, the semiconductor substrate is exposed to light. Therefore, the shape of the resist pattern is not good, which may cause a problem in a subsequent etching process.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a semiconductor device capable of simply and accurately determining the conditions of the exposure amount and the focus position, which are the main conditions of exposure, without observing a cross section. It is an object of the present invention to provide a manufacturing method thereof.

[0007]

According to a first aspect of the present invention, there is provided a semiconductor device having a structure similar to a film configuration of a main part of the semiconductor device when a desired resist pattern is formed in a lithography process of manufacturing the semiconductor device. Is formed, and at least one index capable of confirming a condition for forming the size or shape of the resist pattern is formed in the region.

According to the present invention, since the semiconductor device has an index capable of objectively judging the size and shape of the resist pattern, there is an effect that the exposure conditions at the time of exposure can be accurately determined.

In a semiconductor device according to a second aspect of the present invention, when a desired resist pattern is formed in a lithography step of manufacturing a semiconductor device, a region having a structure similar to a film configuration of a main portion of the semiconductor device is formed. In the above-mentioned region, indices capable of confirming the conditions for forming the size or shape of the resist pattern are formed at least at two places, that is, the center and the periphery of the exposure range.

According to the present invention, since indices for objectively judging the size and shape of the resist pattern in the semiconductor device are located at the center and the periphery of the exposure range, the exposure conditions at the time of exposure can be determined with high accuracy. This has the effect that conditions can be checked in consideration of the state of the exposure apparatus, such as the image plane inclination and distortion of the apparatus.

In a semiconductor device according to a third aspect of the present invention, when a desired resist pattern is formed in a lithography step of manufacturing a semiconductor device, a region having a structure similar to a film configuration of a main portion of the semiconductor device is formed. In the above-mentioned region, indices capable of confirming the conditions for forming the size or shape of the resist pattern are formed at least at five positions, that is, at the center of the exposure range and at four corners of the periphery.

According to the present invention, since the indices for objectively judging the size and shape of the resist pattern in the semiconductor device are located at the four corners of the central portion and the peripheral portion of the exposure range, the exposure conditions at the time of exposure are accurately determined. At the same time, there is an effect that the condition can be confirmed in consideration of the state of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus over the entire exposure range.

In a semiconductor device according to a fourth aspect of the present invention, when a desired resist pattern is formed in a lithography step of manufacturing a semiconductor device, if the film configuration of a main portion of the semiconductor device has two regions, the film configuration may be changed. Accordingly, a region having the same structure as the two regions is formed, and at least one index capable of confirming a condition for forming the size or shape of the resist pattern is formed in the region.

According to the present invention, since there are two regions in the semiconductor device having indices for objectively judging the size and shape of the resist pattern, it is possible to accurately determine exposure conditions adapted to the two regions.

In a semiconductor device according to a fifth aspect of the present invention, when a desired resist pattern is formed in a lithography process of manufacturing a semiconductor device, if the film configuration of a main portion of the semiconductor device has two regions, the film configuration may be changed. Accordingly, a region having the same structure as the two regions is formed, and in this region, indices capable of confirming the conditions for forming the size or shape of the resist pattern are formed at least at two positions, that is, the center and the periphery of the exposure range. It is characterized by.

According to the present invention, since there are two regions in the semiconductor device having indices for objectively judging the size and shape of the resist pattern, the exposure conditions suitable for the two regions can be determined accurately and at the same time, This is effective in that conditions can be checked in consideration of the state of the exposure apparatus such as image plane tilt and distortion.

In a semiconductor device according to a sixth aspect of the present invention, when a desired resist pattern is formed in a lithography process of manufacturing a semiconductor device, if the film configuration of a main portion of the semiconductor device has two regions, Accordingly, a region having the same structure as the two regions is formed, and indices capable of confirming the formation conditions of the size or shape of the resist pattern in the region are provided at least at five positions at the center of the exposure range and four corners of the peripheral portion. It is characterized by forming.

According to the present invention, since the index for objectively judging the size and shape of the resist pattern is provided in the two regions in the semiconductor device, the exposure conditions suitable for the two regions can be determined with high accuracy, and at the same time, the exposure device This has the effect that the condition can be checked in consideration of the state of the exposure apparatus such as the image plane tilt and distortion over the entire exposure range.

According to a seventh aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
A semiconductor device according to claim 1 is used.

According to the present invention, since the semiconductor device has an index capable of objectively judging the size and shape of the resist pattern, the exposure conditions at the time of exposure can be determined with high accuracy, thereby improving the yield and performance of the semiconductor device. It has the effect of being able to.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
A semiconductor device according to claim 2 is used.

According to the present invention, the indices for objectively judging the size and shape of the resist pattern in the semiconductor device are located at the center and the periphery of the exposure range, so that the exposure conditions at the time of exposure can be accurately determined. Since conditions can be checked in consideration of the state of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus, the yield and performance of the semiconductor device can be improved.

According to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising the steps of:
A semiconductor device according to claim 3 is used.

According to the present invention, since the indices for objectively judging the size and shape of the resist pattern in the semiconductor device are located at the four corners of the central portion and the peripheral portion of the exposure range, the exposure conditions at the time of exposure can be accurately determined. At the same time, the condition of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus can be checked in consideration of the entire exposure range, so that the yield and performance of the semiconductor device can be improved.

According to a tenth aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein the semiconductor device according to the fourth aspect is used in a lithography step of manufacturing a semiconductor device.

According to the present invention, since the index for objectively judging the size and shape of the resist pattern is provided in the two regions in the semiconductor device, the exposure conditions adapted to the two regions can be determined with high accuracy. This has the effect of improving the yield and performance of the device.

A semiconductor device manufacturing method according to an eleventh aspect of the present invention is characterized in that the semiconductor device according to the fifth aspect is used in a lithography step of manufacturing a semiconductor device.

According to the present invention, since the index for objectively determining the size and shape of the resist pattern is provided in the two regions in the semiconductor device, the exposure condition suitable for the two regions can be determined with high accuracy. Since the conditions can be checked in consideration of the state of the exposure apparatus such as the image plane inclination and distortion, the yield and performance of the semiconductor device can be improved.

A method of manufacturing a semiconductor device according to a twelfth aspect of the present invention is characterized in that the semiconductor device according to the sixth aspect is used in a lithography step of manufacturing a semiconductor device.

According to the present invention, since the semiconductor device has indices for objectively judging the size and shape of the resist pattern in the two regions, the exposure conditions suitable for the two regions can be determined with high accuracy. Since the conditions can be checked in consideration of the state of the exposure apparatus such as the image plane tilt and distortion over the entire exposure range, the yield and performance of the semiconductor device can be improved.

[0031]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a diagram showing an embodiment of a semiconductor device and a method of manufacturing a semiconductor device according to the first and seventh aspects of the present invention. In FIG. 1, one exposure region includes a semiconductor device 13 and a scrub line 11 on which alignment marks and indices for manufacturing the semiconductor device are formed. An index 12 is formed substantially at the center of the exposure area on the scribe line 11. The index 12 is the greatest feature of the present invention. First, the most important part of the semiconductor device 13 will be described with reference to FIG. FIG. 2 is composed of a view of the semiconductor device as viewed from above and a cross-sectional view of the semiconductor device as viewed from the direction C along the line AA. In FIG. 2, a Locos oxide film 21 is selectively formed to about 400 nm, and a gate oxide film is formed to about 10 nm in the active region 22. Further, polycrystalline silicon 22 is formed to a thickness of 170 nm as a gate electrode material. A resist pattern 24 is formed on such a step structure.
To form The shape and dimensions of the resist pattern 24 are influenced by various conditions such as the exposure amount and the focal position of the reduction projection exposure apparatus. In the prior art, as shown in FIG. 4, a semiconductor device 42 is exposed on a semiconductor substrate 41. At this time, for example, the exposure is performed by changing the exposure amount in the horizontal direction and the focal position in the vertical direction, and the resist pattern 24 is exposed. Is confirmed by SEM or the like to determine the conditions of the exposure amount and the focus position. However, the actual pattern is not always straight as the resist pattern 24, and it is not unusual that the actual pattern has a more complicated and complicated shape. In that case, there is a possibility that the measurement of the dimensions and the determination of the shape cannot be performed objectively. In order to solve the above problem, in the present invention, the index shown in FIG. 3 is arranged at the position of the index 12 shown in FIG. FIG.
Is viewed from above and a cross-sectional view as viewed from the direction C of the line AA. In FIG. 3, Locos oxide film 3
1 and the gate oxide film on the active region 32 and the gate electrode material polycrystalline silicon 33 located thereabove have exactly the same structure as that of FIG. That is, the step structure is the same as the most important part of the semiconductor device. As a result, on the index 12, factors that influence the size and shape of the resist material, such as the origin of the focal position in the reduction projection exposure apparatus and the reflectance from the semiconductor substrate, are the same as the most important parts of the semiconductor device. Therefore, by checking the behavior of the resist pattern on the index 12, it becomes possible to grasp the behavior of the resist pattern in the semiconductor device. In FIG. 3, the dimension confirmation index 34 is the same as the dimension of the most important part of the semiconductor device. Further, the first focus position confirmation index 35 and the second focus position confirmation index 36 are formed such that the dimensions gradually decrease from the center. As in the prior art, the method for determining the conditions is to expose a semiconductor device 42 on a semiconductor substrate 41 as shown in FIG. 4 and, at this time, to change the exposure amount in the horizontal direction and the focus position in the vertical direction, for example. The dimension of the resist of the index 34 for dimension confirmation is set to SE.
The amount of exposure is determined by checking with M or the like. In this case, unlike the pattern formed on the semiconductor device, the dimension confirmation index 34 has a simple shape, so that the dimension can be easily measured, and furthermore, the measurement error by the operator is minimized. Is possible. For the focal position, see SE
Index 3 for first focus position confirmation by M or metal microscope
5 or by observing the resist pattern of the second focus position confirmation index 36. More specifically, when the focus position is optimal, the largest number of patterns are formed from the center pattern of the resist pattern of the first focus position confirmation index 35 or the second focus position confirmation index 36 to the minute pattern. ing. In other words, as the focal position deviates from the optimal position, the dimension in which the resist pattern can be formed becomes larger. Therefore, it can be determined that the larger the number of the resist patterns, the more the optimal focal position. This is a method of confirming the same or more reliable than observing the resist cross section, and can be objectively confirmed, so that it does not depend on the operator. By these things, in semiconductor device manufacturing,
When the conditions for forming the resist pattern are determined, the conditions can be objectively and reliably determined, and at the same time, the process control can be reliably performed by using the index of the present invention in the process control. In addition, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of a lithography step having the largest number of steps in manufacturing a semiconductor device can be determined with certainty, and the process management ability is also improved. This is effective for improving the production yield and performance of the device.

In this embodiment mode, the step of forming a gate electrode has been described. However, the present invention is not limited to the step of forming a gate electrode, and can be applied to any lithography step. In particular, the effect is high in a process requiring fine processing. In this embodiment, reduction projection exposure has been described. However, the present invention is not limited to reduction projection exposure, and can be applied to an exposure method using an optical system. For example,
An exposure technique using a mirror reflection type optical system is exemplified. Further, the present invention can be used for checking the conditions of an etching step immediately after a lithography step. Further, the present invention is not limited to semiconductor manufacturing, and can be applied to a technical field using a similar lithography technique. For example, it is the manufacture of a liquid crystal display.

(Embodiment 2) FIG. 5 is a diagram showing an embodiment of a semiconductor device and a method of manufacturing a semiconductor device according to the second and eighth aspects of the present invention. In FIG. 5, one exposure region includes a semiconductor device 53 and a scrub line 51 on which alignment marks and indicators for manufacturing the semiconductor device are formed. An index 52 is formed substantially at the center of the exposure area on the scribe line 51. Further, the point different from the first embodiment is that the index 54 is also formed on the periphery of the exposure area on the scribe 51. The method of determining the exposure amount and the focus position, which are the exposure conditions, and the film structure and step structure of the semiconductor device and the index are the same as those in the first embodiment. Here, the condition confirmation of the exposure amount and the focus position of the exposure condition is performed by using the index 5 at the center of the exposure area.
This is performed by using both the index 2 and the peripheral index 54. In the exposure method using the reduced projection exposure, since a spherical lens is used in the reduced projection optical system, the focal position where an image is formed may be different between the central portion and the peripheral portion of the exposure area, particularly with respect to the focal position. Regarding the exposure amount, since the exposure illuminance over the entire exposure region is not constant and slightly uneven, the optimum exposure amount is strictly different between the central portion and the periphery of the exposure region. Especially when performing exposure equal to or less than the exposure wavelength in the progress of miniaturization of semiconductor devices, the above-mentioned difference in the focus position and difference in the amount of exposure must also be considered in order to obtain a good resist pattern over the entire exposed area. It is necessary to enter. The above-described index 52 at the center of the exposure region and the index 54 at the periphery of the exposure region both determine the focal position and the exposure amount that sufficiently satisfy the accuracy required for manufacturing a semiconductor device, thereby determining the entire exposure region. Thus, a good resist pattern shape can be obtained. Thus, in the manufacture of a semiconductor device, it is possible to objectively and surely determine the conditions by taking into account the entire exposure region when determining the conditions for forming a resist pattern, and at the same time, the present invention If the index is used, it is possible to perform reliable process control, and it is possible to easily detect an abnormality of the exposure apparatus by inspecting the two indexes. In addition, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of a lithography process having the most steps in manufacturing a semiconductor device can be reliably determined, and the process management ability is also improved. This is effective for improving the production yield and performance of the device.

In this embodiment mode, the step of forming a gate electrode has been described. However, the present invention is not limited to the step of forming a gate electrode, and can be applied to any lithography step. In particular, the effect is high in a process requiring fine processing. In this embodiment, reduction projection exposure has been described. However, the present invention is not limited to reduction projection exposure, and can be applied to an exposure method using an optical system. For example,
An exposure technique using a mirror reflection type optical system is exemplified. Further, the present invention can be used for checking the conditions of an etching step immediately after a lithography step. Further, the present invention is not limited to semiconductor manufacturing, and can be applied to a technical field using a similar lithography technique. For example, it is the manufacture of a liquid crystal display.

(Embodiment 3) FIG. 6 is a diagram showing an embodiment of a semiconductor device and a method of manufacturing a semiconductor device according to the third and ninth aspects of the present invention. In FIG. 6, one exposure region includes a semiconductor device 63 and a scrub line 61 on which alignment marks and indicators for manufacturing the semiconductor device are formed. An index 62 is formed substantially at the center of the exposure area on the scribe line 61. Further, the difference from the first and second embodiments is that the indices 64 are also formed at the four corners of the peripheral portion of the exposure area on the scribe 61. The method of determining the exposure amount and the focus position, which are the exposure conditions, and the film structure and step structure of the semiconductor device and the index are the same as those in the first embodiment.
Here, the confirmation of the exposure amount and the focus position of the exposure condition is performed by using both the index 62 at the center of the exposure area and the index 64 at the four corners of the peripheral area. In the exposure method using the reduced projection exposure, as described above, the focus position and the optimum exposure amount are different between the central part and the peripheral part of the exposure area. In addition, since lens aberration and lens distortion (image distortion) are present due to the characteristics of the reduced projection exposure optical system, the above-described focus is particularly required when performing exposure at a wavelength equal to or less than the exposure wavelength as the miniaturization of semiconductor devices progresses. In order to obtain a good resist pattern over the entire exposed area, it is necessary to take into account differences in position and differences in exposure amount. In that case, the center of the exposure region and one peripheral portion described in Embodiment 2 may not be sufficient for forming a particularly fine pattern. In other words, it is desirable to confirm the conditions at the center of the exposure region and at the four corners of the periphery so that the above-described lens aberration and lens distortion can be remarkably confirmed. Further, it is possible to determine whether the lens aberration and the lens distortion are normal by these operations, and it is also possible to grasp the state of the exposure apparatus. All of the indices 62 at the center of the exposure area and the indices 64 at the four corners of the periphery of the exposure area determine the focal position and the exposure amount that sufficiently satisfy the accuracy required for manufacturing a semiconductor device, thereby determining the entire exposure area. Thus, a good resist pattern shape can be obtained. Thus, in the manufacture of a semiconductor device, it is possible to objectively and surely determine the conditions by taking into account the entire exposure region when determining the conditions for forming a resist pattern, and at the same time, the present invention If the index is used, it is possible to perform reliable process control, and it is possible to easily detect an abnormality of the exposure apparatus by inspecting the five indexes. Further, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of the lithography step having the most steps in manufacturing the semiconductor device can be reliably determined.
Since the process management ability is also improved, it is effective in improving the yield and performance of semiconductor device manufacturing.

In this embodiment mode, the step of forming a gate electrode has been described. However, the present invention is not limited to the step of forming a gate electrode, and can be applied to any lithography step. In particular, the effect is high in a process requiring fine processing. In this embodiment, reduction projection exposure has been described. However, the present invention is not limited to reduction projection exposure, and can be applied to an exposure method using an optical system. For example,
An exposure technique using a mirror reflection type optical system is exemplified. Further, the present invention can be used for checking the conditions of an etching step immediately after a lithography step. In the present embodiment, the conditions are determined by providing indexes at five places.
This is not limited to five locations. If the index can be provided, more indexes can be provided and the condition can be determined, and the same effect as in the present embodiment can be obtained. Also,
The present invention is not limited to semiconductor manufacturing, and can be applied to technical fields using similar lithography techniques. For example, it is the manufacture of a liquid crystal display.

(Embodiment 4) FIGS. 2 and 7 show a semiconductor device according to the fourth, fifth, sixth, tenth, eleventh and twelfth aspects of the present invention. FIG. 4 is a diagram illustrating an embodiment of a method for manufacturing a semiconductor device. FIG. 2 is composed of a view of the semiconductor device as viewed from above and a cross-sectional view of the semiconductor device as viewed from the direction C along the line AA. The structure of FIG. 2 is exactly the same as that shown in the first embodiment. In each of the first to third embodiments, L in FIG.
The exposure conditions are determined and confirmed for the profile of the resist pattern 24 on the ocos oxide film 21. However, in practice, the pattern of the resist pattern 24 on the Locos oxide film 21 extends to the active region 22, and the optimal focus position and exposure amount of the active region 22 are sufficiently different from those on the Locos oxide film 21. Conceivable. In consideration of such a phenomenon, the diagram shown in FIG. 7 is a diagram showing the index of the present embodiment. FIG. 7 is composed of a view of the index as viewed from above and a cross-sectional view as viewed from the direction C of the line AA. The index is composed of the region of the Locos oxide film 71 and the active region 72,
The thickness configuration of the s oxide film 71 and the gate oxide film on the active region 72 and the polycrystalline silicon 73 which is a gate electrode material are formed in the same manner as in FIG. The index 74 for dimension confirmation in FIG. 7 is located so as to extend over the Locos oxide film 71 and the active region 72.
It is formed to be equal to the minimum line width of the resist pattern 24 in FIG. Accordingly, it is possible to confirm the condition of the dimension depending on the exposure amount in both the Locos oxide film 71 and the active region 72. Next, an index 75 for confirming the focal position on the Locos oxide film 71 and an index 76 for confirming the focal position on the active area 72 are formed, so that the focal position can be confirmed in each area. ing. Indices 74 for confirming the dimensions and indices 75 and 7 for confirming the focal position for confirming the exposure amount.
6 and Loc by the method described in the first embodiment.
By confirming the exposure amount and the focus position which are the exposure conditions that satisfy both the os oxide film 71 and the active region 72, it is possible to determine the condition in consideration of the step of the semiconductor device in the main part of the semiconductor device. It becomes possible. Thus, in the manufacture of a semiconductor device, it is possible to objectively determine the conditions for forming a resist pattern and to reliably determine the conditions in consideration of the step of the semiconductor device. Use of the index of the invention has an effect that reliable process control can be performed. In addition, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of a lithography process having the most steps in manufacturing a semiconductor device can be reliably determined, and the process management ability is also improved. This is effective for improving the production yield and performance of the device.

Further, by applying these indices to the second embodiment, the step of the semiconductor device is taken into consideration, and in the manufacture of the semiconductor device, the entire exposure region is taken into account when determining the conditions for forming the resist pattern. In addition, it is possible to objectively and surely determine the conditions, and at the same time, to use the index of the present invention during the process management, it is possible to perform a reliable process management. Is easily found. Further, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of the lithography step having the most steps in manufacturing the semiconductor device can be reliably determined.
Since the process management ability is also improved, it is effective in improving the yield and performance of semiconductor device manufacturing.

Further, by applying these indices to the third embodiment, the step of the semiconductor device is taken into consideration, and the entire exposure region is taken into account when determining the conditions for forming the resist pattern in the manufacture of the semiconductor device. In addition, it is possible to objectively and surely determine the conditions, and at the same time, to use the indicators of the present invention in the process management, it is possible to perform reliable process management. Is easily found. Further, by manufacturing a semiconductor device using the semiconductor device of the present invention, the conditions of the lithography step having the most steps in manufacturing the semiconductor device can be reliably determined.
Since the process management ability is also improved, it is effective in improving the yield and performance of semiconductor device manufacturing.

In this embodiment mode, the step of forming a gate electrode has been described. However, the present invention is not limited to the step of forming a gate electrode, and can be applied to any lithography step. In particular, the effect is high in a process requiring fine processing. In this embodiment, reduction projection exposure has been described. However, the present invention is not limited to reduction projection exposure, and can be applied to an exposure method using an optical system. For example,
An exposure technique using a mirror reflection type optical system is exemplified. Further, the present invention can be used for checking the conditions of an etching step immediately after a lithography step. In the present embodiment, the conditions are determined by providing indexes at five places.
This is not limited to five locations. If the index can be provided, more indexes can be provided and the condition can be determined, and the same effect as in the present embodiment can be obtained. Also,
The present invention is not limited to semiconductor manufacturing, and can be applied to technical fields using similar lithography techniques. For example, it is the manufacture of a liquid crystal display.

[0042]

As described above, the semiconductor device of the present invention forms a region having the same structure as the film configuration of the main part of the semiconductor device, and forms the size or shape of the resist pattern in the region. Providing at least one index capable of confirming the condition has an effect that the exposure condition at the time of exposure can be accurately determined.

Further, in the semiconductor device of the present invention, a region having a structure similar to the film configuration of the main part of the semiconductor device is formed, and an index capable of confirming the formation condition of the size or shape of the resist pattern in the region. At least at the center and the periphery of the exposure range, it is possible to accurately determine the exposure conditions at the time of exposure, and at the same time, to check the conditions in consideration of the state of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus. It has the effect of being able to.

Further, in the semiconductor device of the present invention, when the film configuration of the main part of the semiconductor device has two regions, a region having the same structure as the two regions is formed in accordance with the film configuration.
Providing at least one index capable of confirming the formation condition of the size or shape of the resist pattern in the region has an effect that the exposure condition adapted to the two regions can be accurately determined.

Further, in the semiconductor device of the present invention, when the film configuration of the main part of the semiconductor device has two regions, a region having the same structure as the two regions is formed in accordance with the film configuration.
By providing indices capable of confirming the formation conditions of the size or shape of the resist pattern in the region at least at two locations, that is, the center and the peripheral portion of the exposure range, it is possible to accurately determine the exposure conditions adapted to the two regions. At the same time, there is an effect that the condition can be checked in consideration of the state of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus.

Further, according to the method of manufacturing a semiconductor device of the present invention, a region having a structure similar to the film configuration of a main portion of the semiconductor device is formed, and the size or shape of the resist pattern is formed in the region. By providing at least one index capable of confirming the above, the exposure condition at the time of exposure can be determined with high accuracy, so that the yield and performance of the semiconductor device can be improved.

Further, according to the method of manufacturing a semiconductor device of the present invention, a region having a structure similar to the film configuration of a main portion of the semiconductor device is formed, and the formation condition of the size or shape of the resist pattern is formed in the region. By providing at least two indicators at the center and the periphery of the exposure range, the exposure conditions at the time of exposure can be determined accurately, and at the same time, the state of the exposure apparatus such as the image plane inclination and distortion of the exposure apparatus can be determined. Since the condition can be checked in consideration of the above, the yield and performance of the semiconductor device can be improved.

Further, according to the method of manufacturing a semiconductor device of the present invention, when the film configuration of the main part of the semiconductor device has two regions, a region having the same structure as the two regions is formed in accordance with the film configuration. By providing at least one index capable of confirming the formation condition of the size or shape of the resist pattern in the region, the exposure condition adapted to the two regions can be determined with high accuracy, so that the yield and performance of the semiconductor device can be improved. Can be improved.

Further, according to the method of manufacturing a semiconductor device of the present invention, it is possible to accurately determine the exposure conditions adapted to the two regions, and at the same time, to take into account the condition of the exposure device such as the image plane inclination and distortion of the exposure device. Since confirmation can be performed, the yield and performance of the semiconductor device can be improved.

[Brief description of the drawings]

FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 3 shows a plan view and a cross-sectional view of an indicator according to an embodiment of the present invention.

FIG. 4 is a view showing an exposure method according to one embodiment of the present invention.

FIG. 5 is a diagram illustrating a semiconductor device according to an embodiment of the present invention;

FIG. 6 is a diagram illustrating a semiconductor device according to an embodiment of the present invention;

FIG. 7 is a plan view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 8 is a plan view and a cross-sectional view of a conventional semiconductor device.

FIG. 9 is a view showing a conventional exposure method.

FIG. 10 shows a plan view and a sectional view of a conventional resist pattern shape.

[Explanation of symbols]

 11; scribe line 12; index 13; semiconductor device 21; Locos oxide film 22; active region 23; polycrystalline silicon 24; resist pattern 31; Locos oxide film 32; active region 33; polycrystalline silicon 34; 35; first focus position confirmation index 36; second focus position confirmation index 41; semiconductor substrate 42; semiconductor device 51; scribe line 52; index 53; semiconductor device 54; index 61; scribe line 62; Index 63; Semiconductor device 64; Index 71; Locos oxide film 72; Active area 73; Polycrystalline silicon 74; Index 75 for dimension confirmation; Index 76 for focus position confirmation; Index 81 for focus position confirmation; Locos oxide film 82; active area 83; polycrystalline silicon 84; resist pattern Down 91; semiconductor substrate 92; the semiconductor device 101; resist pattern 102; reverse tapered pattern 103; good resist pattern 104; semiconductor substrate

Claims (12)

[Claims] When a desired resist pattern is formed in a lithography step of manufacturing a semiconductor device, a region having a structure similar to a film configuration of a main portion of the semiconductor device is formed, and the dimension or the size of the resist pattern is formed in the region. A semiconductor device, wherein at least one index capable of confirming a condition for forming a shape is formed. 2. In a lithography process of manufacturing a semiconductor device, when a desired resist pattern is formed, a region having a structure similar to a film configuration of a main portion of the semiconductor device is formed, and the dimension or the size of the resist pattern is formed in the region. A semiconductor device comprising: an index capable of confirming a condition for forming a shape; and at least two indices at a center and a periphery of an exposure range. 3. In a lithography process of manufacturing a semiconductor device, when a desired resist pattern is formed, a region having a structure similar to a film configuration of a main portion of the semiconductor device is formed, and the dimension or the size of the resist pattern is formed in the region. 5. A semiconductor device, wherein indices capable of confirming a shape forming condition are formed at least at five positions at a center of an exposure range and four corners of a peripheral portion. 4. In a lithography process for manufacturing a semiconductor device, when a desired resist pattern is formed, if a film configuration of a main portion of the semiconductor device has two regions, a structure similar to the two regions is formed according to the film configuration. A semiconductor device, wherein at least one index capable of confirming a condition for forming the size or shape of the resist pattern is formed in the region. 5. In a lithography process for manufacturing a semiconductor device, when a desired resist pattern is formed, if a film configuration of a main portion of the semiconductor device has two regions, a structure similar to the two regions is formed according to the film configuration. A semiconductor device, wherein an index capable of confirming a condition for forming a dimension or a shape of the resist pattern is formed at least at two positions, that is, a center and a peripheral portion of an exposure range. 6. In a lithography process of manufacturing a semiconductor device, when a desired resist pattern is formed, if a film configuration of a main part of the semiconductor device has two regions, a structure similar to the two regions is formed according to the film configuration. A semiconductor device comprising: forming an area having a plurality of regions, and forming indices capable of confirming a condition for forming a size or a shape of the resist pattern in at least five places of a center of an exposure range and four corners of a peripheral portion. 7. A method for manufacturing a semiconductor device, comprising using the semiconductor device according to claim 1 in a lithography step of manufacturing the semiconductor device. 8. A method for manufacturing a semiconductor device, comprising using the semiconductor device according to claim 2 in a lithography step of manufacturing the semiconductor device. 9. A method of manufacturing a semiconductor device, comprising using the semiconductor device according to claim 3 in a lithography step of manufacturing the semiconductor device. 10. A method of manufacturing a semiconductor device, comprising using the semiconductor device according to claim 4 in a lithography step of manufacturing the semiconductor device. 11. A method of manufacturing a semiconductor device, comprising using the semiconductor device according to claim 5 in a lithography step of manufacturing the semiconductor device. 12. A method of manufacturing a semiconductor device, wherein the semiconductor device according to claim 6 is used in a lithography step of manufacturing the semiconductor device.