JPH10328357A - Decoration lamp for game machine - Google Patents

Decoration lamp for game machine

Info

Publication number
JPH10328357A
JPH10328357A JP16040797A JP16040797A JPH10328357A JP H10328357 A JPH10328357 A JP H10328357A JP 16040797 A JP16040797 A JP 16040797A JP 16040797 A JP16040797 A JP 16040797A JP H10328357 A JPH10328357 A JP H10328357A
Authority
JP
Japan
Prior art keywords
light emitting
transistors
light
turned
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16040797A
Other languages
Japanese (ja)
Inventor
Hiroshi Enomoto
宏 榎本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyoraku Sangyo Co Ltd
Original Assignee
Kyoraku Sangyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyoraku Sangyo Co Ltd filed Critical Kyoraku Sangyo Co Ltd
Priority to JP16040797A priority Critical patent/JPH10328357A/en
Publication of JPH10328357A publication Critical patent/JPH10328357A/en
Pending legal-status Critical Current

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  • Pinball Game Machines (AREA)

Abstract

PROBLEM TO BE SOLVED: To yield a useful effect of reducing cost by a method the positive and negative positions are switched in a pair of power source lines led out from a control circuit and light emitting diodes in two systems are freely flashed alternately in a pair on a one to one basis to simplify a wiring processing with a reduced number of wires. SOLUTION: N1 and N2 are a pair of NANDS with inputs thereof connected to the others' outputs and the output sides thereof are respectively connected to the bases of transistors Q5 and Q6. As a result, when the output of the NAND N1 is at a high level and the output of the NAND N2 is at a low level, the transistors Q1 and Q4 are turned ON and the transistors Q2 and Q3 turned OFF so that a forward voltage is applied to one light emitting diode L2 to light while a reverse voltage is applied to the other light emitting diode L1, which does not light. When the outputs of the NANDs N1 and N2 are each at a high or low level, the transistors Q1 and Q4 are turned OFF and those Q2 and Q3 are turned ON so that a forward voltage is applied to the light emitting diode L1 to light while a reverse voltage is applied to that L2, which does not light.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、パチンコ遊技機等
の遊技機に設けられた複数の電飾ランプを点滅させる回
路に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for blinking a plurality of illumination lamps provided on a game machine such as a pachinko game machine.

【0002】[0002]

【従来の技術】周知のようにパチンコ遊技機では、遊技
盤の前面または前枠の前面等に多数の電飾ランプが設け
られ、そのランプを点滅させることによって装飾効果を
高めたり、特定の遊技状態を表示させるようにしてい
る。そしてパチンコ遊技機の電飾ランプとしては、節
電,発熱防止、および高寿命等の観点から従来より光源
として発光ダイオード(LED)が多用されている。
2. Description of the Related Art As is well known, in a pachinko game machine, a large number of illuminated lamps are provided on the front of a game board or the front of a front frame or the like. The status is displayed. Lighting diodes (LEDs) have been widely used as light sources from the viewpoints of power saving, heat generation prevention, and long life, etc., as electric lamps for pachinko gaming machines.

【0003】ところで複数の発光ダイオードを2系統と
して夫々点滅させる場合、従来、図5に示したような電
気回路が組まれていた。同図において、Q10,Q20
は遊技態様を制御する制御回路基板1に設けられたトラ
ンジスタ、V10は該制御回路基板1の作動用直流プラ
ス電源、L10,L20は電飾配線基板2に設けられた
発光ダイオードで、該発光ダイオードL10,L20
は、そのアノード側が夫々制限抵抗R10,R20を介
して電源線Y10に接続され、該電源線Y10を直流電
源V10に接続していると共に、カソード側は夫々電源
線Y20,Y30に接続し、該電源線Y20,Y30を
トランジスタQ10,Q20のエミツタに接続し、該制
御回路基板1の信号が該トランジスタQ10,Q20の
ベースに印加されることにより発光ダイオードL10,
L20を交互に点滅できるように構成されている。
In the case where a plurality of light emitting diodes are turned on and off as two systems, an electric circuit as shown in FIG. 5 has conventionally been assembled. In the figure, Q10, Q20
Is a transistor provided on the control circuit board 1 for controlling the game mode, V10 is a DC plus power supply for operating the control circuit board 1, L10 and L20 are light-emitting diodes provided on the illuminated wiring board 2, and the light-emitting diodes L10, L20
Has an anode connected to a power supply line Y10 via limiting resistors R10 and R20, respectively, and the power supply line Y10 connected to a DC power supply V10, and a cathode connected to power supply lines Y20 and Y30, respectively. The power supply lines Y20, Y30 are connected to the emitters of the transistors Q10, Q20, and the signals of the control circuit board 1 are applied to the bases of the transistors Q10, Q20, so that the light emitting diodes L10,
L20 can be alternately turned on and off.

【0004】[0004]

【発明が解決しようとする課題】このように従来の遊技
機の装飾ランプ点滅のための回路において、複数の発光
ダイオードを交互に点滅させるに当たっては2系統であ
っても少なくとも3本の電源線Y10,Y20,Y30
を制御回路基板1から電飾配線基板2に配線する必要が
あった。このため制御回路基板1と電飾配線基板2とを
結ぶ配線処理が煩雑となる問題があった。
As described above, in a conventional circuit for blinking a decorative lamp of a game machine, at least three power supply lines Y10 are used for alternately blinking a plurality of light emitting diodes even if there are two systems. , Y20, Y30
From the control circuit board 1 to the illuminated wiring board 2. For this reason, there has been a problem that wiring processing for connecting the control circuit board 1 and the illuminated wiring board 2 becomes complicated.

【0005】[0005]

【課題を解決するための手段】本発明の遊技機における
装飾ランプは上記課題を解決しようとするもので、正負
が切替えられる一対の電源線を制御回路基板から導出す
ると共に、該電源線と連接した電飾配線基板に2個の発
光ダイオードを一組の単位として、該発光ダイオードの
互いの極性を反対方向となるように並列に接続してなる
ことを特徴とする。
SUMMARY OF THE INVENTION A decorative lamp in a gaming machine according to the present invention is intended to solve the above-mentioned problem, and a pair of power lines which can be switched between positive and negative are led out from a control circuit board and connected to the power line. It is characterized in that two light-emitting diodes are used as a set of units on the illuminated wiring board and the light-emitting diodes are connected in parallel so that their polarities are opposite to each other.

【0006】[0006]

【発明の実施の形態】次に図1に従い本発明の実施の形
態を説明する。同図において、1は制御回路基板、2は
電飾配線基板、L1,L2は該電飾配線基板2に設けら
れた発光ダイオード、R1,R2は該各発光ダイオード
L1,L2の制限抵抗である。発光ダイオードL1と発
光ダイオードL2とはその互いの極性(アノード側とカ
ソード側)を反対向として並列に接続すると共に、これ
を一対の電源線Y1,Y2に夫々接続している。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the present invention will be described with reference to FIG. In the figure, 1 is a control circuit board, 2 is an illuminated wiring board, L1 and L2 are light emitting diodes provided on the illuminated wiring board 2, and R1 and R2 are limiting resistors of the light emitting diodes L1 and L2. . The light emitting diode L1 and the light emitting diode L2 are connected in parallel with their polarities (anode side and cathode side) opposite to each other and connected to a pair of power supply lines Y1 and Y2, respectively.

【0007】電飾配線基板2にはPNP型のトランジス
タQ1,Q3、NPN型のトランジスタQ2,Q4、お
よび該トランジスタQ1,Q3をドライブするNPN型
のトランジスタQ5,Q6とからなる電流切換回路が設
けられ、トランジスタQ1のコレクタとトランジスタQ
2のコレクタとの接続点に電源線Y1を接続し、トラン
ジスタQ3のコレクタとトランジスタQ4のコレクタと
の接続点に電源線Y2を接続すると共に、トランジスタ
Q1およびトランジスタQ3のエミッタをプラス電源V
1(+12V)に接続し、トランジスタQ2およびトラ
ンジスタQ4のエミッタをアースし、トランジスタQ1
およびトランジスタQ3のベースを夫々トランジスタQ
5およびトランジスタQ6のコレクタに夫々抵抗R6,
R7を介して接続し、該トランジスタQ5およびトラン
ジスタQ6のコレクタを夫々抵抗R3,R4を介してプ
ラス電源V1に接続し、トランジスタQ5およびトラン
ジスタQ6のエミッタをアースし、トランジスタQ2の
ベースを抵抗R5を介してトランジスタQ6のベースに
接続し、トランジスタQ4のベースを抵抗R8を介して
トランジスタQ5のベースに接続している。
On the illuminated wiring board 2, there is provided a current switching circuit including PNP transistors Q1, Q3, NPN transistors Q2, Q4, and NPN transistors Q5, Q6 for driving the transistors Q1, Q3. And the collector of transistor Q1 and transistor Q
The power supply line Y1 is connected to the connection point of the collector of the transistor Q3 and the power supply line Y2 is connected to the connection point of the collector of the transistor Q3 and the collector of the transistor Q4.
1 (+12 V), the emitters of the transistors Q2 and Q4 are grounded,
And the base of transistor Q3 is
5 and the collector of the transistor Q6 have resistors R6 and R6, respectively.
R7, the collectors of the transistors Q5 and Q6 are connected to the positive power supply V1 via the resistors R3 and R4, the emitters of the transistors Q5 and Q6 are grounded, and the base of the transistor Q2 is connected to the resistor R5. The base of the transistor Q4 is connected to the base of the transistor Q5 via a resistor R8.

【0008】N1,N2は互いの入力と出力とを結んだ
一対のナンドで、その出力側を夫々トランジスタQ5,
Q6のベースに接続してなる。このためナンドN1の出
力がハイレベル、ナンドN2の出力がローレベルである
と、トランジスタQ1,Q4がオンし、トランジスタQ
2,Q3はオフし、一方の発光ダイオードL2に順方向
電圧が印加されて点灯し、他方の発光ダイオードL1に
は逆方向電圧が印加されるので点灯しない。また、ナン
ドN1の出力がローレベル、ナンドN2の出力がハイレ
ベルとなるとその反対にトランジスタQ1,Q4はオフ
し、トランジスタQ2,Q3はオンするので、発光ダイ
オードL1に順方向電圧が印加されて点灯し、発光ダイ
オードL2には逆方向電圧が印加されるので点灯しな
い。なお、ナンドN1,N2ともに出力がローレベルの
ときは両発光ダイオードL1,L2がともに点灯しな
い。
N1 and N2 are a pair of NANDs connecting the input and the output of each other.
It is connected to the base of Q6. Therefore, when the output of the NAND N1 is at a high level and the output of the NAND N2 is at a low level, the transistors Q1 and Q4 are turned on, and the transistor Q1 is turned on.
2 and Q3 are turned off, and one of the light emitting diodes L2 is turned on by applying a forward voltage, and the other light emitting diode L1 is not turned on because a reverse voltage is applied to the other light emitting diode L1. When the output of the NAND N1 goes low and the output of the NAND N2 goes high, the transistors Q1 and Q4 are turned off and the transistors Q2 and Q3 are turned on, so that a forward voltage is applied to the light emitting diode L1. The light emitting diode L2 does not light because a reverse voltage is applied to the light emitting diode L2. When the outputs of both the NANDs N1 and N2 are at the low level, both the light emitting diodes L1 and L2 do not light up.

【0009】なお、このナンドN1,N2は出力が同時
にハイレベルとなり、トランジスタQ1,Q2またはト
ランジスタQ3,Q4が同時にオンし過電流が流れ破壊
するのを防ぐために設けられている。ちなみに表1にナ
ンドN1の入力端子S1およびナンドN2の入力端子S
2の電位(HまたはL)と、発光ダイオードL1,L2
の点灯,消灯との関係を真理値表として示した。
The outputs of the NANDs N1 and N2 are provided in order to prevent the output from being at the high level at the same time and turning on the transistors Q1 and Q2 or the transistors Q3 and Q4 at the same time, causing an overcurrent to flow and destroying. Incidentally, Table 1 shows the input terminal S1 of the NAND N1 and the input terminal S of the NAND N2.
2 (H or L) and the light emitting diodes L1 and L2
Is shown as a truth table.

【表1】 なお、図2乃至図3に示すように、発光ダイオードL
1,L2の数を電飾配線基板2に必要に応じてさらに多
数個設けることができると共に、装飾領域全体に電飾効
果を必要とするときには必要に応じて、図4に示すよう
に直列に多数個設ければ可能となることは言うまでもな
い。またこの点滅回路はパチンコ遊技機のみならずスロ
ットマシン、その他の遊技機における装飾ランプに適用
できる。
[Table 1] As shown in FIGS. 2 and 3, the light emitting diode L
A larger number of 1, L2 can be provided on the illuminated wiring board 2 as necessary, and when an illuminated effect is required over the entire decorative area, the number of L2 can be increased in series as shown in FIG. Needless to say, this can be achieved by providing a large number. This blinking circuit can be applied not only to pachinko gaming machines but also to decorative lamps in slot machines and other gaming machines.

【0010】[0010]

【発明の効果】このように本発明の装飾ランプによれ
ば、制御回路基板から導出させた一対の電源線の正負を
切替ることによって2系統の2個の発光ダイオードを一
組の単位として交互自在に点滅させることができると共
に、配線の所要本数が少なくなり、配線処理を簡素化で
きコストを軽減させる有益な効果がある。
As described above, according to the decorative lamp of the present invention, two light emitting diodes of two systems are alternately used as a set of units by switching the polarity of a pair of power supply lines derived from the control circuit board. In addition to being able to blink freely, the required number of wires is reduced, which has a beneficial effect of simplifying the wiring process and reducing the cost.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る遊技機における装飾ランプの回路
図。
FIG. 1 is a circuit diagram of a decorative lamp in a gaming machine according to the present invention.

【図2】図1の要部の他の実施形態を示した回路図。FIG. 2 is a circuit diagram showing another embodiment of the main part of FIG. 1;

【図3】図1の要部の他の実施形態を示した回路図。FIG. 3 is a circuit diagram showing another embodiment of the main part of FIG. 1;

【図4】図1の要部の他の実施形態を示した回路図。FIG. 4 is a circuit diagram showing another embodiment of the main part of FIG. 1;

【図5】従来の装飾ランプの回路図。FIG. 5 is a circuit diagram of a conventional decorative lamp.

【符号の説明】[Explanation of symbols]

1 制御回路基板 2 電飾配線基板 Y1,Y2 電源線 L1,L2 発光ダイオード DESCRIPTION OF SYMBOLS 1 Control circuit board 2 Illuminated wiring board Y1, Y2 Power supply line L1, L2 Light emitting diode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 正負が切替えられる一対の電源線を制御
回路基板から導出すると共に、該電源線と連接した電飾
配線基板に2個の発光ダイオードを一組の単位として、
該発光ダイオードの互いの極性を反対方向となるように
並列に接続してなることを特徴とした遊技機における装
飾ランプ。
1. A pair of power lines, which are switched between positive and negative, are derived from a control circuit board, and two light emitting diodes are set as a set on an illuminated wiring board connected to the power line.
A decorative lamp in a game machine, wherein the light emitting diodes are connected in parallel so that the polarities of the light emitting diodes are opposite to each other.
JP16040797A 1997-06-02 1997-06-02 Decoration lamp for game machine Pending JPH10328357A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16040797A JPH10328357A (en) 1997-06-02 1997-06-02 Decoration lamp for game machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16040797A JPH10328357A (en) 1997-06-02 1997-06-02 Decoration lamp for game machine

Publications (1)

Publication Number Publication Date
JPH10328357A true JPH10328357A (en) 1998-12-15

Family

ID=15714278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16040797A Pending JPH10328357A (en) 1997-06-02 1997-06-02 Decoration lamp for game machine

Country Status (1)

Country Link
JP (1) JPH10328357A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7485039B2 (en) 2003-01-10 2009-02-03 Aruze Corp. Gaming machine
CN100462120C (en) * 2004-03-19 2009-02-18 阿鲁策株式会社 Game machine
KR100911831B1 (en) 2007-10-30 2009-08-13 네스테크 주식회사 Cigarjack Connector with Protection Circuit

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7485039B2 (en) 2003-01-10 2009-02-03 Aruze Corp. Gaming machine
CN100462120C (en) * 2004-03-19 2009-02-18 阿鲁策株式会社 Game machine
KR100911831B1 (en) 2007-10-30 2009-08-13 네스테크 주식회사 Cigarjack Connector with Protection Circuit

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