JPH10323073A - Coil drive equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make it possible to drive a coil with a current without creating distortion to signal, by applying currents of an almost identical value in forward direction to a first and a second current passages of an output circuit. SOLUTION: Emitters of a PNP type transistor 51 and an NPN type transistor 52 are connected in an input portion of an output circuit 2, and diodes 54 and 55 are connected in series between the bases of both the transistors 51, 52. A current of a current source 56 is supplied to the diodes 54, 55, and a voltage of a voltage supply 53 is supplied to the base of the transistor 51. By doing this, a current equal to a current value of a current source 56 can be always applied from the collector of the transistor 52 to the collector of transistor 51. Also, by connecting the collector of the transistors 11, 14 to the collector of the transistor 41 in series, the frequency characteristics of the coil drive equipment can be adjusted and a current drive to the coil can be performed without distortion to signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for driving an actuator motor used in a hard disk drive or the like.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional hard disk drive. In order to correctly detect the signal, the head 72 needs to move smoothly on the surface of the disk 74 in accordance with a predetermined signal. Therefore, a coil 73 is attached to the tip of the actuator 71, and a current corresponding to a predetermined signal is applied to both ends of the coil 73. A magnetic field is generated in the coil 73 by the applied current, and the actuator 71 rotates around the fulcrum by the magnetic field. At the same time, the head 72 moves.

FIG. 7 is a circuit diagram showing a conventional device for driving the coil 73. In FIG. 7, a signal for controlling the coil is provided to an input terminal 5, and this signal is further input to one end of the differential amplifier circuit 1 via a resistor 30. Here, the differential amplifier circuit 1 includes a differential pair of transistors 11 and 12 whose emitters are grounded, and a current mirror circuit of transistors 13 and 14 each having an emitter connected to a power supply terminal. The collector of transistor 11 is connected to the collector of transistor 12 via this current mirror circuit. In this configuration, the base voltages of the transistors 11 and 12 are compared. A fixed voltage is applied to the base of the transistor 12, and when the base voltage of the transistor 11 is high, the transistor 1
Current flows from the collector of the transistor 2 to the subsequent circuit, and in the opposite case, current flows from the latter circuit to the collector of the transistor 12. Here, the collector of the transistor 12 is connected to the base of the transistor 15 in the output circuit 2, and the emitter of the transistor 15 is connected to the transistor 16
Connected to the base. Incidentally, the collector of the transistor 15 is connected to the ground. Further, the emitter of the transistor 16 is connected to the power supply terminal 3, and the collector of the transistor 16 is connected to a constant current source 17 and a capacitor 18 for preventing oscillation.
Is connected to the base of the transistor 19.

With the above configuration, when a current flows from the base of the transistor 15 to the collector of the transistor 12, the voltage of the output terminal 4 increases, and in other cases, the voltage of the output terminal 4 decreases. Since the closed loop circuit 3 is connected to the output terminal 4, the closed loop circuit 3 will be described below.

[0005] The output terminal 4 is connected to the cathode of the diode 21, and the anode of the diode 21 is connected to the cathode of the diode 22. On the other hand, this diode 2
2 is connected to one end of the current source 23 and the current source 2
The other end of 3 is connected to power supply terminal 3. Further, the anode of diode 22 is connected to the base of transistor 24, and the emitter of transistor 24 is connected to the emitter of transistor 25. Here, the base of the transistor 25 is connected to the collector of the transistor 16, and the collector of the transistor 25 is connected to the base of the transistor 26 and one end of the resistor 28. The collector of the transistor 26 is connected to the emitter of the transistor 19 and the output terminal 4. Thus, the closed loop circuit 3 is formed with the output terminal 4 as a starting point. Here, current flows out of the collector of the transistor 25 according to the voltage difference between the bases of the transistor 24 and the transistor 25. When this current is applied to the base of transistor 26, transistor 2
Current flows from the output terminal 4 toward the collector 6. Here, the voltage value of the base of the transistor 24 is determined by the voltage difference between the anode and the cathode of the diodes 21 and 22, and is about 1.5 times the voltage value of the output terminal 4.
V has a high value. On the other hand, the voltage value at the base of transistor 25 is given by the voltage at the collector of transistor 16. Further, the collector of the transistor 16 and the output terminal 4
When the transistor 19 is in operation, the voltage difference between the base and the emitter is about 0.7 V.
And the voltage difference between the base of the transistor 25 becomes 0.7V. In this state, the collector current value of the transistor 25 becomes substantially zero.

On the other hand, the speed at which the voltage at the collector of the transistor 16 rises and falls depends on the switch speed of the differential amplifier circuit 1, the value of the capacitor 18, the current value of the current source 17, and the like. Further, since the coil 73 and the resistor 33 are connected to the output terminal, the response speed with respect to the current of the output terminal is determined by the time constant determined by the value of the coil 73 and the value of the resistor 33. In particular, when the voltage at the collector of the transistor 16 falls, the operation of the transistor 19 is cut off, so that the voltage difference between the bases of the transistors 24 and 25 is governed by the voltage difference between the output terminal 4 and the collector of the transistor 16. When the voltage difference between the bases of the transistors 24 and 25 exceeds about 1.5 V, a relatively large current is generated at the collector of the transistor 25 to drive the subsequent stage. This current causes a current to flow from the output terminal 4 toward the transistor 26.

Next, the input terminal 8 of the inverting amplifier 6 and one end of the coil 73 are connected to the output terminal 4, and a fixed voltage is applied to one end of the inverting amplifier 6. The current branched from the output terminal 4 is inverted and amplified by the inverting amplifier 6 and output to the output terminal 9. One end of a resistor 33 is connected to the output terminal 9,
Since the other end of the resistor 33 is connected to one end of the coil 73, a current is applied to both ends of the series connection of the coil 73 and the resistor 33, and a magnetic field is generated in the coil 73 according to the current. Here, the voltage difference between both ends of the resistor 33 and the current flowing through the coil 73 are proportional. Then, the voltage at both ends of the resistor 33 is input to the input terminal pair of the comparator 7, a voltage is output to the output terminal of the comparator 7 according to this voltage, and the voltage is output to the input terminal of the differential amplifier circuit 1 via the resistor 34. Given.

[0008]

As described above, the input terminal 5
In the conventional coil driving device for inputting a signal to the output terminal 4 and extracting a driving current to the output terminal 4, the inverting amplifier circuit 6 and the resistor 3
3, a comparator 7, a resistor 34, a resistor 30, a differential amplifier circuit 1,
A first closed loop constituted by the output circuit 2 is formed starting from the output terminal 4 and further includes a diode 2
1 and a second closed loop of the diode 22, the transistors 24 to 26, and the resistor 28 are formed in the output circuit 2 starting from the output terminal 4. Thus, the first and second closed loops exist, and the first closed-loop resistors 30 to 34
In order to form a stable closed loop for each device, the second
Had to be changed according to these values.

When the transistor 19 is operating, the voltage between the bases of the transistors 24 and 25 is 0.7
V when the operation of the transistor 19 stops and the closed loop circuit 3 starts operating.
A voltage of about 1.5 V needs to be applied between the bases. Thus, the voltage between the bases is from 0.7V to 1.5V
There is a voltage region that is not driven by a signal until the voltage becomes zero. The presence of such a region causes distortion in the signal output to the output terminal 4.

Further, the conventional output circuit requires an element having diode characteristics, and it has not been possible to employ, for example, a double diffusion type MOS (DMOS) transistor capable of driving a large current.

[0011]

Means for Solving the Problems In order to solve the above-mentioned conventional problem, a solution taken by the invention of claim 1 is a signal terminal to which a signal is inputted and a first terminal having one end connected to the signal terminal.
And a fixed voltage source is connected to the first input terminal,
The other end of the first resistor is connected to the second input terminal, and a differential amplifier circuit that outputs a signal voltage corresponding to the voltage difference between the input terminal pair from the output terminal, and the input terminal receives the signal voltage. A signal current is supplied to a first current path when a polarity of a difference voltage of the signal voltage with respect to the fixed voltage is a first polarity, and a signal current is supplied to the first current path. A current according to the value is caused to flow to the output terminal, and when the polarity of the difference voltage is the second polarity, a signal current is supplied to the second current path, and the signal current is supplied according to the current value of the second current path. An output circuit for allowing a current to flow into the output terminal; a coil having one end connected to the output terminal of the output circuit; a detecting means for detecting a current flowing through the coil and outputting a signal to the output terminal; Output terminal and a second input terminal of the differential amplifier circuit And a second resistor which is inserted and connected between the coil driving device, in which a DC current of a value approximately equal to the forward direction of the first and second current paths of said output circuit.

With this configuration, the signal input to the signal terminal is input to the differential amplifier circuit via the first resistor and compared, and the signal voltage resulting from the comparison is compared in the output circuit. . If the difference voltage, which is the difference between the fixed voltage of the output circuit and the signal voltage, is positive, a signal current flows through the first current path. If the difference voltage is negative, the current flows through the second current path. Can flow. The polarity and the current path are selected such that a closed loop described later forms negative feedback. Next, a current corresponding to the current value flowing through the first current path is amplified and flows out of the output circuit via the output terminal, and a current corresponding to the current value flowing through the second current path is amplified and output. Is input to the inside of the output circuit. A coil is connected to the output terminal, and the coil drives an actuator. Here, the polarity and value of the current flowing through the coil are detected by the detection means and a signal is output, and this signal is input to the input terminal of the differential amplifier circuit via the second resistor. Here, the signal input to the signal terminal and the signal detected by the detection unit are combined according to the ratio of the first resistance to the second resistance and input to the differential amplifier circuit. Since one closed loop is formed in this manner, a stable operation can be ensured by adjusting the constants of the components constituting the loop so that the response of the loop is optimized. In particular, in a configuration in which the output circuit compares the differential voltage to select and flow a current path, a DC current having a value substantially equal to the first current path and the second current path is supplied, so that the differential voltage value is temporarily reduced. Even if the signal current is zero and the signal current does not flow, DC current flows in each path and the signal current is not interrupted at the boundary between the positive polarity and the negative polarity, so that stable and distortion-free signal transmission is possible. It becomes possible. Even when the signal current of each current path is individually amplified, the current flow is not interrupted at the boundary where the polarity changes, so that distortion can be suppressed.

A second aspect of the present invention is a resistor inserted between an output terminal of the differential amplifier circuit and a common connection of the first conductivity type transistor and the second conductivity type transistor; A series-connected series of first and second diodes connected in series between the bases of the transistor and the transistor of the second conductivity type and supplied with DC current, connected to the base of the transistor of the first conductivity type or the transistor of the second conductivity type. And a connection means for individually connecting the collectors of the first conductivity type transistor and the second conductivity type transistor to the first current path and the second current path.

With this configuration, the voltage at the output terminal of the differential amplifier circuit is compared with the voltage at the common connection between the emitters of the first and second conductivity type transistors, and the voltage is inserted between the output terminal and the common connection. Is converted to a current by the resistor. When the voltage at the output terminal is lower than the voltage at the common connection, for example, a current flows from the collector of the transistor of the first conductivity type to the resistor via the emitter, and when the voltage is high, the emitter flows from the resistor to the emitter of the transistor of the second conductivity type. A current flows through the collector through the collector. Here, when the voltages of the common connection portion and the output terminal are equal, no current flows through the resistor. At this time, in order to prevent the first conductivity type transistor and the second conductivity type transistor from being cut off, a configuration is adopted in which a small current flows through each transistor.
Specifically, by flowing a predetermined current through the first and second diodes, a current having a value equal to this current flows between the collectors of the first conductivity type transistor and the second conductivity type transistor. In this manner, the transistor operation is prevented from being cut off, so that continuous transistor operation can be ensured even when a current due to a signal is applied.
The current generated in each collector in this way is individually transmitted to the first current path and the second current path.

[0015] According to a third aspect of the present invention, the differential amplifier circuit includes a high-pass filter, and a cut-off frequency of the high-pass filter and a cut-off characteristic for determining a low-pass characteristic of the output circuit. Are substantially matched.

Normally, the differential amplifier circuit and the output circuit form a filter having a low-pass characteristic by the capacitance parasitically added to the circuit, and the frequency band is limited. In contrast, by adding a high-pass filter characteristic to the differential amplifier circuit, an effect of equivalently widening the entire pass band is exhibited. In particular, since the low-pass characteristic of the output circuit is dominant over the entire frequency characteristic, the cut-off frequency of the high-pass filter is made to match the cut-off frequency of the low-pass characteristic, so that attenuation against frequency fluctuations is achieved. The degree change is made monotonic to facilitate selection of each closed loop constant.

A solution taken by claim 4 is that the output circuit comprises first and second output sections, wherein the first current path and the first and second DMOS transistors are provided at the first output section. Are connected, a first resistor is inserted and connected between the gate and the drain of the first DMOS transistor, a second resistor is inserted and connected between the sources of the first and second DMOS transistors, and the second The source of the DMOS transistor is connected to the output terminal, the drain of the second DMOS transistor is connected to the power supply terminal, and the second current path is connected to the third and fourth DMs at the second output section.
The gate of the OS transistor is connected to the third DMOS
A third resistor is inserted and connected between the gate and the drain of the transistor, a fourth resistor is inserted and connected between the sources of the third and fourth DMOS transistors, and the drain and the output terminal of the fourth DMOS transistor are connected. And the fourth D
The source of the MOS transistor is connected to the ground.

When a current is supplied from the first current path to the first output section, the current is amplified by the first DMOS transistor and the second DMOS transistor, and the second DMOS transistor is amplified.
Current is supplied from the source of the DMOS transistor to the output terminal. The current amplification of the first output section is adjusted according to the ratio of the first resistance and the second resistance. On the other hand, when a current is supplied from the second current path to the second output section, current amplification is performed by the third DMOS transistor and the fourth DMOS transistor, and the output terminal is connected to the drain of the fourth DMOS transistor from the output terminal. Current is supplied. The current amplification of the second output section is adjusted according to the ratio of the third resistance to the fourth resistance.

In a preferred embodiment, a first transistor having a collector connected to the gates of the first and second DMOS transistors in the first current path, and a base connected to the first transistor. A second transistor having a collector and a base connected to each other;
Are connected to the first power supply terminal, and the drain of the first DMOS transistor is connected to the second power supply terminal.

The voltage at the gates of the first and second DMOS transistors is a voltage corresponding to the product of the current of the first current path and the value of the first resistor connected to the drain of the first DMOS transistor. Rises with respect to the voltage between the gate and source of the DMOS transistor. This voltage value may exceed the voltage value of the second power supply terminal, whereas the emitters of the first and second transistors in the first current path have a higher voltage than the voltage of the second power supply terminal. From the first power supply terminal. By applying a voltage that is high enough not to saturate the second transistor, distortion of the current waveform flowing through the first current path can be eliminated.

[0021]

FIG. 1 shows a current driving circuit according to an embodiment of the present invention. In FIG.
The signal input to the input terminal 5 is input to one end of the differential amplifier circuit 1 via the resistor 30. The differential amplifier circuit 1 includes transistors 11 and 12, 13, and 14. Here, a differential pair is formed by the transistor 11 and the transistor 12,
The transistor 13 and the transistor 14 form a current mirror circuit, and the collector of the transistor 11 is connected to the collector of the transistor 14 via the current mirror circuit. Further, the collectors of the transistors 11 and 14 are connected to the base of the transistor 41.
One emitter is connected to ground. Diodes 43 and 45 are cascaded to the collector of the transistor 41, and a constant current is supplied from the anode of the diode 45.
In this configuration, the voltage applied to the base of the transistor 41 is inverted and amplified, and is taken out from the cathode of the diode 43 and the anode of the diode 45. The voltage at the anode of the diode 45 is applied through a transistor 46 to
On the other hand, the voltage of the cathode of the diode 43 is
2 to the emitter of each transistor.
The emitter of the transistor 46 and the emitter of the transistor 42 are connected, so that a voltage can be output to the emitters of the transistors 42 and 46 without distortion due to a change in voltage.

By connecting the resistor 44 and the capacitor 18 in series between the collectors of the transistors 11 and 14 and the collector of the transistor 41, the frequency characteristics of the coil driving device can be adjusted.

Reference numeral 2 denotes an output circuit. In the input section, P
The emitters of an NP transistor 51 and an NPN transistor 52 are connected, and diodes 54 and 55 are connected in series between the bases of both transistors. The current of the current source 56 is supplied to the diodes 54 and 55, and the voltage of the voltage source 53 is applied to the base of the transistor 51. By employing this configuration, the transistor 52
A current equal to the current value of the current source 56 can always flow from the collector of the transistor 51 to the collector of the transistor 51.

A resistor 5 is connected between the emitters of the transistors 42 and 46 and the emitters of the transistors 51 and 52.
0 is connected, the fluctuation of the voltage across the resistor 50 is converted to a current, and the converted current is transmitted via the transistor 51 or 52. With respect to the emitter voltages of transistors 51 and 52, transistor 4
When the emitter voltages of the transistors 2 and 46 are high, a current corresponding to the voltage difference flows out of the collector of the transistor 51,
On the other hand, when the emitter voltages of the transistors 42 and 46 are lower than the emitter voltages of the transistors 51 and 52, a current corresponding to the voltage difference flows into the collector of the transistor 52. After the transistor 51, transistors 59 to 62, transistors 68 and 69, and a resistor 6
7 and 70 form a first current path, while transistors 57, 58,
A second current path is formed by the resistors 64 and 65 and the resistors 63 and 66.

In the first current path, the transistor 5
A current mirror circuit is individually formed by the transistors 9 and 60 and the transistors 61 and 62, and a current is output from the collector of the transistor 62. The collector of the transistor 62 is connected to one end of the resistor 67 and the DMOS transistors 68 and 6.
9 is connected to each gate. The other end of resistor 67 is connected to the source of transistor 68, and resistor 70 is connected between the drain of transistor 68 and ground. The drain of transistor 69 is grounded and the source of this transistor is connected to output terminal 4. In this way, a current mirror circuit is formed by the transistors 68 and 69 and the resistors 67 and 70, and a current corresponding to the collector current value of the transistor 62 flows from the output terminal 4 to the source of the transistor 69. This current value can be adjusted by changing the ratio of the resistor 67 and the resistor 70.

On the other hand, in the second current path, a current mirror circuit is formed by the transistors 57 and 58, and a current is output from the collector of the transistor 58. The collector of the transistor 58 is connected to one end of the resistor 63 and each gate of the DMOS transistors 64 and 65. The other end of the resistor 63 is connected to the source of the transistor 64, and the resistor 66 is connected between the drain of the transistor 64 and the output terminal 4. Further, the drain of the transistor 65 is connected to the output terminal 4, and the source is connected to the power supply terminal.
Here, a current mirror circuit is formed by the transistors 64 and 65 and the resistors 63 and 66, and a current corresponding to the collector current value of the transistor 58 flows out from the drain of the transistor 65 to the output terminal 4. This current value can be adjusted by changing the ratio between the resistor 63 and the resistor 66.
It is set to a value equal to the ratio of the resistance 67 and the resistance 70.

With the above structure, the transistor 51,
When the emitter voltages of the transistors 42 and 46 are higher than the emitter voltage of the transistor 52, a current corresponding to the voltage difference flows from the output terminal 4 to the output circuit 2 and the transistor 5
The transistors 42, 4 with respect to the emitter voltages of 1, 52
When the emitter voltage of the transistor 6 is low, a current corresponding to the voltage difference flows out of the output terminal 4. In addition, transistor 5
When the emitter voltages of the transistors 1 and 52 are equal to the emitter voltages of the transistors 42 and 46, the outflow and the inflow of the current are eliminated.

Even before and after the output current stops flowing, a small current can flow through the transistors 51 and 52 and the operation of the transistors is not stopped, so that distortion of the output waveform can be prevented.

FIG. 2 is a Bode diagram showing the frequency characteristics of the coil driving device of the present embodiment.

In FIG. 2A, a characteristic a is a current mirror circuit composed of transistors 68 and 69 and resistors 67 and 70 or transistors 64 and 65 and resistors 63 and 66.
3 shows the frequency characteristics of the current mirror circuit composed of. The position of the cutoff frequency of this characteristic is DMOS
It is dominated by the parasitic capacitance between the gate and the source of the transistor. On the other hand, the characteristic b1 indicates that the capacitor 1
8 shows the characteristics of a high-pass filter composed of a resistor 8 and a resistor 44. The cutoff frequency higher than the cutoff frequency of the characteristic a is set as the characteristic b. Characteristic c
Represents the frequency characteristic from the input terminal 5 to the output terminal 4
7 shows the frequency characteristics of the circuit excluding the circuits b and b, and these characteristics are determined by the frequency characteristics of the circuit composed of the transistors 11 to 14. In the characteristics from the input terminal 5 to the output terminal 4, d1 is obtained as a combination of the characteristics a, b1, and c. Since the cutoff frequencies of the characteristic a and the characteristic b1 are different, there is a region where the attenuation of the characteristic d1 is sharp, and the frequency band is narrowed.

In FIG. 2B, the characteristics a and c correspond to those in FIG.
It has the same characteristics as (a). On the other hand, the characteristic b indicates the characteristic of the high-pass filter composed of the capacitor 18 and the resistor 44. By setting the cutoff frequency corresponding to the cutoff frequency of the characteristic a to the characteristic b, it is possible to correct the attenuation of the characteristic a in a high frequency range. The characteristic from the input terminal 5 to the output terminal 4 is indicated by d2. The characteristic d2 is obtained as a combination of the characteristics a, b2, and c. By matching the cut-off frequencies of the characteristics a and b2 in this manner, the frequency band can be expanded as compared with the case of FIG.

FIG. 3 is a circuit diagram showing a mirror circuit using DMOS transistors. In FIG. 3, the resistance value R
One end of the resistor 80 is connected to the gates of the transistors 81 and 82, the other end of the resistor 80 is connected to the drain of the transistor 81, and the source of the transistor 81 is connected to the ground via the resistor 83 having a resistance R2. Is done. The source of transistor 82 is connected to ground. In this configuration, one end of the resistor 80 and the transistors 81, 8
The current Iin is applied to the gate of No. 2 and the current Iout flows into the drain of the transistor 82 according to the current value. Hereinafter, details of the operation will be described.

The threshold voltage of the MOS transistor is set to VT
And the voltage between the gate and source of the transistor 81 is V
GS, and the voltage between the drain and the source is VDS. Here, the values of the VDS will be described separately for a saturated state and a non-saturated state.

First, when VDS <(VGS-VT) / 2 (unsaturated state), the equation representing VDS is as follows: VDS = (Iin / 2k) × (VGS-VT) = r × Iin (1) ). Note that r indicates (VGS-VT) / 2k, and k indicates Boltzmann's constant.

Next, when VDS> (VGS-VT) / 2 (saturated state), Iin is as follows: Iin = k × (VGS-VT) ² (2) The formula holds. VDS = VGS-R1 × Iin (3) At the boundary between the saturation and the non-saturation of the input-side transistor 61, the following expression is established. VDS = (VGS−VT) / 2 (4) In this state, the horizontal axis represents the current Iin, and the vertical axis represents the voltage VDS.
In FIG. 4, Equation (1) is represented by e, Equation (2) is represented by f, and Equation (3) is represented by g.

Solving (3) and (4) for the current Iin gives: Iin = (VGS + VT) / 2R1 (5) Since Iin also satisfies Expression (2) at the boundary, (2) ), Solving (5) for VGS gives VGS = {1+ (1 + 16 × R1 × k × VT) ^(1/2) } / 4 × R1 × k + VT (6) By substituting the equation (6) into the equation (5), Iin = [{1+ (1 + 16 × R1 × k × VT) ^(1/2) } / 4 × R1 × k + 2 × VT] / 2 × R1・ (7) is obtained. Iin at this time is defined as Iin1.

From the above, the state of the transistor 81 is as follows. When Iin <Iin1 (saturated state), Iin = k × (VGS−VT) ² VGS = (Iin / k) ^(1/2) + VT (8) When Iin> Iin1 (unsaturated state), (1) From the equation, VDS = Iin / 2k × (VGS−VT) = r × Iin From this equation and equation (3), if VGS = (R1 + r) × Iin R1 >> r, then VGS = R1 × Iin (9) In FIG. 5A, equation (8) is indicated by h, and equation (9) is indicated by i.

In consideration of the effect of the source resistance, the gate voltage VG is as follows. When Iin <Iin1, VG = (Iin / k) ^(1/2) + VT + R2 × Iin (10) When Iin> Iin1, VG = (R1 + R2) × Iin (11) Therefore, R1 and R2 are By appropriate choice, Iin
The mirror ratio can be changed at the point of = Iin1.

Based on the above results, FIG. 5B shows a characteristic in which the horizontal axis represents the input current Iin and the vertical axis represents the output current Iout. From FIG. 5B, when the input current value is smaller than Iin1, the relationship between the output current and the input current is linear, and when the input current becomes larger than Iin1, the output current increases sharply with the increase of the input current. Can be obtained.

[0040]

As described above, according to the present invention, even if the values of the resistors 30 to 34 and the coil 73 of the first closed loop differ depending on the individual devices, the respective constants of the output circuit 2 are changed with respect to these values. Need not be changed.

Further, a large current can be driven because a double diffusion type MOS (DMOS) transistor capable of driving a large current can be employed for the output circuit 2. In particular, by adjusting the ratio of the resistance values in the mirror circuit constituted by the DMOS transistors, it is possible to realize a current drive circuit having a sharp rise.

Further, by providing a capacitor and a resistor for phase adjustment in the differential amplifier circuit, the frequency characteristics can be adjusted to be widened.

[Brief description of the drawings]

FIG. 1 is a diagram showing a coil driving device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a frequency characteristic of FIG. 1;

FIG. 3 is a diagram showing a mirror circuit using the DMOS transistor according to FIG. 1;

FIG. 4 is a diagram showing voltage-current characteristics of each unit in FIG. 3;

FIG. 5 is a diagram showing voltage-current characteristics of each unit in FIG. 3;

FIG. 6 is a diagram showing a conventional hard disk device.

FIG. 7 is a diagram showing a conventional coil driving device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Differential amplifier circuit 2 Output circuit 3 Closed loop circuit 4, 5 terminal 6 Inverting amplifier 7 Comparator 8, 9 terminal 11-16 Transistor 17 Current source 18 Capacitor 19 Transistor 21, 22 Diode 23 Current source 24-26 Transistor 28, 30 -34 Resistance 41, 42 Transistor 43 Diode 44 Resistance 45 Diode 46 Transistor 50 Resistance 51, 52 Transistor 53 Voltage source 54, 55 Diode 56 Current source 57-62 Transistor 63 Resistance 64, 65 Transistor 66, 67 Resistance 68, 69 Transistor 70 Resistance 71 Actuator 72 Head 73 Coil 74 Disk

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Shinji Tanaka 1006 Kadoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (5)

[Claims] 1. A signal terminal to which a signal is input, a first resistor having one end connected to the signal terminal, a fixed voltage source connected to the first input terminal, and a first input terminal connected to the first input terminal. The other end of the resistor is connected, a differential amplifier circuit that outputs a signal voltage corresponding to the voltage difference between the input terminal pair from an output terminal, and the signal voltage is input to an input terminal and compared with a fixed voltage. Supplying a signal current to a first current path when a polarity of a difference voltage of the signal voltage with respect to the fixed voltage is a first polarity, and outputting a current corresponding to a current value of the first current path to an output terminal; To supply a signal current to the second current path when the polarity of the differential voltage is the second polarity.
An output circuit that causes a current corresponding to the current value of the current path to flow into the output terminal, a coil having one end connected to the output terminal of the output circuit, and detecting a current flowing through the coil to output a signal to the output terminal. Detecting means for outputting, and a second resistor inserted and connected between an output terminal of the detecting means and a second input terminal of the differential amplifier circuit, wherein the first and second resistors of the output circuit are provided. A DC current having substantially the same value in the forward direction of the current path of the coil driving device. 2. The semiconductor device according to claim 1, wherein the output circuit includes a resistor inserted and connected between an output terminal of the differential amplifier circuit and a common connection of the first conductivity type transistor and the second conductivity type transistor. A serially connected series of first and second diodes connected in series between the bases of the second conductivity type transistors and supplied with a direct current, a voltage source connected to the base of the first conductivity type transistor or the base of the second conductivity type transistor 2. The coil according to claim 1, further comprising connection means for individually connecting collectors of the first conductivity type transistor and the second conductivity type transistor to the first current path and the second current path. Drive. 3. A differential amplifier circuit comprising a high-pass filter, wherein a cut-off frequency of the high-pass filter and a cut-off characteristic for determining a low-pass characteristic of an output circuit are substantially matched. The coil driving device according to claim 1, wherein 4. The output circuit includes first and second output units, wherein the first current path is connected to the gates of the first and second DMOS transistors at the first output unit, A first resistor is inserted and connected between the gate and the drain of the DMOS transistor, and the first and second DMOS
A second resistor is inserted and connected between the sources of the transistor,
The source of the second DMOS transistor is connected to the output terminal, the drain of the second DMOS transistor is connected to the power supply terminal, and the second current path is connected to the third and fourth DMOS transistors at the second output section. Are connected, a third resistor is inserted and connected between the gate and the drain of the third DMOS transistor, and the third and fourth DMOS transistors are connected.
A fourth resistor is inserted and connected between the sources of the MOS transistors, the drain and the output terminal of the fourth DMOS transistor are connected, and the source of the fourth DMOS transistor is connected to the ground. 2. The coil driving device according to 1. 5. The first current path in the first current path.
A first transistor having a collector connected to the gate of the second DMOS transistor; and a second transistor having a collector and a base connected to the base of the first transistor, wherein the emitters of the first and second transistors are provided. 5. The coil driving device according to claim 4, wherein the first power supply terminal is connected to the first power supply terminal, and the drain of the first DMOS transistor is connected to the second power supply terminal.