JPH10303654A - Mute circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make the size of the circuit small, which provides an output of a mute pulse signal to block a switching noise resulting from sound and disturbance of an image caused when a power supply of an electronic device is switched on/off. SOLUTION: The circuit is provided with a series circuit consisting of a capacitor C1 that is charged with an input voltage signal received at an input terminal of the mute circuit through the conduction of a diode D1 and of a diode D2 that is conducted to lead out a signal from the capacitor C1 to an output terminal, a resistor R2 that connects a connecting point between the capacitor C1 and the diode D2 to ground, and a transistor(TR) whose base connects to the input terminal, whose emitter connects to a connecting point between the diode D1 and the capacitor C1, and whose collector connects to the output terminal. The mute circuit provides an output of a mute pulse ON signal till the input voltage signal goes from a low level (L) to a high level (H) and the capacitor C1 is charged and provides an output of a mute pulse OFF signal till the input voltage signal goes from an H level to an L and the capacitor C1 is discharged. Since only one capacitor is employed for the circuit, the circuit is placed in a narrow space.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mute circuit for outputting a mute pulse signal with a simple configuration.

[0002]

2. Description of the Related Art FIG. 2 is a circuit diagram of a mute signal generating circuit showing a conventional example.

In a camera-integrated VTR (so-called video camera) or the like, a mute signal generating circuit (hereinafter referred to as a mute circuit) which operates by turning on and off a power supply has a circuit shown in FIG.

In an initial state, a mute circuit is supplied from a rectified + power supply by pressing a power switch (not shown) or turning on a power control switch (not shown) linked to the power switch to shut out the output of the device. High level (hereinafter referred to as H)
Is supplied, the H input signal passes through the diode D3 and charges the capacitor C3 via the resistor R4. However, it is assumed that the capacitors C2 and C3 are discharged in the initial state.

[0005] The base of the transistor Q2 is connected to the input terminal via a high resistance R3 and the other end is connected to the capacitor C2 which is grounded. The charging current of the capacitor C2 by the input H signal becomes the base current of the transistor Q2, and the transistor Q2 is turned on. Therefore, when the power supply is turned on and the input voltage signal is at a toe level (hereinafter, L
) To H, the output terminal connected to the collector of the transistor Q2 outputs H as a mute signal. And the base current of transistor Q2 is
The capacitor C2 is charged. When the capacitor C2 is charged, the base current of the transistor Q2 does not flow, so that the transistor Q2 is turned off, and the mute pulse of the mute signal output at the output terminal changes from H to L. The input voltage signal that has passed through the diode D3 in parallel with this charges the capacitor C3 via the resistor R4.

As for the mute pulse H, a constant-voltage mute pulse is output from the collector of the transistor Q2 until the capacitor C3 is charged. However, the base current stops flowing when the capacitor C2 is charged. When the transistor Q2 is turned off, the mute pulse is not output from the output terminal. That is, when an H signal is supplied to the input terminal of the mute circuit, a mute pulse (hereinafter referred to as a mute pulse ON signal) having a constant level for a predetermined period (until the capacitor C2 is charged) is output from the collector of the transistor Q2. ) Is output. The resistor R3 is connected to a capacitor C3 for stably turning off the transistor Q2.
To the voltage level of the input voltage signal.

Next, the power switch or the power control switch is pressed to turn off the power, and the level of the input voltage signal becomes zero.
Is supplied to the input terminal, the transistor Q
The diode No. 2 is turned on as a result of the diode D4 having a forward voltage characteristic in which the base side is at the ground level + approximately 0.6 V conducting and the electric charge of the capacitor C2 being rapidly discharged in the parallel circuit of the resistor R3 and the diode D4. .

The electric charge charged in the capacitor C3 is equal to the resistance R
4, the current is supplied to the emitter of the transistor Q2, a collector current due to the discharge current of the capacitor C3 flows, the transistor Q2 is turned on, and an H-level mute pulse signal is output from the output terminal. Further, the mute pulse signal is not output with the discharge of the capacitor C3.
That is, when the level of the input voltage signal input to the input terminal of the mute circuit changes from H to L, the transistor Q
From the collector side of No. 2, an H mute pulse signal (hereinafter, referred to as a mute pulse OFF signal) having a constant level for a predetermined period (until the capacitor C3 is discharged) is output.

A control signal for image display or a mute control of an audio signal is performed by a mute pulse ON signal and a mute pulse OFF signal output from the mute circuit.

[0010]

The precision electronic equipment has been reduced in size and weight. In particular, a camera-integrated VTR (so-called video camera) has been required to have a shape that is easy to carry and easy to operate with an emphasis on user convenience. I have. For this reason, the mounting substrate of the video camera is required to have higher density.

The use of two capacitors occupying a large area occupied by the substrate and a large surface area occupied by the substrate in the above-described mute circuit has been desired to be improved from the viewpoint of increasing the density of the mounting substrate.

[0012]

According to the present invention, there is provided a mute circuit for outputting a mute pulse signal in response to an input voltage signal, wherein the first diode is turned on by a high-level input voltage signal input to an input terminal; A capacitor that is charged with the conduction of the first diode, a second diode that conducts from the capacitor to the output terminal while the capacitor is charged, and a resistor that grounds a connection point between the capacitor and the second diode. And a transistor having an input connected to the base of the input terminal, an emitter connected to a connection point of the first diode and the capacitor, and a collector connected to the output terminal, and the input voltage signal input to the input terminal. Changes from a low level to a high level, and the first capacitor is charged until the capacitor is charged.
And outputting a mute pulse signal from the output terminal via the second diode, and when the input voltage signal input to the input terminal changes from a high level to a low level, the transistor is turned on with the conduction of the transistor. A mute circuit that outputs a mute pulse signal via the transistor until the capacitor is discharged.

According to the present invention, there is provided a mute circuit for outputting a mute pulse signal in response to an input voltage signal, wherein a first diode which is turned on by a high-level input voltage signal input to an input terminal, A connector for connecting a capacitor that is charged with conduction,
A second diode that conducts from the connector to the output terminal while the capacitor connected to the connector is charged; a resistor that grounds a connection point between the connector and the second diode; A wiring board on which an input and an emitter are respectively connected to a connection point of the first diode and the connector and a collector is connected to an output terminal; and a wiring board on which the wiring is wired, and a connector for connecting the capacitor to the connector is provided. This is a mute circuit including a capacitor.

[0014]

FIG. 1 is a circuit diagram showing a mute circuit according to the present invention. Hereinafter, a mute circuit according to the present invention will be described with reference to the drawings. The same components as those described above are denoted by the same reference numerals, and description thereof will be omitted.

First, the mute circuit of the present invention outputs a mute pulse signal according to an input voltage signal. The mute circuit includes a diode D1 that conducts when the input voltage signal changes from a low level L to a high level H, a capacitor C1 that is charged with the conduction of the diode D1, and an output terminal while the capacitor C1 is charged. A series circuit with a diode D2 that outputs an H signal is provided between the input terminal and the output terminal.
The transistor Q1 is turned on when the input voltage signal changes from H to L and the collector is connected to the output terminal of the transistor Q1.

The mute circuit of this embodiment has a capacitor C
A mute pulse ON signal is output until 1 is charged, and a mute pulse OFF signal is output until the capacitor C1 is discharged due to the conduction of the transistor Q1.

Further, the mute circuit of this embodiment outputs the level of the mute pulse signal so as to be substantially equal to the level of the input voltage signal. For example, when a power switch (not shown) is pressed in an initial state or a power control switch linked to the power switch is turned on, an H input voltage signal is supplied to the input terminal of the mute circuit. The signal charges the capacitor C1 via the diode D1. At this time (initial state), the capacitor C1 is assumed to be completely discharged.

Here, the current flowing through the diode D1 is:
The diode D1 is turned on, and a mute signal is directly output from the diode D1 to the output terminal via a series circuit of the capacitor C1 and the diode D2. Also, the ground resistance R2
, The capacitor C1 is charged with electric charge. When the capacitor C1 is charged, no current flows through the diode D1, so that the diodes D1 and D2 are turned off.

Until the capacitor C1 is charged, a pulse signal output H is output as a mute signal from the cathode side of the diode D2. However, since the capacitor C1 is charged and the diodes D1 and D2 are turned off, the output is output. The mute pulse ON signal to be output becomes L, and the mute signal is not output. That is, when an H input voltage signal is supplied to the input terminal of the mute circuit, the diode D2
Outputs a mute pulse ON signal having a constant level for a predetermined period (until the capacitor C1 is charged).

Next, when the power switch is pressed again or the power control switch is turned off to supply an input voltage signal of L to the input terminal, the base side of the transistor Q1 is set to the ground level by the resistor R1, The electric charge charged in the capacitor C1 is discharged from the emitter of the transistor Q1 to the base to turn on the transistor Q1.

The charged charge is discharged from the collector of the transistor Q1 from the capacitor C1, and an H mute pulse OFF signal is output from the output terminal. Then, the transistor Q1 is turned off with the discharge of the capacitor C1, and the mute signal is not output. That is, when a signal of L is supplied to the input terminal of this mute circuit and the voltage of the input terminal changes from H to L, a predetermined period (until the capacitor C1 is discharged) is output from the collector side of the transistor Q1. A mute pulse OFF signal of a pulse signal having a level is output.

In this manner, the mute control of, for example, an audio signal or a video signal (not shown) is performed by the mute pulse ON and mute pulse OFF signals. Also,
The mute circuit of the present embodiment can be applied not only to the audio amplifier but also to a device using the mute pulse generation circuit.

The mute circuit of this embodiment can be incorporated in an electronic circuit using a mute pulse signal, for example, a video signal mute circuit, an audio signal mute circuit, and the like. When the capacitor is connected to the connector, the mute circuit is formed as an IC circuit, or the area occupied by the circuit when the circuit is assembled to a wiring board is reduced.

Even when the mute signal control is performed by a microcomputer or the like provided for controlling the electronic equipment, if the mute signal control of the CPU involves a malfunction due to an unexpected power failure, a user operation error, or the like, the present embodiment Needless to say, the mute signal control may be performed in a circuit by using the mute circuit described above.

[0025]

As described above, the mute circuit according to the present invention has a single electrolytic capacitor occupying a large area and volume on the board on which it is mounted.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of a mute circuit according to the present invention.

FIG. 2 is a circuit diagram for explaining a conventional mute circuit.

[Explanation of symbols]

 D1, D2, D3, D4 Diode Q1, Q2 Transistor C1, C2, C3 Capacitor R1, R2, R3, R4 Resistance

Claims (2)

[Claims] 1. A mute circuit for outputting a mute pulse signal according to an input voltage signal, comprising: a first diode that is made conductive by a high-level input voltage signal input to an input terminal; A capacitor to be charged; a second diode that conducts from the capacitor to the output terminal while the capacitor is charged; a resistor that grounds a connection point between the capacitor and the second diode; A transistor having an input and an emitter connected to a connection point between the first diode and a capacitor and having a collector connected to an output terminal, wherein the input voltage signal input to the input terminal changes from a low level to a high level The capacitor is charged until the capacitor is charged. A pulse signal is output from the output terminal, and when the input voltage signal input to the input terminal changes from a high level to a low level, the capacitor is discharged along with the conduction of the transistor. A mute circuit for outputting a mute pulse signal via the transistor. 2. A mute circuit for outputting a mute pulse signal according to an input voltage signal, comprising: a first diode that is made conductive by a high-level input voltage signal input to an input terminal; A connector for connecting a capacitor to be charged; a second diode that conducts from the connector to an output terminal while the capacitor connected to the connector is charged; and a grounding point between the connector and the second diode. And a transistor that is connected to the base from the input terminal, has an emitter connected to a connection point between the first diode and the connector, and has a collector connected to the output terminal. A mute circuit comprising a connector-equipped capacitor for connecting the capacitor to the connector. .