JPH10301255A - Electron beam mask plotting method - Google Patents
Electron beam mask plotting methodInfo
- Publication number
- JPH10301255A JPH10301255A JP10568097A JP10568097A JPH10301255A JP H10301255 A JPH10301255 A JP H10301255A JP 10568097 A JP10568097 A JP 10568097A JP 10568097 A JP10568097 A JP 10568097A JP H10301255 A JPH10301255 A JP H10301255A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- dimensional accuracy
- information
- proximity effect
- effect correction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Electron Beam Exposure (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は電子線マスク描画方
法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam mask drawing method.
【0002】[0002]
【従来の技術】従来の電子線マスク描画は加速電圧20
kv以下、かつ、近接効果補正無しで行われていた。こ
れはマスクへの最小描画寸法はたかだか2μm程度であ
った為、加速電圧20kvでも十分対応出来た。しか
し、半導体素子の集積化が進むに従い描画寸法が段々小
さくなリ、また、レチクル倍率が従来の5倍から4倍へ
と変化したため、今日の最小描画寸法は1μmが要求さ
れる。従来の加速電圧20kvで、1μmのパターンを
マスク上に描画する場合、通常、2μm×1μmの長方
形のビームを成形し、マスクに照射しているが、クーロ
ン効果によりビームがぼけ、正確に1μmの寸法を得る
ことが出来なかった。これを解決するには、描画する電
子線のショットの大きさを小さくしてクーロン効果を低
減し数多く打つことになり可能となるが、極端な描画速
度の低下を招くことになる。2. Description of the Related Art Conventional electron beam mask writing has an acceleration voltage of 20.
kv or less and without the proximity effect correction. Since the minimum drawing dimension on the mask was at most about 2 μm, it could sufficiently cope with the acceleration voltage of 20 kv. However, as the integration of semiconductor elements progresses, the drawing size becomes smaller and smaller, and the reticle magnification changes from 5 times to 4 times the conventional value, so that today's minimum drawing size is required to be 1 μm. When a 1 μm pattern is drawn on a mask at a conventional acceleration voltage of 20 kv, a 2 μm × 1 μm rectangular beam is usually formed and irradiated on the mask. However, the beam is blurred due to the Coulomb effect and the 1 μm The dimensions could not be obtained. In order to solve this problem, it is possible to reduce the Coulomb effect by reducing the size of the shot of the electron beam to be drawn and to hit many shots, but the drawing speed is extremely lowered.
【0003】そこで、描画する電子線のショットの大き
さを維持したまま、例えば、1μmの最小描画寸法に2
μm×1μmのショットで描画するには、加速電圧を例
えば50kv程度に上げる必要がある。Accordingly, while maintaining the size of the shot of the electron beam to be drawn, the minimum drawing size of, for example, 1 μm is reduced to 2 μm.
To draw with a shot of μm × 1 μm, it is necessary to increase the acceleration voltage to, for example, about 50 kv.
【0004】一方、加速電圧を上げて露光すると、マス
ク基板からの反射電子が多くなりその反射電子でレジス
トが露光される近接効果現象が現れてくる。この近接効
果はパターン密度が大きい部分程顕著になることが判っ
ている為、パターン密度の高い場所は低い露光量を、パ
ターン密度の低い場所は露光量を高く与えて、パターン
密度に応じて露光量を変える、所謂、パターン密度近接
補正方式が提案されている。On the other hand, when the exposure is performed with the acceleration voltage increased, the number of reflected electrons from the mask substrate increases and a proximity effect phenomenon in which the resist is exposed with the reflected electrons appears. It has been found that this proximity effect becomes more remarkable in a portion with a high pattern density, so a portion with a high pattern density is given a low exposure dose, and a portion with a low pattern density is given a high exposure dose, and exposed in accordance with the pattern density. A so-called pattern density proximity correction method in which the amount is changed has been proposed.
【0005】まず、高加速電圧例えば50kvと近接効
果補正方式を組み合わせれば、今日要求されている最小
描画寸法1μm程度を得ることが出来る。しかし、マス
ク描画面積は通常、120mm×120mm程度と広く、近
接効果補正を全面に適応させている為、近接効果補正に
費やす時間は描画時間全体の1/2〜1/3を占めてい
る。First, when a high acceleration voltage, for example, 50 kv, and a proximity effect correction method are combined, a minimum drawing size of about 1 μm required today can be obtained. However, the mask drawing area is usually as large as about 120 mm × 120 mm, and the proximity effect correction is applied to the entire surface. Therefore, the time spent for the proximity effect correction occupies 2〜 to 3 of the entire drawing time.
【0006】現在、スループットを上げる大きな疎外要
因となっている。At present, this is a major alienation factor that increases the throughput.
【0007】[0007]
【発明が解決しようとする課題】本発明の目的は連続的
にマクク描画を行い、スループットの向上を図ることに
ある。SUMMARY OF THE INVENTION It is an object of the present invention to perform continuous mask drawing to improve the throughput.
【0008】[0008]
【課題を解決するための手段】上記目的を達成するた
め、本発明は加速電圧50kvとパターン密度に応じた
近接効果補正方式を組み合わせ、かつ、寸法精度の厳し
い部分と緩やかな部分とに別け、各々の部分に近接効果
補正有無の情報を与え、描画時にその情報でもって近接
効果補正あり無しの描画を連続的に描画する。In order to achieve the above object, the present invention combines an acceleration voltage of 50 kv and a proximity effect correction method according to a pattern density, and separates a portion having strict dimensional accuracy from a portion having gradual accuracy. Information on the presence / absence of the proximity effect correction is given to each part, and the drawing with / without the proximity effect correction is continuously drawn with the information at the time of drawing.
【0009】近年、半導体素子の高集積化に伴い加工寸
法は微細化の一途をたどっている。例えば、0.25μ
m素子のマスク上の最小寸法は5倍の場合1.25μ
m、4倍の場合1.0μm となっている。電子線で微細
なパターンを得るには加速電圧を上げて、クーロン効果
を低減してぼけを小さくし、かつレジストに照射された
時の前方散乱を小さくすることによって1μm以下のパ
ターンをマスク上で達成出来る。一方、基板からの反射
電子による影響を軽減するため、近接効果補正を併用す
るが、近接効果補正に費やす時間は全体の描画時間の約
1/2〜1/3程度を占めることになる。そこで、寸法
精度に応じて描画するパターンを別け、寸法精度の厳し
い部分を抽出し、その部分にのみ近接効果補正描画を実
施し、その他は近接補正しない描画を実施すれば、マス
ク一枚描画する時間は短くなる。In recent years, the processing dimensions have been steadily miniaturized in accordance with the high integration of semiconductor elements. For example, 0.25μ
The minimum dimension of the m-element on the mask is 1.25μ in case of 5 times
m, it is 1.0 μm when quadrupled. To obtain a fine pattern with an electron beam, increase the accelerating voltage, reduce the Coulomb effect, reduce the blur, and reduce the forward scatter when irradiating the resist to reduce the pattern of 1 μm or less on the mask. Can be achieved. On the other hand, proximity effect correction is also used in order to reduce the influence of the reflected electrons from the substrate, but the time spent for the proximity effect correction occupies about 2〜 to 描画 of the entire drawing time. Therefore, if the pattern to be drawn is separated according to the dimensional accuracy, a portion with strict dimensional accuracy is extracted, and the proximity effect correction drawing is performed only on the portion, and if the other portion is not subjected to the proximity correction, a single mask is drawn. Time is shorter.
【0010】また、近接効果補正描画と同補正無しの描
画を完全に2回に分けて実施することも可能であるが、
描画速度が遅くなる点、及び2回に分けて別々の条件で
描画することによる描画パターンの相対位置精度の劣化
が生じてくるため、自動的に近接補正有り無しを判断し
て連続的に描画することが必要である。It is also possible to completely perform the proximity effect correction drawing and the drawing without the correction in two separate steps.
Since the drawing speed slows down and the relative position accuracy of the drawing pattern deteriorates due to drawing twice and under different conditions, it is automatically determined whether or not proximity correction is performed, and continuous drawing is performed. It is necessary to.
【0011】[0011]
【発明の実施の形態】図1は実施例1で、従来装置に近
接判定部7を追加したものである。FIG. 1 shows a first embodiment in which a proximity judging section 7 is added to the conventional device.
【0012】加速電圧制御1により50kv程度に加速
された電子線2は、露光時間を決めるブランカ3、及び
電子レンズ4を経てマスク5上に照射される。一方、描
画すべきパターン6は近接判定部7を通り、近接効果補
正ユニット8を通り露光量設定ユニット9に送られる
か、又は直接露光量設定ユニット9に送られる。その
後、露光量設定ユニット9からブランカ3に信号が送ら
れて電子線を制御してプレートは描画される。The electron beam 2 accelerated to about 50 kv by the acceleration voltage control 1 is irradiated on the mask 5 via the blanker 3 for determining the exposure time and the electron lens 4. On the other hand, the pattern 6 to be drawn is sent to the exposure setting unit 9 via the proximity determining unit 7 and the proximity effect correction unit 8 or is sent directly to the exposure setting unit 9. After that, a signal is sent from the exposure setting unit 9 to the blanker 3 to control the electron beam and the plate is drawn.
【0013】ここで、前もって描画すべきパターンに近
接効果補正描画を行うか否かの情報を付加して、バッフ
ァメモリ6に格納しておく。図3に例を示す。パターン
22は近接補正ビット1を付加することにより、近接描
画を行う。パターン23、及びパターン24は近接補正
ビット0を付加することにより、近接補正なしで描画す
る。同情報が描画パターンと伴に、近接判定部7に送ら
れてきた時、近接効果補正有りの情報の場合はスイッチ
10はA側になり、描画パターンは近接効果補正ユニッ
トに送られてパターン密度に応じた露光が露光量設定ユ
ニットに送られ、電子線を制御してプレートは描画され
る。Here, information as to whether or not to perform proximity effect correction drawing is added to a pattern to be drawn in advance and stored in the buffer memory 6. FIG. 3 shows an example. The pattern 22 performs proximity drawing by adding the proximity correction bit 1. The pattern 23 and the pattern 24 are drawn without proximity correction by adding the proximity correction bit 0. When the information is sent to the proximity determination unit 7 along with the drawing pattern, if the information indicates that the proximity effect correction is performed, the switch 10 is set to the A side, and the drawing pattern is sent to the proximity effect correction unit and the pattern density is sent. Is sent to the exposure setting unit, and the plate is drawn by controlling the electron beam.
【0014】一方、描画パターンと伴に近接判定部7に
近接効果補正無しの情報が送られてきた時は、スイッチ
10はB側になり描画パターンは直接露光が露光量設定
ユニットに送られて、近接効果補正無しでプレートは露
光される。On the other hand, when information indicating that there is no proximity effect correction is sent to the proximity determining unit 7 along with the drawing pattern, the switch 10 is set to the B side, and the drawing pattern is directly sent to the exposure setting unit. The plate is exposed without proximity correction.
【0015】次に図2を用いて、寸法精度の厳しさに応
じたパターン分割による描画方法を説明する。一般に、
マスク21上のパターンは寸法精度の厳しい部分と緩や
かな部分とに別れる。遮光体部分22通常、寸法精度は
緩やかである。また、描画パターンによっては、半導体
素子のコアに当たる部分24のみ寸法精度が厳しく、周
辺回路部分23は寸法精度が緩やかな時がある。この場
合、寸法精度の厳しいコア部分24のパターンに近接効
果補正有りの情報を付与し、その他の遮光体部22と周
辺回路23の描画パターンに近接効果補正無しの情報を
付与して連続して一度で描画することにより、コア部分
24のパターンと周辺回路部分23のパターンの相対位
置精度を保つことが出来る。Next, a drawing method by pattern division according to the strictness of dimensional accuracy will be described with reference to FIG. In general,
The pattern on the mask 21 is divided into a part with strict dimensional accuracy and a gentle part. Shielding part 22 The dimensional accuracy is usually moderate. Further, depending on the drawing pattern, the dimensional accuracy is strict only in the portion 24 corresponding to the core of the semiconductor element, and the dimensional accuracy in the peripheral circuit portion 23 may be loose. In this case, the information of the proximity effect correction is given to the pattern of the core portion 24 with strict dimensional accuracy, and the information of the no proximity effect correction is given to the other light-shielding body portion 22 and the drawing pattern of the peripheral circuit 23 to continuously perform. By drawing at once, the relative positional accuracy of the pattern of the core portion 24 and the pattern of the peripheral circuit portion 23 can be maintained.
【0016】図4に実施例2を示す。パターン情報に近
接補正ビットの情報を与えない場合はバッファメモリを
二面持ちA面に近接補正しないパターン22を、B面に
近接補正するパターン23、及びパターン24を格納す
る。描画制御CPU11から近接補正しないパターン2
2を、描画する場合はバッファメモリA面を選択し描画
を実施する。また、近接補正するパターン23,24を
描画する場合は描画制御CPU11からバッファメモリ
B面を選択し描画実行する。FIG. 4 shows a second embodiment. When the information of the proximity correction bit is not given to the pattern information, the pattern 22 having two buffer memories and not performing the proximity correction on the surface A, the pattern 23 for performing the proximity correction on the surface B, and the pattern 24 are stored. Pattern 2 without proximity correction from drawing control CPU 11
In the case of drawing 2, the surface of the buffer memory A is selected and drawing is performed. When drawing the patterns 23 and 24 for proximity correction, the drawing control CPU 11 selects the surface of the buffer memory B and executes drawing.
【0017】[0017]
【発明の効果】本発明によれば、微細なパターンを高
速,高精度にマスク上に描画でき、年々厳しくなる要求
寸法精度に答えうるマククを供給することが可能とな
る。According to the present invention, it is possible to supply a mask which can draw a fine pattern on a mask at high speed and with high accuracy and which can meet the required dimensional accuracy, which is becoming stricter year by year.
【図1】発明の一実施例の説明図。FIG. 1 is an explanatory diagram of one embodiment of the present invention.
【図2】寸法精度に応じてパターン分割した描画方式の
説明図。FIG. 2 is an explanatory diagram of a drawing method in which a pattern is divided according to dimensional accuracy.
【図3】パターン情報の説明図。FIG. 3 is an explanatory diagram of pattern information.
【図4】発明の第二実施例の説明図。FIG. 4 is an explanatory view of a second embodiment of the present invention.
1…加速電圧制御、2…電子線、3…ブランカ、4…電
子レンズ、5…プレート、6…バッファメモリ、7…近
接判定部、8…近接補正ユニット、9…露光量設定ユニ
ット、10…スイッチ。DESCRIPTION OF SYMBOLS 1 ... Acceleration voltage control, 2 ... Electron beam, 3 ... Blanker, 4 ... Electronic lens, 5 ... Plate, 6 ... Buffer memory, 7 ... Proximity determination unit, 8 ... Proximity correction unit, 9 ... Exposure amount setting unit, 10 ... switch.
Claims (2)
する電子線マスク描画装置において、20kv以上の加
速電圧と描画パターンの面積密度に応じて露光量を変え
るパターン密度近接効果補正方式を組み合せた描画装置
で、描画すべき一層分のパターンデータの内パターン寸
法精度の厳しい部分と緩やかな部分に別け、前記寸法精
度の厳しい部分は近接効果補正を与え、寸法精度の緩や
かな部分は近接効果補正を与えないで描画することを特
徴とする電子線マスク描画方法。In an electron beam mask writing apparatus for manufacturing a mask substrate used for manufacturing a semiconductor element, writing is performed by combining an acceleration voltage of 20 kV or more and a pattern density proximity effect correction method for changing an exposure amount according to an area density of a writing pattern. In the apparatus, the pattern data of one layer to be drawn is divided into a portion having a strict pattern dimensional accuracy and a portion having a gentle pattern dimensional accuracy. An electron beam mask drawing method characterized by drawing without giving.
度の厳しい部分と、緩やかな部分の情報を描画パターン
情報として入力し、前記情報を基に近接効果補正を与え
た描画と、与えない描画を連続的に行う電子線マスク描
画方法。2. A method according to claim 1, wherein information of a portion having a strict pattern dimensional accuracy and information of a portion having a gradual accuracy are input as drawing pattern information, and a drawing obtained by performing a proximity effect correction based on said information is not provided. An electron beam mask writing method that performs writing continuously.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10568097A JPH10301255A (en) | 1997-04-23 | 1997-04-23 | Electron beam mask plotting method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10568097A JPH10301255A (en) | 1997-04-23 | 1997-04-23 | Electron beam mask plotting method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10301255A true JPH10301255A (en) | 1998-11-13 |
Family
ID=14414146
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10568097A Pending JPH10301255A (en) | 1997-04-23 | 1997-04-23 | Electron beam mask plotting method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10301255A (en) |
Cited By (5)
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---|---|---|---|---|
JP2004361507A (en) * | 2003-06-02 | 2004-12-24 | Renesas Technology Corp | Method for manufacturing photomask and photomask drawing system |
WO2005024519A1 (en) * | 2003-09-02 | 2005-03-17 | Fujitsu Limited | Optical proximity effect correction processing method allowing for dummy pattern |
WO2005104193A1 (en) * | 2004-03-30 | 2005-11-03 | Fujitsu Limited | Method for correcting electron beam exposure data |
JP2011243805A (en) * | 2010-05-19 | 2011-12-01 | Nuflare Technology Inc | Drawing data creating method, charged particle beam drawing method, and charged particle beam apparatus |
US8103977B2 (en) | 2005-04-26 | 2012-01-24 | Renesas Electronics Corporation | Semiconductor device and its manufacturing method, semiconductor manufacturing mask, and optical proximity processing method |
-
1997
- 1997-04-23 JP JP10568097A patent/JPH10301255A/en active Pending
Cited By (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004361507A (en) * | 2003-06-02 | 2004-12-24 | Renesas Technology Corp | Method for manufacturing photomask and photomask drawing system |
WO2005024519A1 (en) * | 2003-09-02 | 2005-03-17 | Fujitsu Limited | Optical proximity effect correction processing method allowing for dummy pattern |
US7631288B2 (en) | 2003-09-02 | 2009-12-08 | Fujitsu Microelectronics Limited | Optical proximity correction performed with respect to limited area |
WO2005104193A1 (en) * | 2004-03-30 | 2005-11-03 | Fujitsu Limited | Method for correcting electron beam exposure data |
US7569842B2 (en) | 2004-03-30 | 2009-08-04 | Fujitsu Microelectronics Limited | Method for correcting electron beam exposure data |
US8103977B2 (en) | 2005-04-26 | 2012-01-24 | Renesas Electronics Corporation | Semiconductor device and its manufacturing method, semiconductor manufacturing mask, and optical proximity processing method |
JP2012212154A (en) * | 2005-04-26 | 2012-11-01 | Renesas Electronics Corp | Method of manufacturing semiconductor device |
US8458627B2 (en) | 2005-04-26 | 2013-06-04 | Renesas Electronics Corporation | Semiconductor device including logic circuit having areas of different optical proximity accuracy |
US8719740B2 (en) | 2005-04-26 | 2014-05-06 | Renesas Electronics Corporation | Semiconductor device which is subjected to optical proximity correction |
JP2015028636A (en) * | 2005-04-26 | 2015-02-12 | ルネサスエレクトロニクス株式会社 | Method of manufacturing semiconductor device |
JP2011243805A (en) * | 2010-05-19 | 2011-12-01 | Nuflare Technology Inc | Drawing data creating method, charged particle beam drawing method, and charged particle beam apparatus |
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