JPH10301071A - Mild and system for displaying wafer map of liquid crystal display panel - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the wafer map display method and the system for a liquid crystal display panel by which the cause of defects caused by the wafer processing of a liquid crystal display panel are easily found and the finding is quickly fed back from the assembling process to the wafer process so as to reduce the yield of the defect generation. SOLUTION: During the panel measurement in the wafer process, the information including a lot number, a wafer number and the position of the panel is written on each panel 2. During the assembling process, the information written in each panel 2, which is individually separated, is read with the characteristic inspection information of each panel 2, original wafer 1 condition is reproduced based on the each information above and the characteristic of the panel 2 and the defect distribution are displayed on a wafer map.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a history of a manufacturing process of a TFT panel for a liquid crystal display panel, which is used for a small and medium-sized liquid crystal display device of a thin film transistor (hereinafter abbreviated as TFT) system such as a liquid crystal viewfinder and a liquid crystal projector. And a system for displaying a wafer map of a liquid crystal display panel.

[0002]

2. Description of the Related Art TF for small and medium liquid crystal display devices
Many T panels are made in one TFT wafer,
When they are put into the assembly process, they are separated into individual TFT panels. Each TFT panel is checked mainly in a 2PC measurement process, which is an electrical check process of the TFT panel for performing an open short test.
In this state, the quality of the liquid crystal display panel is unknown, and the panel characteristics can be understood only after the liquid crystal is injected and assembled, and an image test process is performed by an inspection device such as a DT tester.

[0003] Even if a defect is found in an image test process using an inspection device 10 such as a DT tester, the defective panel 11 is the TFT panel 13 at which position on which TFT wafer 12 as shown in FIG. I don't know. That is,
One wafer 12 in one lot (25 wafers) of the wafer process has an abnormality that is not detected by the inspection of the wafer process, and even if it becomes clear after assembling, it is already TFT.
The panels 11 are individually cut off, and it cannot be known that the abnormality was concentrated on the single wafer 12 unless there is a clear difference in the inspection in the wafer process. This makes it unclear whether the cause of the defect was in the wafer process or in the assembly process as the liquid crystal display panel, making it difficult to pursue the cause of the defect.

[0004]

SUMMARY OF THE INVENTION It is an object of the present invention to provide information for pursuing a history in a manufacturing process in order to easily find a cause of a defect caused by a wafer process of a liquid crystal display panel, and to assemble the information in an assembling process. The present invention provides a method and system for displaying a wafer map of a liquid crystal display panel, which can reduce the yield of defective products by quickly feeding back to a wafer process.

Another problem of the present invention is that it is possible to reduce the measurement items in the 2PC measurement process which cannot be reduced in order to grasp the quality of the wafer at the present time and which overlaps with the image test using the DT tester. An object of the present invention is to provide a method and a system for displaying a wafer map of a liquid crystal display panel.

[0006]

In order to solve the above-mentioned problems, a method of displaying a wafer map on a liquid crystal display panel according to the present invention uses information on a lot number, a wafer number, and a panel position when measuring a panel in a wafer process. The above information written on each panel and individually written into each panel at the time of input into the assembly process is read together with the characteristic inspection information of each panel at the time of inspection in the assembly process, and based on this information. The characteristics of the panel and the defect distribution are displayed on a wafer map, and the information written on each panel and the characteristic inspection information of each panel are displayed on the wafer map. By reproducing the original wafer state and displaying the characteristics and failure distribution of each panel on the wafer map, it is possible to discover the cause of failure due to the wafer process. It can be tied to the squid.

Further, in the liquid crystal display panel wafer map display system according to the present invention, the lot number, wafer number, and panel position information written in each panel at the time of panel measurement in the wafer process are individually separated. At the time of inspection in the assembling process of each panel, an inspection device that reads together with the characteristic inspection information of each panel, an external storage device that records each information read by the inspection device, and each information recorded in the external storage device are used. And a wafer map display device that reproduces the original wafer state and displays the characteristics and defect distribution of each of the panels on a wafer map. Since the original wafer state can be reproduced on the screen of the display device, and the characteristics and defect distribution of each panel can be displayed as a wafer map. It is possible to pursue the cause of failure caused from the map information in a wafer process.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIG.
This will be described with reference to FIG. FIG. 1 is a system configuration diagram of a wafer map display system of a liquid crystal display panel according to an embodiment of the present invention, FIG. 2 is a display diagram of a wafer map of a wafer map display device in the system, and FIG. It is a top view.

A TFT wafer 1 is manufactured as one lot (25 wafers) in a wafer process as shown in FIG. 1A, and when it is put into an assembly process, as shown in FIG. Are separated as individual TFT panels 2.
Each of the chips 3 of the TFT panel 2 has a 2PC
At the time of checking in the measurement step, information such as lot number: AAA, wafer number: 1, and panel position (xy) on the wafer: 5-2 are written as shown in FIG. .

[0010] These write information are electrically written from the signal terminal portion to the chip 3 of each TFT panel 2 during the 2PC measurement process. Each TFT panel 2 needs a memory function to hold these write information, and as shown in FIG.
Even if the FT panel 2 is cut off, each chip 3 stores information on the lot number, wafer number, and panel position.

Each of the TFT panels 2 is used when measuring the electrical and image characteristic data of each of the TFT panels 2 by an inspection device 4 such as a DT tester in an assembling process.
The information of the lot number, the wafer number, and the panel position of the panel 2 is read and recorded together. These information are read for each TFT panel 2 together with characteristic test information such as electric / image test characteristics and yield information from a signal terminal section of a test device 4 such as a DT tester for performing an image test. (C) is recorded in the external storage device 5.

The original wafer state is reproduced by the wafer map display device 6 from the information on the lot number, wafer number, panel position, and characteristic inspection of each TFT panel 2 recorded in the external storage device 5. By displaying the distribution of non-defective panels and defective panels and the distribution of electrical and image characteristics on the wafer map as shown in FIG. 1D, the cause of the defect caused by the wafer process can be easily determined from this map. Can be estimated.

For example, when a display as shown in FIG. 2 is displayed on the screen of the wafer map display device 6, the cause of the failure of the TFT panel 2 is caused by the wafer transfer handler 7 having a shape as shown in FIG. It can be presumed that it is the cause.
As described above, since the original wafer state is reproduced from the information of the individual TFT panels 2 and the cause of the defect caused by the wafer process can be easily found, the cause of the defect can be quickly eliminated by feeding back the defect. . Therefore, the cause of defective product generation in the wafer process can be quickly eliminated, the yield rate of defective product generation can be reduced, and the manufacturing efficiency of the TFT panel 2 can be improved.

Further, as described above, the history in the manufacturing process of each TFT panel 2 is pursued, and a wafer map of each TFT panel 2 is displayed on a screen based on the information, thereby obtaining the TFT panel. Since it is easy to determine the cause of defective products on the panel 2, the measurement items in the 2PC measurement process, which could not be reduced to determine the quality of the wafer at the moment and overlapped with the image test using the DT tester, have been greatly increased. This makes it possible to reduce the number of products, which can lead to simplification of the manufacturing process.

[0015]

As described above, according to the method and system for displaying a wafer map of a liquid crystal display panel according to the present invention, it is possible to reproduce a wafer state from individual panel information and display it as a wafer map on a screen. Therefore, it is easy to find the cause of the panel failure caused by the wafer process, and it is possible to quickly feed it back from the assembly process to the wafer process.

Therefore, the cause of the defect in the wafer process can be quickly eliminated, the yield rate of defective products can be reduced, and the manufacturing efficiency can be improved. In addition, the measurement items in the 2PC measurement process that overlap with the image test using the DT tester can be significantly reduced, thereby simplifying the wafer manufacturing process.

[Brief description of the drawings]

FIG. 1 is a system configuration diagram of a wafer map display system for a liquid crystal display panel according to an embodiment of the present invention.

FIG. 2 is a display diagram of a wafer map display device in the liquid crystal display panel wafer map display system according to the embodiment of the present invention.

FIG. 3 is a plan view of a wafer transfer handler in a wafer process.

FIG. 4 is a conceptual diagram of a conventional wafer process and an inspection process.

[Explanation of symbols]

Reference Signs List 1 TFT wafer 2 TFT panel 4 Inspection device 5 External storage device 6 Wafer map display device

Claims (2)

[Claims] 1. A lot number, a wafer number, and information on a panel position are written in each panel at the time of panel measurement in a wafer process, and are written into each panel separated into individual panels at the time of input into an assembly process. The above information is read together with the characteristic inspection information of each panel at the time of inspection in the assembling process, and the original wafer state is reproduced based on these information,
A method of displaying a wafer map on a liquid crystal display panel, wherein the characteristics and the defect distribution of the panel are displayed on a wafer map. 2. The information of a lot number, a wafer number, and a panel position written in each panel at the time of panel measurement in a wafer process is used to inspect the characteristics of each panel in an assembling process of each of the individually separated panels. An inspection device that reads together with the inspection information, an external storage device that records each information read by the inspection device, and reproduces the original wafer state based on each information recorded in the external storage device, and obtains the characteristics of each panel. And a wafer map display device for displaying a defect distribution on a wafer map.