JPH10284517A - Method for producing semiconductor device - Google Patents

Method for producing semiconductor device

Info

Publication number
JPH10284517A
JPH10284517A JP9102397A JP10239797A JPH10284517A JP H10284517 A JPH10284517 A JP H10284517A JP 9102397 A JP9102397 A JP 9102397A JP 10239797 A JP10239797 A JP 10239797A JP H10284517 A JPH10284517 A JP H10284517A
Authority
JP
Japan
Prior art keywords
thermosetting adhesive
lead frame
adhesive
heat sink
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9102397A
Other languages
Japanese (ja)
Inventor
Takeshi Hashimoto
武司 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tomoegawa Co Ltd
Original Assignee
Tomoegawa Paper Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tomoegawa Paper Co Ltd filed Critical Tomoegawa Paper Co Ltd
Priority to JP9102397A priority Critical patent/JPH10284517A/en
Publication of JPH10284517A publication Critical patent/JPH10284517A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Landscapes

  • Adhesives Or Adhesive Processes (AREA)
  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Adhesive Tapes (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a producing method useful for the simplification and cost reduction of production process for a semiconductor device while enabling the production of resin sealed semiconductor device which uses a lead frame with a heat sink, through one hardening process. SOLUTION: The producing method is composed of a process for temporarily adhere a heat sink 2 and the lead frame through a 1st thermosetting adhesive agent 6 (1) and a process for mounting a semiconductor chip 1 through a 2nd thermosetting adhesive agent 7 onto one side of heat sink 2 (2) and within the range in which the minimum value in the dynamic elastic modulus of the 1st thermosetting adhesive agent 6 after setting is from 150 to 250 deg.C, the setting treatment of 1st thermosetting adhesive agent 6 and 2nd thermosetting adhesive agent 7 is simultaneously executed so as to be higher than 10 MPa and lower than 10 GPa (3).

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、放熱板とリードフレー
ムが熱硬化性接着剤を介して接着された構造を有し、か
つ放熱板上またはリードフレーム上に、熱硬化性接着剤
を介して半導体チップをマウントする半導体装置におい
て、放熱板とリードフレームを接着する接着剤と放熱板
またはリードフレームと半導体チップとを接着する接着
剤の硬化処理を同時工程で行うことを特徴とする半導体
装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention has a structure in which a heat sink and a lead frame are bonded via a thermosetting adhesive, and the heat sink and the lead frame are provided on the heat sink or the lead frame via a thermosetting adhesive. A semiconductor device for mounting a semiconductor chip by performing a simultaneous process of curing the adhesive for bonding the heat sink and the lead frame and the adhesive for bonding the heat sink or the lead frame and the semiconductor chip in a simultaneous process. And a method for producing the same.

【0002】[0002]

【従来の技術】近年、素子の高密度化、高速化に伴っ
て、放熱性を高めた放熱板付きリードフレームを使用し
た樹脂封止型半導体装置が使用されている。この樹脂封
止型半導体装置、特に放熱板とリードフレームが熱硬化
性接着剤を介して接着された構造を有し、かつ放熱板上
(またはリードフレーム上)に熱硬化性接着剤を介して
半導体チップをマウントする構造の半導体装置は以下の
工程により製造されている。 リードフレーム及び放熱板を製造する。 熱硬化性接着剤層を有する両面接着テープを打ち抜
く。 放熱板、打ち抜いた両面接着テープ及びリードフレー
ムを積層し熱圧着により仮接着する。 両面接着テープの熱硬化性接着剤層を硬化させる。 放熱板部分にダイアタッチ剤を積層する。 放熱板部分にダイアタッチ剤を介して半導体チップを
マウントする。 ダイアタッチ剤を硬化させる。 半導体チップとリードフレームを金線で接合する。 モールド樹脂で封止後、リードフレームをフォーミン
グする。 リードフレームと放熱板を貼り合わせる接着剤の硬化工
程とICチップを放熱板上に接着するダイアタッチ剤の
硬化工程における接着剤の硬化速度が異なるため、これ
を1回の同時工程で硬化しようとすると硬化速度の遅い
第1の接着剤が十分に硬化できない。そのため、動的粘
弾性が不足し、ワイヤーボンディング工程でボンディン
グ不良の問題が発生する。そのため第1の接着剤を十分
に硬化させる必要があり、第1の接着剤に適した硬化条
件での硬化工程が行われる。その結果、2回の硬化工程
を必要とし、生産設備、時間および生産コスト面で問題
となっている。
2. Description of the Related Art In recent years, resin-encapsulated semiconductor devices using a heat-dissipating lead frame with improved heat dissipation have been used as the density and speed of elements have increased. This resin-encapsulated semiconductor device, in particular, has a structure in which a heat radiating plate and a lead frame are bonded via a thermosetting adhesive, and is provided on the heat radiating plate (or on the lead frame) via the thermosetting adhesive A semiconductor device having a structure for mounting a semiconductor chip is manufactured by the following steps. Manufacture lead frames and heat sinks. A double-sided adhesive tape having a thermosetting adhesive layer is punched. A heat sink, a punched double-sided adhesive tape and a lead frame are laminated and temporarily bonded by thermocompression bonding. The thermosetting adhesive layer of the double-sided adhesive tape is cured. The die attach agent is laminated on the heat sink. The semiconductor chip is mounted on the heat sink via a die attach agent. Cure the die attach agent. The semiconductor chip and the lead frame are joined by a gold wire. After sealing with a mold resin, the lead frame is formed. Since the curing speed of the adhesive in the curing process of the adhesive for bonding the lead frame and the heat radiator and the curing process of the die attach agent for bonding the IC chip on the heat radiator are different, it is necessary to cure them in one simultaneous process. Then, the first adhesive having a low curing speed cannot be sufficiently cured. Therefore, the dynamic viscoelasticity is insufficient, and the problem of poor bonding occurs in the wire bonding process. Therefore, it is necessary to sufficiently cure the first adhesive, and a curing step is performed under curing conditions suitable for the first adhesive. As a result, two curing steps are required, which is a problem in production equipment, time, and production cost.

【0003】[0003]

【発明が解決しようとする課題】本発明者は、従来技術
における上記問題点に鑑みてなされたものである。本発
明は、放熱板とリードフレームが熱硬化性接着剤を介し
て接着された構造を有し、かつ放熱板上またはリードフ
レーム上に熱硬化性接着剤を介して半導体チップをマウ
ントする半導体装置において、放熱板とリードフレーム
を接着する第1の接着剤と放熱板またはリードフレーム
と半導体チップとを接着する第2の接着剤の硬化処理を
同時工程で行うことを特徴とする半導体装置の製造方法
である。
SUMMARY OF THE INVENTION The present inventor has made in view of the above problems in the prior art. The present invention relates to a semiconductor device having a structure in which a heat sink and a lead frame are bonded via a thermosetting adhesive, and mounting a semiconductor chip on the heat sink or the lead frame via a thermosetting adhesive. Manufacturing of a semiconductor device, wherein a curing process of a first adhesive for bonding a heat sink and a lead frame and a second adhesive for bonding a heat sink or a lead frame and a semiconductor chip are performed in a simultaneous step. Is the way.

【0004】[0004]

【課題を解決するための手段】本発明の第1の製造方法
は、(1)放熱板とリードフレームとを第1の熱硬化性
接着剤を介して仮接着する工程、(2)放熱板の一面に
第2の熱硬化性接着剤を介して半導体チップをマウント
する工程、(3)硬化後の該第1の熱硬化性接着剤の動
的弾性率の最小値が150℃〜250℃の範囲において
10MPa以上10GPa未満となるように、第1の熱
硬化性接着剤と第2の熱硬化性接着剤の硬化処理を同時
に行うことを特徴とする半導体装置の製造方法である。
本発明の第2の製造方法は、(1)放熱板とリードフレ
ームとを第1の熱硬化性接着剤を介して仮接着する工
程、(2)リードフレーム上に第2の熱硬化性接着剤を
介して半導体チップをマウントする工程、(3)硬化後
の該第1の熱硬化性接着剤の動的弾性率の最小値が15
0℃〜250℃の範囲において10MPa以上10GP
a未満となるように、第1の熱硬化性接着剤と第2の熱
硬化性接着剤の硬化処理を同時に行うことを特徴とする
半導体装置の製造方法である。
According to a first manufacturing method of the present invention, (1) a step of temporarily bonding a heat sink and a lead frame via a first thermosetting adhesive, and (2) a heat sink. Mounting a semiconductor chip on one side of the first thermosetting adhesive via a second thermosetting adhesive, (3) the minimum value of the dynamic elastic modulus of the first thermosetting adhesive after curing is 150 ° C. to 250 ° C. A curing process for the first thermosetting adhesive and the second thermosetting adhesive at the same time so that the pressure is 10 MPa or more and less than 10 GPa.
According to a second manufacturing method of the present invention, there are provided (1) a step of temporarily bonding a heat sink and a lead frame via a first thermosetting adhesive, and (2) a second thermosetting bonding on the lead frame. Mounting the semiconductor chip via an agent, (3) the minimum value of the dynamic elastic modulus of the first thermosetting adhesive after curing is 15
10 MPa or more and 10 GP in the range of 0 ° C. to 250 ° C.
A method for manufacturing a semiconductor device, comprising simultaneously performing a curing treatment of a first thermosetting adhesive and a second thermosetting adhesive so as to be less than a.

【0005】以下、本発明について詳細に説明する。図
1は本発明を適用する半導体装置の他の一例の断面図で
ある。放熱板2とリードフレーム3が第1の熱硬化性接
着剤6を介して接着された構造を有し、かつ放熱板2上
に第2の熱硬化性接着剤7を介して半導体チップ1をマ
ウントする構造のもので、半導体チップ1はボンディン
グワイヤー4でリードピン3と連結され、封止用樹脂5
で封止された半導体装置である。図2は本発明を適用す
る半導体装置の一例の断面図である。放熱板2とリード
フレーム3が第1の熱硬化性接着剤6を介して接着され
た構造を有し、かつリードフレーム3上に第2の熱硬化
性接着剤7を介して半導体チップ1をマウントする構造
のもので、半導体チップ1はボンディングワイヤー4で
リードピン3と連結され、封止用樹脂5で封止された半
導体装置である。本発明に使用する第1の接着剤は、放
熱板とリードフレームを接着する熱硬化性接着剤であ
り、エポキシ系、フェノール系、ポリアミド系、マレイ
ミド系およびそれらの混合物からなる。該接着剤には必
要に応じて、弾性成分であるNBR等エラストマーを添
加できる。該接着剤は、低温、短時間での硬化後の動的
弾性率を前記数値限定範囲内に制御するために硬化促進
剤を使用した。また、第2の接着剤は、放熱板またはリ
ードフレームと半導体チップとを接着する熱硬化性接着
剤であり、銀ペーストが一般的であるが、それ以外に上
記組成のものが使用できる。リードフレームと放熱板と
を接着する第1の熱硬化性接着剤は、耐熱性フィルムの
両面に熱硬化性接着剤を積層した構造の両面接着テー
プ、熱硬化性接着剤単層からなる接着テープ、熱硬化性
接着剤が放熱板の片面に印刷またはディスペンスにより
形成された接着剤付放熱板が好ましく、これらの中から
適宜選択される。
Hereinafter, the present invention will be described in detail. FIG. 1 is a sectional view of another example of a semiconductor device to which the present invention is applied. The heat sink 2 has a structure in which the lead frame 3 is bonded to the lead frame 3 via a first thermosetting adhesive 6, and the semiconductor chip 1 is placed on the heat sink 2 via a second thermosetting adhesive 7. The semiconductor chip 1 is connected to a lead pin 3 by a bonding wire 4 and a sealing resin 5 is mounted.
This is a semiconductor device sealed with. FIG. 2 is a sectional view of an example of a semiconductor device to which the present invention is applied. The heat sink 2 and the lead frame 3 have a structure in which the semiconductor chip 1 is bonded via a first thermosetting adhesive 6 and the semiconductor chip 1 is mounted on the lead frame 3 via a second thermosetting adhesive 7. The semiconductor device has a mounting structure, in which a semiconductor chip 1 is connected to a lead pin 3 by a bonding wire 4 and is sealed with a sealing resin 5. The first adhesive used in the present invention is a thermosetting adhesive for bonding a heat sink and a lead frame, and is made of epoxy, phenol, polyamide, maleimide, and a mixture thereof. If necessary, an elastomer such as NBR, which is an elastic component, can be added to the adhesive. As the adhesive, a curing accelerator was used in order to control the dynamic elastic modulus after curing at a low temperature for a short time within the above-mentioned numerical limited range. The second adhesive is a thermosetting adhesive for bonding the heat sink or the lead frame to the semiconductor chip, and is generally a silver paste, but may have the above composition. The first thermosetting adhesive for bonding the lead frame and the heat sink is a double-sided adhesive tape having a structure in which a thermosetting adhesive is laminated on both sides of a heat-resistant film, and an adhesive tape comprising a single layer of the thermosetting adhesive. A heat-radiating plate with an adhesive in which a thermosetting adhesive is formed on one surface of the heat-radiating plate by printing or dispensing is preferable, and is appropriately selected from these.

【0006】本発明は放熱板とリードフレームを接着す
る第1の熱硬化性接着剤と放熱板上またはリードフレー
ム上に半導体チップを接着する第2の接着剤を、好まし
くは150℃〜200℃で数十分〜2時間または250
℃〜300℃で15秒〜数分で十分な強度に同時に硬化
させ、第1および第2の熱硬化性接着剤の硬化処理を同
時工程で行うことを可能にし、従来行っていたリードフ
レームと放熱板を接着する熱硬化性接着剤の硬化処理工
程を省略することを可能にするものである。すなわち、
硬化に際しては第1の接着剤の硬化後の動的弾性率の最
小値が150℃〜250℃の範囲において、10MPa
以上10GPa未満になる接着剤を使用することが要求
される。図1に示す半導体装置の製造に適用する本発明
の第1の製造方法による製造工程の一例は以下のように
なる。 リードフレームおよび放熱板を製造する。 第1の熱硬化性接着剤を有する両面接着テープを枠状
に打ち抜く。 放熱板、打ち抜いた両面接着テープおよびリードフレ
ームを積層し熱圧着により仮接着する。 放熱板の一面に、第2の熱硬化性接着剤としてのダイ
アタッチ剤を積層する。 放熱板部分にダイアタッチ剤を介して半導体チップを
マウントする。 前記第1および第2の熱硬化性接着剤を硬化させる。 半導体チップとリードフレームを金線で接合する。 モールド樹脂で封止後、リードフレームをフォーミン
グする。 次に、図2に示す半導体装置の製造に適用する本発明の
第2の製造方法による製造工程の一例は以下のようにな
る。 リードフレームおよび放熱板を製造する。 第1の熱硬化性接着剤を有する両面接着テープを枠状
に打ち抜く。 放熱板、打ち抜いた両面接着テープおよびリードフレ
ームを積層し熱圧着により仮接着する。 リードフレーム上に、第2の熱硬化性接着剤としての
ダイアタッチ剤を積層する。 リードフレーム上にダイアタッチ剤を介して半導体チ
ップをマウントする。 前記第1および第2の熱硬化性接着剤を硬化させる。 半導体チップとリードフレームを金線で接合する。 モールド樹脂で封止後、リードフレームをフォーミン
グする。 なお、本発明の製造方法に適用される硬化処理工程に
は、熱風循環型乾燥機、インライン硬化装置等の乾燥機
が好適に使用される。
According to the present invention, a first thermosetting adhesive for adhering a heat sink and a lead frame and a second adhesive for adhering a semiconductor chip on a heat sink or a lead frame are preferably used at 150 ° C. to 200 ° C. Tens of minutes to 2 hours or 250
15 seconds to a few minutes at the same time at a temperature of 300 ° C. to 300 ° C. to allow simultaneous curing of the first and second thermosetting adhesives. This makes it possible to omit the step of curing the thermosetting adhesive for bonding the heat sink. That is,
At the time of curing, the minimum value of the dynamic elastic modulus after curing of the first adhesive is 10 MPa in a range of 150 ° C. to 250 ° C.
It is required to use an adhesive which is less than 10 GPa. One example of the manufacturing process according to the first manufacturing method of the present invention applied to the manufacturing of the semiconductor device shown in FIG. 1 is as follows. Manufacture lead frames and heat sinks. A double-sided adhesive tape having a first thermosetting adhesive is punched into a frame shape. A heat sink, a punched double-sided adhesive tape and a lead frame are laminated and temporarily bonded by thermocompression bonding. A die attach agent as a second thermosetting adhesive is laminated on one surface of the heat sink. The semiconductor chip is mounted on the heat sink via a die attach agent. The first and second thermosetting adhesives are cured. The semiconductor chip and the lead frame are joined by a gold wire. After sealing with a mold resin, the lead frame is formed. Next, an example of the manufacturing process according to the second manufacturing method of the present invention applied to the manufacturing of the semiconductor device shown in FIG. 2 is as follows. Manufacture lead frames and heat sinks. A double-sided adhesive tape having a first thermosetting adhesive is punched into a frame shape. A heat sink, a punched double-sided adhesive tape and a lead frame are laminated and temporarily bonded by thermocompression bonding. A die attach agent as a second thermosetting adhesive is laminated on the lead frame. A semiconductor chip is mounted on a lead frame via a die attach agent. The first and second thermosetting adhesives are cured. The semiconductor chip and the lead frame are joined by a gold wire. After sealing with a mold resin, the lead frame is formed. In the curing treatment step applied to the production method of the present invention, a dryer such as a hot-air circulation dryer or an in-line curing device is preferably used.

【0007】前記第1の熱硬化性接着剤の硬化後の動的
弾性率の最小値は150℃〜250℃の範囲において1
0MPa以上10GPa未満である。好ましくは10M
Pa以上1GPa未満である。10MPa以下の場合に
はワイアーボンディング不良がを起き易い。10GPa
以上ではパッケージクラックが起き易い。動的弾性率
は、オリエンテック社製 レオバイブロン DDV−II
を用い、振動周波数110Hz、昇温速度3℃/mi
n.の条件で測定した。
[0007] The minimum value of the dynamic elastic modulus of the first thermosetting adhesive after curing is 1 in the range of 150 ° C to 250 ° C.
0 MPa or more and less than 10 GPa. Preferably 10M
Pa or more and less than 1 GPa. If the pressure is 10 MPa or less, wire bonding failure tends to occur. 10 GPa
Above, package cracks are likely to occur. The dynamic elastic modulus is Orientec's Leo Vibron DDV-II
With a vibration frequency of 110 Hz and a heating rate of 3 ° C./mi
n. It measured on condition of.

【0008】以下、本発明を実施例に基づいてより詳細
に説明する。
Hereinafter, the present invention will be described in more detail based on embodiments.

【実施例】【Example】

実施例1 熱硬化性接着剤を耐熱性フィルムの両面に積層した両面
接着テープ(巴川製紙所社製 エレファンCAT UH
2W)を外形寸法20mm×20mm、内側10mm×
10mm、枠幅5mmの寸法で窓枠状に打ち抜いた。2
08ピンリードフレーム、窓枠状両面接着テープ、20
mm×20mm厚さ0.15mm厚の銅製放熱板の順に
積層し、160℃で5秒の条件で仮圧着した。前記放熱
板中央のテープがない部分に銀ペーストをディスペンス
した後、半導体チップを、120℃で0.5秒の条件で
仮接着した。上記工程で製造した半導体装置を、熱風循
環型乾燥機中で、200℃で1時間、両面テープおよび
銀ペーストを同時に硬化させ、半導体チップを実装した
本発明の製造方法による放熱板付きリードフレームを得
た。両面テープの接着剤の最小動的弾性率は200℃で
200MPaであった。
Example 1 A double-sided adhesive tape in which a thermosetting adhesive was laminated on both sides of a heat-resistant film (Elephan CAT UH manufactured by Tomoe Seisakusho Co., Ltd.)
2W) with external dimensions 20mm x 20mm, inner 10mm x
Punched into a window frame with dimensions of 10 mm and frame width of 5 mm. 2
08 pin lead frame, window frame-shaped double-sided adhesive tape, 20
A copper heat radiating plate having a size of 20 mm × 20 mm and a thickness of 0.15 mm was laminated in this order, and temporarily pressed at 160 ° C. for 5 seconds. After dispensing a silver paste at the center of the heat sink where no tape was present, the semiconductor chip was temporarily bonded at 120 ° C. for 0.5 second. The semiconductor device manufactured in the above process is cured in a hot air circulating dryer at 200 ° C. for 1 hour, and the double-sided tape and the silver paste are simultaneously cured, and a lead frame with a heat sink according to the manufacturing method of the present invention in which a semiconductor chip is mounted is provided. Obtained. The minimum dynamic elastic modulus of the adhesive of the double-sided tape was 200 MPa at 200 ° C.

【0009】実施例2 実施例1で使用した両面接着テープの接着剤と銀ペース
トの熱風循環型乾燥機中での硬化条件を200℃で1時
間から275℃で30秒に変更した以外は、実施例1と
同様にして半導体チップを実装した本発明の放熱板付き
リードフレームを得た。両面テープの接着剤の最小動的
弾性率は200℃で200MPaであった。
Example 2 Except that the conditions for curing the adhesive of the double-sided adhesive tape and the silver paste used in Example 1 in a hot-air circulation dryer were changed from 200 ° C. for 1 hour to 275 ° C. for 30 seconds. In the same manner as in Example 1, a lead frame with a heat sink of the present invention on which a semiconductor chip was mounted was obtained. The minimum dynamic elastic modulus of the adhesive of the double-sided tape was 200 MPa at 200 ° C.

【0010】実施例3 実施例1で使用した両面接着テープを単層熱硬化性接着
剤フィルム(巴川製紙所社製 HG−5200)に代え
た以外は、実施例1と同様にして半導体チップを実装し
た本発明の製造方法による放熱板付きリードフレームを
得た。単層接着剤フィルムの最小動的弾性率は200℃
で200MPaであった。
Example 3 A semiconductor chip was prepared in the same manner as in Example 1 except that the double-sided adhesive tape used in Example 1 was replaced with a single-layer thermosetting adhesive film (HG-5200, manufactured by Tomagawa Seisakusho). A mounted lead frame with a radiator plate according to the manufacturing method of the present invention was obtained. Minimum dynamic modulus of single-layer adhesive film is 200 ° C
Was 200 MPa.

【0011】実施例4 実施例1で使用した両面接着テープの代わりに巴川製紙
所社製のHG−5200接着剤を、実施例1で使用した
放熱板上に前記両面テープの形状にスクリーン印刷し
た。208ピンリードフレームと該放熱板の接着剤面を
対向させて、160℃で5秒の条件で仮圧着した。前記
放熱板中央の接着剤がない部分に銀ペーストをディスペ
ンスした後、半導体チップを、120℃で0.5秒の条
件で仮接着した。上記工程で製造した半導体装置を、熱
風循環型乾燥機中で、200℃で1時間、両面テープお
よび銀ペーストを同時に硬化させ、半導体チップを実装
した本発明の製造方法による放熱板付きリードフレーム
を得た。両面テープの接着剤の最小動的弾性率は200
℃で200MPaであった。
Example 4 Instead of the double-sided adhesive tape used in Example 1, an HG-5200 adhesive manufactured by Tomagawa Paper Works was screen-printed on the heat sink used in Example 1 in the shape of the double-sided tape. . The 208-pin lead frame and the adhesive surface of the heat radiating plate faced each other, and were temporarily compressed at 160 ° C. for 5 seconds. After the silver paste was dispensed on the center of the heat sink where no adhesive was provided, the semiconductor chip was temporarily bonded at 120 ° C. for 0.5 second. The semiconductor device manufactured in the above process is cured in a hot air circulating dryer at 200 ° C. for 1 hour, and the double-sided tape and the silver paste are simultaneously cured, and a lead frame with a heat sink according to the manufacturing method of the present invention, in which a semiconductor chip is mounted, is obtained. Obtained. The minimum dynamic modulus of the double-sided tape adhesive is 200
It was 200 MPa at ℃.

【0012】実施例5 実施例1の熱風循環型乾燥機中での硬化条件を、200
℃で1時間から200℃15分に変更した以外は、実施
例1と同様にして半導体チップを実装した本発明の製造
方法による放熱板付きリードフレームを得た。単層接着
剤フィルムの最小動的弾性率は200℃で40MPaで
あった。
Example 5 The curing conditions in the hot air circulation type dryer of Example 1 were set to 200
Except that the temperature was changed from 1 hour at 200 ° C. to 15 minutes at 200 ° C., a lead frame with a heat radiating plate according to the manufacturing method of the present invention, in which a semiconductor chip was mounted, was obtained in the same manner as in Example 1. The minimum dynamic elastic modulus of the single-layer adhesive film was 40 MPa at 200 ° C.

【0013】実施例6 実施例1の熱風循環型乾燥機中での硬化条件を、200
℃で1時間から280℃30分に変更した以外は、実施
例1と同様にして半導体チップを実装した本発明の製造
方法による放熱板付きリードフレームを得た。単層接着
剤フィルムの最小動的弾性率は200℃で600MPa
であった。
Example 6 The curing conditions in the hot air circulation type dryer of Example 1 were set to 200
Except that the temperature was changed from 1 hour at 280 ° C. to 30 minutes at 280 ° C., a lead frame with a heat radiating plate according to the manufacturing method of the present invention having a semiconductor chip mounted thereon was obtained in the same manner as in Example 1. The minimum dynamic elastic modulus of the single-layer adhesive film is 600 MPa at 200 ° C.
Met.

【0014】比較例1 実施例1で使用した両面接着テープの代わりに下記組成
の接着剤からなる両面テープを使用した以外は、実施例
1と同様にして半導体チップを実装した放熱板付きリー
ドフレームを得た。両面テープの接着剤の最小動的弾性
率は200℃で2MPaであった。 ・ポリアミド樹脂(富士化成工業社製トーマイドTXCー232−C) 25部 ・エポキシ樹脂(油化シェル社製 エピコート828) 8部 ・ノボラック型フェノール(荒川化学社製 タマノル752) 2.5部 ・2−エチルイミダゾール 0.1部
Comparative Example 1 A lead frame with a heat sink mounted with a semiconductor chip in the same manner as in Example 1 except that a double-sided tape made of an adhesive having the following composition was used instead of the double-sided adhesive tape used in Example 1. I got The minimum dynamic elastic modulus of the adhesive of the double-sided tape was 2 MPa at 200 ° C. -Polyamide resin (Tomide TXC-232-C, manufactured by Fuji Kasei Kogyo Co., Ltd.) 25 parts-Epoxy resin (Epicoat 828, manufactured by Yuka Shell Co., Ltd.) 8 parts-Novolac type phenol (Tamanol 752, manufactured by Arakawa Chemical Co., Ltd.) 2.5 parts-2 parts -Ethyl imidazole 0.1 part

【0015】上記実施例1〜6、比較例1で製造した半
導体チップを実装したリードフレームのワイアーボンデ
ィングテストを行った。その結果、実施例1〜6を実装
したリードフレームは半導体チップ側、リードフレーム
側共にワイアーボンディングすることができた。比較例
1はリードフレーム側でワイアーボンディング不良が発
生した。
A wire bonding test was performed on a lead frame on which the semiconductor chips manufactured in Examples 1 to 6 and Comparative Example 1 were mounted. As a result, the lead frames on which Examples 1 to 6 were mounted could be wire-bonded on both the semiconductor chip side and the lead frame side. In Comparative Example 1, wire bonding failure occurred on the lead frame side.

【発明の効果】本発明の製造方法は、放熱板付きリード
フレームを使用した樹脂封止型半導体装置を1回の硬化
工程で製造することが可能で、半導体装置の製造工程の
簡略化、コストダウンに有用である。
According to the manufacturing method of the present invention, a resin-encapsulated semiconductor device using a lead frame with a heat radiating plate can be manufactured in one curing step, and the manufacturing process of the semiconductor device is simplified and cost is reduced. Useful for down.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明を適用する半導体装置の一例の断面図で
ある。
FIG. 1 is a cross-sectional view of an example of a semiconductor device to which the present invention is applied.

【図2】本発明を適用する半導体装置の一例の断面図で
ある。
FIG. 2 is a cross-sectional view of an example of a semiconductor device to which the present invention is applied.

【符号の簡単な説明】[Brief description of reference numerals]

1・・・半導体チップ、2・・・放熱板、3・・・リー
ドピン、4・・・ボンディングワイヤー、5・・・樹
脂、6・・・第1の接着剤、7・・・第2の接着剤
DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Heat sink, 3 ... Lead pin, 4 ... Bonding wire, 5 ... Resin, 6 ... First adhesive, 7 ... Second adhesive

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 FI H01L 23/29 H01L 23/50 F 23/50 23/36 A ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 6 Identification code FI H01L 23/29 H01L 23/50 F 23/50 23/36 A

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】(1)放熱板とリードフレームとを第1の
熱硬化性接着剤を介して仮接着する工程、(2)放熱板
の一面に第2の熱硬化性接着剤を介して半導体チップを
マウントする工程、(3)硬化後の該第1の熱硬化性接
着剤の動的弾性率の最小値が150℃〜250℃の範囲
において10MPa以上10GPa未満となるように、
第1の熱硬化性接着剤と第2の熱硬化性接着剤の硬化処
理を同時に行うことを特徴とする半導体装置の製造方
法。
(1) a step of temporarily bonding a heat sink and a lead frame to each other via a first thermosetting adhesive; and (2) a step of attaching one side of the heat sink to a second thermosetting adhesive. Mounting the semiconductor chip, (3) so that the minimum value of the dynamic elastic modulus of the first thermosetting adhesive after curing is 10 MPa or more and less than 10 GPa in the range of 150 ° C. to 250 ° C.
A method for manufacturing a semiconductor device, comprising simultaneously performing a curing treatment of a first thermosetting adhesive and a second thermosetting adhesive.
【請求項2】(1)放熱板とリードフレームとを第1の
熱硬化性接着剤を介して仮接着する工程、(2)リード
フレーム上に第2の熱硬化性接着剤を介して半導体チッ
プをマウントする工程、(3)硬化後の該第1の熱硬化
性接着剤の動的弾性率の最小値が150℃〜250℃の
範囲において10MPa以上10GPa未満となるよう
に、第1の熱硬化性接着剤と第2の熱硬化性接着剤の硬
化処理を同時に行うことを特徴とする半導体装置の製造
方法。
2. A step of (1) temporarily bonding a heat sink to a lead frame via a first thermosetting adhesive; and (2) a semiconductor on the lead frame via a second thermosetting adhesive. A step of mounting the chip, (3) the first thermosetting adhesive after curing so that the minimum value of the dynamic elastic modulus of the first thermosetting adhesive is 10 MPa or more and less than 10 GPa in the range of 150 ° C. to 250 ° C. A method for manufacturing a semiconductor device, comprising simultaneously performing a curing treatment of a thermosetting adhesive and a second thermosetting adhesive.
【請求項3】 前記第1の熱硬化性接着剤が、耐熱性フ
ィルムの両面に熱硬化性接着剤層を有する接着テープで
あることを特徴とする請求項1または2記載の半導体装
置の製造方法。
3. The semiconductor device according to claim 1, wherein the first thermosetting adhesive is an adhesive tape having a thermosetting adhesive layer on both surfaces of a heat-resistant film. Method.
【請求項4】 前記第1の熱硬化性接着剤が、単層の熱
硬化性接着剤からなる接着テープであることを特徴とす
る請求項1または2に記載の半導体装置の製造方法。
4. The method for manufacturing a semiconductor device according to claim 1, wherein the first thermosetting adhesive is an adhesive tape made of a single-layer thermosetting adhesive.
【請求項5】 前記第1の熱硬化性接着剤が、放熱板の
片面に印刷またはディスペンスにより積層されてなるこ
とを特徴とする請求項1または2に記載の半導体装置の
製造方法。
5. The method according to claim 1, wherein the first thermosetting adhesive is laminated on one surface of a heat sink by printing or dispensing.
JP9102397A 1997-04-07 1997-04-07 Method for producing semiconductor device Pending JPH10284517A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9102397A JPH10284517A (en) 1997-04-07 1997-04-07 Method for producing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9102397A JPH10284517A (en) 1997-04-07 1997-04-07 Method for producing semiconductor device

Publications (1)

Publication Number Publication Date
JPH10284517A true JPH10284517A (en) 1998-10-23

Family

ID=14326326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9102397A Pending JPH10284517A (en) 1997-04-07 1997-04-07 Method for producing semiconductor device

Country Status (1)

Country Link
JP (1) JPH10284517A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000068295A (en) * 1998-08-25 2000-03-03 Tomoegawa Paper Co Ltd Adhesive film for electronic component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000068295A (en) * 1998-08-25 2000-03-03 Tomoegawa Paper Co Ltd Adhesive film for electronic component

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