JPH10284471A - Dry etching device - Google Patents
Dry etching deviceInfo
- Publication number
- JPH10284471A JPH10284471A JP9057897A JP9057897A JPH10284471A JP H10284471 A JPH10284471 A JP H10284471A JP 9057897 A JP9057897 A JP 9057897A JP 9057897 A JP9057897 A JP 9057897A JP H10284471 A JPH10284471 A JP H10284471A
- Authority
- JP
- Japan
- Prior art keywords
- stage
- voltage
- wafer
- dry etching
- particles
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体基板をエッ
チングするドライエッチング装置に関し、特に、半導体
基板(以下ウェハと記す)をクーロン力で吸着保持する
静電吸着ステージを具備するドライエッチング装置に関
する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching apparatus for etching a semiconductor substrate, and more particularly to a dry etching apparatus having an electrostatic suction stage for holding a semiconductor substrate (hereinafter, referred to as a wafer) by coulomb force.
【0002】[0002]
【従来の技術】静電吸着ステージ(Electric
Static Chuck)は、ステージ本体の電極側
に電圧を印加しウェハを静電吸着させて保持させてい
る。この静電吸着ステージ(以下ESCステージと記
す)は通常のメカニカルクランプ方式のステージに比
べ、ウェハとステージ面の密着性が良いことから、ウェ
ハとステージ本体との伝熱効率が良くウェハの冷却効果
が高めることができる。このため、ウェハのエッチング
レートなどの面内均一性が向上するなどの利点があり、
多くの半導体基板処理装置に用いられている。2. Description of the Related Art An electrostatic suction stage (Electric)
In Static Chuck, a voltage is applied to the electrode side of the stage main body to hold the wafer by electrostatic attraction. This electrostatic chuck stage (hereinafter referred to as ESC stage) has better adhesion between the wafer and the stage surface than a normal mechanical clamp type stage, so the heat transfer efficiency between the wafer and the stage body is good and the wafer cooling effect is improved. Can be enhanced. For this reason, there is an advantage that in-plane uniformity such as an etching rate of a wafer is improved,
It is used in many semiconductor substrate processing apparatuses.
【0003】図3は従来のドライエッチング装置の一例
を示す模式断面図である。このドライエッチング装置
は、図3に示すように、真空チャンバ7の円板状の上部
電極5に対向して配置されるとともにウェハ8を載置す
る下部電極であるESCステージ3と、上部電極5とE
SCステージ3とに高周波電圧を印加する高周波電源6
と、ESCステージ3とアース間との間に直流電圧を印
加する直流電源4とを備えている。FIG. 3 is a schematic sectional view showing an example of a conventional dry etching apparatus. As shown in FIG. 3, this dry etching apparatus is disposed opposite to a disk-shaped upper electrode 5 of a vacuum chamber 7 and has an ESC stage 3 as a lower electrode on which a wafer 8 is placed, and an upper electrode 5 And E
High frequency power supply 6 for applying a high frequency voltage to SC stage 3
And a DC power supply 4 for applying a DC voltage between the ESC stage 3 and the ground.
【0004】このESCステージ3と対向する上部電極
4との間に高周波電源6により高周波電圧を印加し、真
空チャンバ7にエッチングガスを導入しプラズマを発生
させウェハ8にエッチングを施すようになっている。ま
た、このエッチングを施す際にESCステージ2側に直
流電源4により、例えば、−1000V程度の電圧を印
加してウェハ8とステージ面との間を静電吸着させエッ
チング中にウェハ8を保持させるしくみとなっている。A high frequency voltage is applied between the ESC stage 3 and the upper electrode 4 facing the same by a high frequency power supply 6, an etching gas is introduced into a vacuum chamber 7 to generate plasma, and the wafer 8 is etched. I have. Further, when performing this etching, a voltage of, for example, about -1000 V is applied to the ESC stage 2 side by the DC power supply 4 to electrostatically attract the wafer 8 and the stage surface to hold the wafer 8 during the etching. It is a mechanism.
【0005】[0005]
【発明が解決しようとする課題】上述した従来のドライ
エッチング装置では、高周波電圧の印加よりもステージ
電極への電圧の印加が早く、真空チャンバ内に浮遊する
帯電したパーティクルが、帯電したウェーハ表面に引き
寄せられ付着し、エッチングされたウェハの品質に重大
な欠陥をもたらすという問題があった。In the above-described conventional dry etching apparatus, the application of the voltage to the stage electrode is faster than the application of the high-frequency voltage, and the charged particles floating in the vacuum chamber adhere to the charged wafer surface. There has been the problem of being attracted and sticking, causing serious defects in the quality of the etched wafer.
【0006】また、ESCステージを用いない通常のメ
カニカルクランプ方式のステージを具備しパーティクル
を抑える手段をもつドライエッチング装置として、例え
ば、特開平4−370928号公報に開示されている。
この装置では、チャンバ内壁にフイルムヒータを貼付け
加温によって反応生成物を揮発し、チャンバ内壁の堆積
を防止している。さらに、チャンバ内で最も正電位に
し、イオンの流れをステージ電極に向けている。A dry etching apparatus having a stage of a normal mechanical clamp system without using an ESC stage and having means for suppressing particles is disclosed in, for example, Japanese Patent Application Laid-Open No. Hei 4-370929.
In this apparatus, a film heater is attached to the inner wall of the chamber, and the reaction product is volatilized by heating to prevent deposition on the inner wall of the chamber. Further, the flow of ions is directed to the stage electrode by making it the most positive potential in the chamber.
【0007】しかしながら、このドライエッチング装置
では、処理中におけるプラズマからのイオンのチャンバ
内壁への付着は防止できるものの、ウェハのエッチング
処理前に真空チャンバ内に浮遊する帯電するパーティク
ルがウェハ表面への付着は免れない。特に、処理前に電
圧が印加されたESCステージを使用する場合は、この
パーティクルの付着が助長される。[0007] However, in this dry etching apparatus, although ions from the plasma can be prevented from adhering to the inner wall of the chamber during the processing, charged particles floating in the vacuum chamber adhere to the wafer surface before the wafer is etched. Is inevitable. In particular, when an ESC stage to which a voltage is applied before processing is used, adhesion of the particles is promoted.
【0008】従って、本発明の目的は、ウェハを保持す
るのにESCステージを用いても、真空チャンバ内の帯
電したパーティクルがステージ電極側に引き寄せられる
のを防止し、ウェハにパーティクルを付着せずエッチン
グできるドライエッチング装置を提供することにある。Therefore, an object of the present invention is to prevent charged particles in a vacuum chamber from being attracted to a stage electrode side even when an ESC stage is used to hold a wafer, and to prevent particles from adhering to the wafer. An object of the present invention is to provide a dry etching apparatus capable of performing etching.
【0009】[0009]
【課題を解決するための手段】本発明の特徴は、真空チ
ャンバに収納される半導体基板を静電吸着力で保持し該
半導体基板を載置する静電吸着ステージを具備し前記静
電吸着ステージと該静電吸着ステージと対向する上部電
極との間に高周波電圧を印加させ前記半導体基板面をエ
ッチングするドライエッイング装置において、前記真空
チャンバの内壁と前記静電吸着ステージとの間にあって
前記静電吸着ステージを囲むように配置される円筒状の
電極板と、前記静電吸着ステージに印加される電圧より
も絶対値が大きい電圧を前記電極板に印加し所定時間を
経過後に前記電極板に印加する前記電圧を断にするとと
もに前記高周波電圧を印加させるシーケンス制御部を備
えるドライエッチング装置である。また、前記電極板が
複数に等分割されていることが望ましい。A feature of the present invention is to provide an electrostatic attraction stage for holding a semiconductor substrate housed in a vacuum chamber with an electrostatic attraction force and mounting the semiconductor substrate thereon. A high frequency voltage is applied between the electrostatic chuck stage and the upper electrode facing the electrostatic chuck stage to etch the surface of the semiconductor substrate, wherein the static electricity is provided between the inner wall of the vacuum chamber and the electrostatic chuck stage. A cylindrical electrode plate disposed so as to surround the electroadsorption stage, and a voltage having an absolute value larger than the voltage applied to the electrostatic adsorption stage is applied to the electrode plate, and after a predetermined time elapses, the electrode plate is applied to the electrode plate. The dry etching apparatus includes a sequence control unit that cuts off the applied voltage and applies the high-frequency voltage. Preferably, the electrode plate is equally divided into a plurality.
【0010】[0010]
【発明の実施の形態】次に本発明について図面を参照し
て説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
【0011】図1(a)および(b)は本発明の一実施
の形態におけるドライエッチング装置を説明するための
装置の構成を示す模式断面図および電極板の上面図であ
る。このドライエッチング装置は、図1に示すように、
真空チャンバ7の内壁とESCステージ3との間にあっ
てESCステージ3を囲むように配置される円筒状の電
極板1と、こ電極板1に負電位を印加する直流電源4a
と、この直流電源およびESCステージに負電位を与え
る直流電源4と高周波電源6の印加および断のタイミン
グを制御するシーケンス制御部2を設けたことである。
それ以外は従来例と同じである。FIGS. 1 (a) and 1 (b) are a schematic cross-sectional view and a top view of an electrode plate for illustrating a dry etching apparatus according to an embodiment of the present invention. This dry etching apparatus, as shown in FIG.
A cylindrical electrode plate 1 disposed between the inner wall of the vacuum chamber 7 and the ESC stage 3 so as to surround the ESC stage 3, and a DC power supply 4a for applying a negative potential to the electrode plate 1;
And a sequence controller 2 for controlling the timing of application and cutoff of the DC power supply 4 for applying a negative potential to the DC power supply and the ESC stage and the high-frequency power supply 6.
Otherwise, it is the same as the conventional example.
【0012】また、このドライエッチング装置によりウ
ェハ8にエッチングを施す際に、ESCステージ3の電
極側に直流電源4により、例えば−1000V程度の負
電圧を印加してウェハ8とESCステージ3との間を静
電吸着させエッチング中にウェハ8を保持させるしくみ
となっている。一方、真空チャンバ7の内側に導電性の
電極板1を設置する。この電極板1の材質は導電性であ
れば良いが、メンテナンスや交換のために取扱い易くす
るために電極板1は複数に等分に分割され、かつ軽量な
アルミニウムが望ましい。この電極板1には直流電源4
aによりESCステージ3の電圧より絶対値が大きい負
電圧を印加させる。例えば、ESC電圧が−1000V
ならば電極板1には−1100V程度の電圧を印加して
やれば良い。When the wafer 8 is etched by the dry etching apparatus, a negative voltage of, for example, about -1000 V is applied to the electrode side of the ESC stage 3 by the DC power supply 4 so that the wafer 8 and the ESC stage 3 are connected to each other. The gap is electrostatically attracted to hold the wafer 8 during etching. On the other hand, the conductive electrode plate 1 is installed inside the vacuum chamber 7. The material of the electrode plate 1 may be any material as long as it is conductive. However, in order to facilitate handling for maintenance and replacement, the electrode plate 1 is preferably divided into a plurality of equal parts and lightweight aluminum. This electrode plate 1 has a DC power supply 4
By a, a negative voltage having an absolute value larger than the voltage of the ESC stage 3 is applied. For example, if the ESC voltage is -1000V
Then, a voltage of about -1100 V may be applied to the electrode plate 1.
【0013】図2は図1のドライエッチング装置の動作
を説明するためのタイムチャートである。次に、このド
ライエッチング装置の動作について図1および図2を参
照して説明する。まず、ウェハ8が真空チャンバ7に搬
入されESCステージ3に載置され、エッチングを開始
する数秒程度前に、シーケンス制御部2の信号により直
流電源4aが動作し、電極板1にESCステージ3に印
加されるべき電圧より絶対値が大きい電圧を印加され
る。このことにより真空チャンバ7内に浮遊する電荷を
帯びたパーティクルは電極板1に吸引される。FIG. 2 is a time chart for explaining the operation of the dry etching apparatus of FIG. Next, the operation of the dry etching apparatus will be described with reference to FIGS. First, the wafer 8 is loaded into the vacuum chamber 7 and placed on the ESC stage 3, and a few seconds before the start of etching, the DC power supply 4 a is operated by the signal of the sequence control unit 2, and the electrode plate 1 is transferred to the ESC stage 3. A voltage having an absolute value larger than the voltage to be applied is applied. Thus, the charged particles floating in the vacuum chamber 7 are attracted to the electrode plate 1.
【0014】そして、浮遊するパーティクルが完全に無
くなると思われる時間経過後、シーケンス制御部2の信
号により高周波電源6及び直流電源4が動作し、ウェハ
8をESCステージ3に吸着保持し、高周波電圧の印加
により導入されたガスがグロー放電しプラズマを発生さ
せウェハ8をエッチングする。その後、シーケンス制御
部2の信号により高周波電源6のスイッチと直流電源4
のスイッチをオフにし、エッチング終了すると同時にE
SCステージ3によるウェハ8の吸着を解放する。After a lapse of time when it is considered that the floating particles are completely eliminated, the high frequency power supply 6 and the DC power supply 4 are operated by the signal of the sequence control unit 2, and the wafer 8 is attracted and held on the ESC stage 3, and the high frequency voltage The gas introduced by the application of glow discharges glow to generate plasma and etch the wafer 8. Then, the switch of the high frequency power supply 6 and the DC power supply 4
Is turned off, and E is simultaneously
The suction of the wafer 8 by the SC stage 3 is released.
【0015】このように制御することで、ESCステー
ジ3側へのパーティクルの移動は一切なくなり、ウェハ
8の表面にパーティクルが付着することは無くなる。By controlling as described above, the particles do not move toward the ESC stage 3 at all, and the particles do not adhere to the surface of the wafer 8.
【0016】[0016]
【発明の効果】以上説明したように本発明は、ESCス
テージの周囲を囲むように電極板を配置し、ESCステ
ージのアースに対する電位差より大きな電位差を電極板
に印加し、浮遊するパーティクルを電極板に捕捉させる
ことにより、ウェハにパーティクルが付着させることを
防止でき、パーティクル付着による製品の不良を無くす
ことができるという効果がある。As described above, according to the present invention, an electrode plate is arranged so as to surround the periphery of an ESC stage, a potential difference larger than the potential difference of the ESC stage with respect to the ground is applied to the electrode plate, and floating particles are removed from the electrode plate. Thus, it is possible to prevent particles from adhering to the wafer, and it is possible to eliminate a product defect due to particle adhesion.
【図1】本発明の一実施の形態におけるドライエッチン
グ装置を説明するための装置の構成を示す模式断面図お
よび電極板の上面図である。FIG. 1 is a schematic sectional view showing a configuration of an apparatus for explaining a dry etching apparatus according to an embodiment of the present invention, and a top view of an electrode plate.
【図2】図1のドライエッチング装置の動作を説明する
ためのタイムチャートである。FIG. 2 is a time chart for explaining the operation of the dry etching apparatus of FIG. 1;
【図3】従来のドライエッチング装置の一例を示す模式
断面図である。FIG. 3 is a schematic sectional view showing an example of a conventional dry etching apparatus.
1 電極板 2 シーケンス制御部 3 ESCステージ 4,4a 直流電源 5 上部電極 6 高周波電源 7 真空チャンバ 8 ウェハ DESCRIPTION OF SYMBOLS 1 Electrode plate 2 Sequence control part 3 ESC stage 4, 4a DC power supply 5 Upper electrode 6 High frequency power supply 7 Vacuum chamber 8 Wafer
Claims (2)
静電吸着力で保持し該半導体基板を載置する静電吸着ス
テージを具備し前記静電吸着ステージと該静電吸着ステ
ージと対向する上部電極との間に高周波電圧を印加させ
前記半導体基板面をエッチングするドライエッイング装
置において、前記真空チャンバの内壁と前記静電吸着ス
テージとの間にあって前記静電吸着ステージを囲むよう
に配置される円筒状の電極板と、前記静電吸着ステージ
に印加される電圧よりも絶対値が大きい電圧を前記電極
板に印加し所定時間を経過後に前記電極板に印加する前
記電圧を断にするとともに前記高周波電圧を印加させる
シーケンス制御部を備えることを特徴とするドライエッ
チング装置。1. An electrostatic attraction stage for holding a semiconductor substrate housed in a vacuum chamber with an electrostatic attraction force and mounting the semiconductor substrate thereon, and the electrostatic attraction stage and an upper portion facing the electrostatic attraction stage In a dry etching apparatus for applying a high-frequency voltage between electrodes and etching the semiconductor substrate surface, the dry etching apparatus is disposed between an inner wall of the vacuum chamber and the electrostatic suction stage so as to surround the electrostatic suction stage. A cylindrical electrode plate, and a voltage having an absolute value greater than the voltage applied to the electrostatic suction stage is applied to the electrode plate and the voltage applied to the electrode plate is cut off after a predetermined time, and the voltage is cut off. A dry etching apparatus comprising a sequence control unit for applying a high-frequency voltage.
とを特徴とする請求項1記載のドライエッチング装置。2. The dry etching apparatus according to claim 1, wherein said electrode plate is divided into a plurality of equal parts.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9057897A JPH10284471A (en) | 1997-04-09 | 1997-04-09 | Dry etching device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9057897A JPH10284471A (en) | 1997-04-09 | 1997-04-09 | Dry etching device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH10284471A true JPH10284471A (en) | 1998-10-23 |
Family
ID=14002326
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9057897A Pending JPH10284471A (en) | 1997-04-09 | 1997-04-09 | Dry etching device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH10284471A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6423176B1 (en) | 1998-04-13 | 2002-07-23 | Nec Corporation | Particle-removing apparatus for a semiconductor device manufacturing apparatus and method of removing particles |
US7458247B2 (en) * | 2004-03-29 | 2008-12-02 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method, and program |
US8231800B2 (en) | 2004-03-29 | 2012-07-31 | Tokyo Electron Limited | Plasma processing apparatus and method |
JP2016208006A (en) * | 2015-04-22 | 2016-12-08 | キヤノン株式会社 | Imprint device, imprint method, and manufacturing method of article |
-
1997
- 1997-04-09 JP JP9057897A patent/JPH10284471A/en active Pending
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6423176B1 (en) | 1998-04-13 | 2002-07-23 | Nec Corporation | Particle-removing apparatus for a semiconductor device manufacturing apparatus and method of removing particles |
US7045465B2 (en) | 1998-04-13 | 2006-05-16 | Nec Electronics Corporation | Particle-removing method for a semiconductor device manufacturing apparatus |
US7458247B2 (en) * | 2004-03-29 | 2008-12-02 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method, and program |
US7464581B2 (en) * | 2004-03-29 | 2008-12-16 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring |
US7797984B2 (en) | 2004-03-29 | 2010-09-21 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring |
US7883779B2 (en) | 2004-03-29 | 2011-02-08 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring |
US8231800B2 (en) | 2004-03-29 | 2012-07-31 | Tokyo Electron Limited | Plasma processing apparatus and method |
US8404050B2 (en) | 2004-03-29 | 2013-03-26 | Tokyo Electron Limited | Plasma processing apparatus and method |
US8854625B2 (en) | 2004-03-29 | 2014-10-07 | Tokyo Electron Limited | Vacuum apparatus including a particle monitoring unit, particle monitoring method and program, and window member for use in the particle monitoring |
JP2016208006A (en) * | 2015-04-22 | 2016-12-08 | キヤノン株式会社 | Imprint device, imprint method, and manufacturing method of article |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7541283B2 (en) | Plasma processing method and plasma processing apparatus | |
JPH10150100A (en) | Electrostatic chuck, method and system for processing sample using it | |
JP2004047511A (en) | Method for releasing, method for processing, electrostatic attracting device, and treatment apparatus | |
JP4322484B2 (en) | Plasma processing method and plasma processing apparatus | |
JP3191139B2 (en) | Sample holding device | |
JP4642809B2 (en) | Plasma processing method and plasma processing apparatus | |
JPH08316297A (en) | Electrostatic chuck and its controlling method | |
JP2002100614A (en) | Apparatus and method for manufacturing semiconductor | |
JPH10284471A (en) | Dry etching device | |
JPH0786259A (en) | Apparatus and method for removing contaminant | |
JPH1027780A (en) | Plasma treating method | |
JP4602528B2 (en) | Plasma processing equipment | |
JPH1154604A (en) | Wafer demount method from wafer stage | |
JP2002367967A (en) | Method and apparatus for treating plasma | |
JPH07201818A (en) | Dry etching equipment | |
JPH0878512A (en) | Method and apparatus for electrostatic attraction | |
JP2009141014A (en) | Plasma processing apparatus and processing method | |
JP2002222850A (en) | Method for detaching attracted object in electrostatic chuck | |
JPH05234944A (en) | Wafer temperature control method and equipment | |
JPH08321447A (en) | Wafer processing method with foreign matter eliminating function | |
JPH0220368B2 (en) | ||
JP2001176958A (en) | Plasma processing method | |
JPH11330056A (en) | Method for cleaning electrode | |
JPH05226289A (en) | Workpiece support device and processing equipment lising the same | |
JP2985761B2 (en) | Sample processing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19990713 |