JPH10271837A - Overcurrent restriction in inverter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the waveform distortion of output current to a minimum even if an inverter is in a PWM saturation range or two-arm modulation range. SOLUTION: If an interval from the detection of overcurrent in insulated gate bipolar transistors Q1 to Q6 to the next pulse fall of a PWM signal exceeds the switching period of the insulated gate bipolar transistors Q1 to Q6, a driving signal for permitting the insulated gate bipolar transistors Q1 to Q6 to be an ON or OFF condition for the period shorter than the interval is generated in a microcomputer 4 for outputting the PWM signal to a power device controller 3 as the PWM signal. The power device controller 3 controls the insulated gate bipolar transistors Q1 to Q6 based on the PWM signal outputted from the microcomputer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for limiting an overcurrent in an inverter for driving a motor.

[0002]

2. Description of the Related Art FIG. 3 is a circuit diagram showing an example of a configuration of an inverter having a protection circuit against overcurrent in a switching element. This circuit, as shown in FIG.
, V-phase, W-phase) The AC signal drives the electric motor 2. The DC power supply 1 and an insulated gate bipolar transistor which is a semiconductor switching element that generates an upper arm of a three-phase AC signal by on / off operation. Q1,
Q3 and Q5, and insulated gate bipolar transistors Q2, Q4 and Q6, which are semiconductor switching elements for generating a lower arm of a three-phase AC signal by on / off operation,
Resistors R1 to R6 connected to the emitter sides of the insulated gate bipolar transistors Q1 to Q6 for detecting overcurrents in the insulated gate bipolar transistors Q1 to Q6, respectively, and opposite to the insulated gate bipolar transistors Q1 to Q6, respectively. By controlling the driving of the freewheeling diodes D1 to D6 and the insulated gate bipolar transistors Q1 to Q6 connected in parallel, and detecting the voltage across each of the resistors R1 to R6, the insulated gate bipolar transistor Q1 is detected.
To Q6, and calculates a power device control device 3 that outputs the detection result as an overcurrent detection signal OCL and a pulse width modulation signal (hereinafter, referred to as a PWM signal) for driving the electric motor 2. , Calculated PW
The M signal is supplied to the insulated gate bipolar transistors Q1 to Q1.
And a microcomputer 4 that outputs a signal for driving the transistor Q6 to the power device control device 3. The drive control of the insulated gate bipolar transistors Q1 to Q6 by the power device control device 3 is controlled by the microcomputer. 4 is performed on the basis of the PWM signal output. In the motor 2, the insulated gate bipolar transistors Q1 and Q2,
It is connected to the connection point between Q3 and Q4 and between Q5 and Q6, and is driven by three-phase AC signals output from insulated gate bipolar transistors Q1 to Q6. The DC power supply 1 may be, for example, a DC power supply obtained by converting a three-phase AC power supply by a diode converter, and the motor 2 may be, for example, a three-phase induction motor. An electric motor or the like is conceivable.

Here, in the driving method of the inverter configured as described above, a three-arm modulation method for turning on / off all three-armed insulated gate bipolar transistors Q1 to Q6 to thereby obtain an AC power supply output. And three arm insulated gate bipolar transistor Q
1 to Q6, only the two-armed insulated gate bipolar transistor is turned on / off, and the remaining one armed insulated bipolar transistor is turned on for a specific section in one cycle of the AC power supply output. There is a two-arm modulation system that obtains an output, but usually three
In an inverter using an arm modulation method, a 100% output cannot be obtained with respect to an input. Therefore, a two-arm modulation method that can obtain 100% output with respect to an input is often used.

Hereinafter, a method for limiting overcurrent in the inverter configured as described above will be described. FIG.
4 is a timing chart for explaining a conventional overcurrent limiting method in the inverter shown in FIG. FIG. 4 shows the case of the two-arm modulation method. The insulated gate bipolar transistor Q1 is turned on, and the insulated gate bipolar transistor Q1 is turned on.
When an overcurrent is detected in the resistor R1 when a current is flowing through the resistor R1, the drive signal PU for driving the insulated gate bipolar transistor Q1 is fixed to the Hi level in the power device control device 3, whereby The gate of the insulated gate bipolar transistor Q1 is shut off, and the overcurrent detection signal OCL is set to the overcurrent detection state (Low level) and output to the microcomputer 4.

Then, the operation of the insulated gate bipolar transistor Q1 stops, and the U-phase AC current is not normally input to the motor 2. Thereafter, at the time of the fall of the next pulse of the drive signal PUL for driving the insulated gate bipolar transistor Q1, which is a PWM signal calculated in advance in the microcomputer 4, the overcurrent detection signal OCL and the drive signal PU are output. It is reset, whereby the insulated gate bipolar transistor Q1 returns to normal operation. JP-A-5-252754
In the device disclosed in Japanese Patent Application Laid-Open Publication No. H10-209, an overcurrent detection unit is provided in a DC power supply unit of an inverter main circuit, and when an overcurrent is detected by the overcurrent detection unit, a semiconductor switching element in which the overcurrent is detected. Stop the operation of
After that, the PW calculated by the microcomputer
The overcurrent limitation in the inverter is performed by restoring the operation of the semiconductor switching element at the falling of the next pulse of the M signal.

[0006]

In the conventional overcurrent limiting method for an inverter as described above, when an overcurrent is detected by the overcurrent detecting means, the operation of the semiconductor switching element in which the overcurrent is detected is controlled. To stop,
After that, the PW calculated by the microcomputer
Although the operation of the semiconductor switching element is restored at the time of the fall of the next pulse of the M signal, in the inverter using the two-arm modulation method, since no pulse is output to the one-arm semiconductor switching element,
As shown in FIG. 4, there is a portion where the interval between pulses of the drive signal PUL, which is a PWM signal calculated by the microcomputer, is longer than the cycle of the semiconductor switching element (FIG. 4A). . Therefore, when the operation of the semiconductor switching element stops during that period, the phase current in the semiconductor switching element whose operation has stopped is not output normally for a long time, and the waveform of the output current is distorted accordingly. is there. this is,
It is not limited to the case where the two-arm modulation method is used.
It occurs even at the time of saturation.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and provides an overcurrent limiting method for an inverter capable of minimizing distortion of an output current waveform. The purpose is to do.

[0008]

In order to achieve the above object, the present invention provides a DC power supply, a plurality of semiconductor switching elements for generating a three-phase AC by on / off operation, and a plurality of semiconductor switching elements. A plurality of resistors for detecting an overcurrent in the connected semiconductor switching element, and controlling the driving of the semiconductor switching element, and detecting the voltage across each of the resistors to detect the semiconductor switching element. And a power device control device that detects the overcurrent and outputs the detection result as an overcurrent detection signal, and calculates a pulse width modulation signal for driving the electric motor, and drives the semiconductor switching element using the pulse width modulation signal. Microcomputer outputting to the power device control device as a signal for causing Control of the driving of the semiconductor switching element by the power device control device is performed based on the PWM signal, and when an overcurrent in the semiconductor switching device is detected by the power device control device, By shutting off the gate of the semiconductor switching element in which an overcurrent has been detected among the semiconductor switching elements, and then returning the semiconductor switching element to an operating state at the time of the fall of the next pulse of the pulse width modulation signal. In the overcurrent limiting method for an inverter that limits overcurrent, in a case where the interval from the detection of the overcurrent to the fall of the next pulse of the pulse width modulation signal exceeds the switching cycle of the semiconductor switching element, The switching time of the semiconductor switching element is shorter than the interval It generates a drive signal for turning on or off state, and outputs as the pulse width modulation signal.

The number of times the gates are shut off is counted, and when the count value reaches a predetermined value, all the gates of the plurality of semiconductor switching elements are shut off. (Operation) In the present invention configured as described above, if the interval from the detection of the overcurrent to the fall of the next pulse of the pulse width modulation signal exceeds the switching period of the semiconductor switching element, A drive signal for turning ON or OFF for a time shorter than the interval is generated and output as a pulse width modulation signal. Thereby, even when the interval from the detection of the overcurrent to the fall of the next pulse of the pulse width modulation signal exceeds the switching cycle of the semiconductor switching element, after the overcurrent is detected and the gate is shut off, Since the semiconductor switching element returns to the operating state based on the drive signal, the phase current in the semiconductor switching element whose gate is cut off is not output normally for a long time, and the distortion of the waveform of the output current is minimized. Can be suppressed.

Also, the number of times that the gates are cut off is counted, and when the count value reaches a predetermined value, all the gates of the plurality of semiconductor switching elements are cut off. Thus, the operation of the motor is continued.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a timing chart for explaining an embodiment of the overcurrent limiting method of the present invention in the inverter shown in FIG. In addition,
FIG. 1 shows the case of the two-arm modulation method as in FIG. When the insulated gate bipolar transistor Q1 is turned on and an overcurrent is detected in the resistor R1 while a current is flowing through the insulated gate bipolar transistor Q1, the insulated gate bipolar transistor Q1
Is fixed to a Hi level, thereby driving the insulated gate bipolar transistor Q
1 is shut off and the overcurrent detection signal OC
L is set to the overcurrent detection state (Low level) and output to the microcomputer 4.

Then, the operation of the insulated gate bipolar transistor Q1 stops, and the U-phase alternating current is not normally input to the motor 2. Thereafter, at the time of the fall of the next pulse of the drive signal PUL for driving the insulated gate bipolar transistor Q1, which is a PWM signal calculated in advance in the microcomputer 4, the overcurrent detection signal OCL and the drive signal PU are output. The reset operation causes the insulated gate bipolar transistor Q1 to return to the normal operation. At this time, the microcomputer 4 recalculates the PWM signal based on the previously calculated pulse interval of the PWM signal. Will be Below, PWM in microcomputer
The signal processing will be described in detail.

FIG. 2 is a flowchart showing an operation algorithm of the microcomputer in the overcurrent limiting method according to the present invention. First, the microcomputer 4 (FIG. 3)
), It is determined whether the overcurrent detection signal OCL input from the power device control device 3 (see FIG. 3) is in an on state (Low level) or an off state (Hi level) (Step S1). . If it is determined in step S1 that the overcurrent detection signal OCL is in the ON state, the interval until the next pulse of the semiconductor switching element driving PWM signal calculated in advance by the microcomputer 4 (see FIG. 3) is: It is determined whether the switching period of the semiconductor switching element has been exceeded (step S2). That is, in step S2, when the overcurrent is detected,
It is determined whether the region is the WM saturation region or the two-arm modulation region.

In step S1, the overcurrent detection signal OC
If it is determined that L is in the off state, or if it is determined in step S2
In the case where it is determined that the interval to the next pulse of the PWM signal for driving the semiconductor switching element is equal to or shorter than the switching cycle of the semiconductor switching element,
The arithmetic processing of the WM signal is performed (Step S6). On the other hand, if it is determined in step S2 that the interval to the next pulse of the PWM signal for driving the semiconductor switching element exceeds the switching cycle of the semiconductor switching element, the semiconductor switching element is turned on or off for the minimum time. Is generated (step S3). Note that this minimum time is about the switching cycle of the semiconductor switching element. After the processing in step S3, if the PWM signal for driving the semiconductor switching element is a signal that is turned on until the next pulse, the PWM signal for turning off the semiconductor switching element for the minimum time is calculated (step S3). S
4) Also, if the PWM signal for driving the semiconductor switching element is a signal that is turned off until the next pulse, a P for turning on the semiconductor switching element for the minimum time is used.
The calculation of the WM signal is performed (step S5), and the calculated PWM signal is output to the power device control device 3 (see FIG. 3) as drive signals PUL to NWL (see FIG. 3).

The power device controller 3 (FIG. 3)
), The microcomputer 4 (see FIG. 3)
, The overcurrent detection signal OCL and the drive signals PU to NW are reset at the time of the fall of the next pulse of the drive signals PUL to NWL (see FIG. 3), thereby returning the semiconductor switching element to the normal operation. . Note that the above-described series of operations is performed until the overcurrent detection signal OCL is reset. The microcomputer 4
In (see FIG. 3), the number of times the gate of the semiconductor switching element is cut off when the overcurrent is detected (the number of times the overcurrent detection signal OCL output from the power device control device 3 is read) is counted. A predetermined number of times (for example, 5 times) when the number of times reaches a predetermined number of times (for example, 5 times) continuously, or within a predetermined time (for example, within 30 times the switching cycle of the semiconductor switching element).
, The gates of all the semiconductor switching elements of the inverter main circuit are shut off.

[0016]

Since the present invention is constructed as described above, it has the following effects. According to the first aspect, when the interval from the detection of the overcurrent to the fall of the next pulse of the pulse width modulation signal exceeds the switching cycle of the semiconductor switching element, the semiconductor switching element is set to be shorter than the interval. Since the drive signal for turning on or off for a short time is generated and output as a pulse width modulation signal, the interval from the detection of overcurrent to the fall of the next pulse of the pulse width modulation signal is Even when the switching period of the semiconductor switching element is exceeded, the phase current of the semiconductor switching element whose gate is cut off is not output normally for a long time, and the distortion of the waveform of the output current can be minimized.

According to the second aspect of the present invention, the number of times the gates are shut off is counted, and when the count value reaches a predetermined value, all the gates of the plurality of semiconductor switching elements are shut off. The operation of the electric motor can be continuously performed within the overcurrent tolerance of the semiconductor switching element. As a result, even if the overcurrent detection signal fluctuates due to transient overcurrent (overload), malfunction of the overcurrent detection / protection circuit inside the inverter, or external intrusion noise, distortion of the output current waveform is minimized. Thus, the operation of the motor can be continued.

[Brief description of the drawings]

FIG. 1 is a timing chart for explaining an embodiment of an overcurrent limiting method in an inverter according to the present invention.

FIG. 2 is a flowchart showing an operation algorithm of a microcomputer in the overcurrent limiting method of the present invention.

FIG. 3 is a circuit diagram showing one configuration example of an inverter having a protection circuit against overcurrent in a switching element.

FIG. 4 is a timing chart for explaining a conventional overcurrent limiting method in the inverter shown in FIG. 3;

[Explanation of symbols]

 Reference Signs List 1 DC power supply 2 Motor 3 Power device control device 4 Microcomputer D1 to D6 Freewheel diode Q1 to Q6 Insulated gate bipolar transistor R1 to R6 Resistance

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁶ Identification code FI H02P 7/63 302 H02P 7/63 302D

Claims (2)

[Claims] 1. A DC power supply, a plurality of semiconductor switching elements for generating a three-phase AC by an on / off operation, and a plurality of semiconductor switching elements respectively connected to the plurality of semiconductor switching elements for detecting an overcurrent in the connected semiconductor switching elements. A plurality of resistors for controlling the driving of the semiconductor switching element, and detecting an overcurrent in the semiconductor switching element by detecting a voltage across each of the resistors, and transmitting the detection result to an overcurrent detection signal. And a microcomputer that calculates a pulse width modulation signal for driving the electric motor and outputs the pulse width modulation signal to the power device control device as a signal for driving the semiconductor switching element Having the power device control device Control of driving of the semiconductor switching element is performed based on the PWM signal, and when an overcurrent in the semiconductor switching element is detected by the power device control device, an overcurrent is detected in the semiconductor switching element. An overcurrent limiting method for an inverter that limits an overcurrent by shutting off a gate of a semiconductor switching element and thereafter returning the semiconductor switching element to an operating state at a falling edge of a next pulse of the pulse width modulation signal, If the interval from the detection of the overcurrent to the fall of the next pulse of the pulse width modulation signal exceeds the switching cycle of the semiconductor switching element, the semiconductor switching element is turned on or turned off for a time shorter than the interval. Generates a drive signal to turn off And outputting the pulse width modulation signal as an overcurrent limiting method in the inverter. 2. The semiconductor device according to claim 1, wherein the number of times the gate is shut off is counted, and when the count value reaches a predetermined value, all gates of the plurality of semiconductor switching elements are shut off. Overcurrent limiting method for inverters in Japan.