JPH10256844A - Output stage circuit for operational amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the slew rate of the operational amplifier without increasing a steady-stage current. SOLUTION: A 3rd transistor(TR) 11 is provided in parallel with a 2nd TR 12 and then a drive capability is improved without increasing the size of the 2nd TR 12. Since the operation of the 3rd TR 11 is controlled in complementary with the operation of the 1st TR 13 by a 3rd control section, the 1st TR 13 and the 3rd TR 11 are not simultaneously conductive basically. Thus, no through current flows between power supply terminals via the 3rd TR 11 and the 1st TR 13, a load of a high capacity is driven without increasing a steady-state current.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an output stage circuit of an operational amplifier, and more particularly to an output stage circuit of an operational amplifier improved so that the slew rate of the operational amplifier can be improved without increasing the steady-state current.

[0002]

Generally, in an analog integrated circuit, a class AB output stage circuit is known as an output circuit for driving a capacitive load having a large value by an operational amplifier. (Alan B. Grebene, Bipolar
and MOS analog integrated
circuitdesign. , John Wile
y & Sons. , 1984).

In this class AB output stage circuit, the output transistor is basically always constantly biased, and a DC current is supplied to the output transistor even when the input signal is zero. Therefore, the p-ch on the power supply side
In some cases, the MOS transistor and the n-ch MOS transistor on the ground terminal side are simultaneously set to a conductive state. In this case, a current flows from the power supply to the ground terminal side, not from the power supply to the load side. This current is called a through current and is originally an undesirable current. However, a weak through current flows when the output terminal potential of the output stage circuit is set to a certain potential. This weak through current is called a steady current.

The magnitude of the steady current is determined by the p-chMO on the power supply side.
It depends on the size of the S transistor and the n-ch MOS transistor on the ground end side, and the size of the transistor depends on the drive capability of the output stage circuit. Therefore, when driving a large capacitive load, a large steady current flows.

An additional circuit is provided for increasing the DC bias current applied to the output transistor only when the absolute value of the difference between the two input voltages of the operational amplifier is larger than a certain value. Is also known to increase the (Tetsuro I
takura, et. al. , 10uA quiesc
ent current opamp design
for an LCDdriver IC. , AM-L
CD 96 Digest of Technical
Papers, Kobe, Japan, Nov. 19
96) In this case, not only the steady-state current of the output stage but also the current of other parts of the operational amplifier will increase.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide an output stage circuit of an operational amplifier that can drive a large capacitive load without increasing a steady current. I do.

[0007]

SUMMARY OF THE INVENTION The present invention comprises a first input terminal, a second input terminal, a signal from the first input terminal, and a second input terminal.
A first transistor that is inserted between a first power supply terminal and a signal output terminal and that is controlled in operation by the first control signal; A second transistor inserted between a power supply terminal and the signal output terminal, the second transistor being a signal of the first or second input terminal as a second control signal, the operation being controlled by the second control signal; In an output stage circuit of an amplifier, a third transistor inserted between the second power supply terminal and the signal output terminal, and a signal based on the first and second input terminals, or based on the first control signal A third control for causing the third transistor to operate complementarily with the first transistor, based on an internal signal of a circuit that generates the signal and one of the first and second input terminals. Characterized by comprising a circuit for generating a degree.

In the output stage circuit of the operational amplifier according to the present invention, the third transistor is provided in parallel with the second transistor, so that the driving capability can be increased without increasing the size of the second transistor. . Further, the operation of the third transistor is controlled in a complementary manner to the operation of the first transistor by the third control signal, so that the first transistor and the third transistor do not basically become conductive at the same time. Therefore, no through current flows between the power supply terminals via the third transistor and the first transistor, so that a large capacitive load can be driven without increasing the steady-state current.

Further, by changing the threshold value of the circuit for generating the third control signal, the third transistor is switched from on to off before the first transistor is switched from off to on, and the first transistor is turned on. It is preferable that the third transistor be switched from off to on after being switched from to off. Thus, even in the transitional period of the on / off switching of the first and third transistors, the transistors do not turn on at the same time.

[0010]

Embodiments of the present invention will be described below. FIG. 1 shows an output stage circuit of an operational amplifier according to one embodiment of the present invention. The output stage circuit of the operational amplifier is used as an output circuit of an operational amplifier that is required to drive a large capacitive load. The first and second stages receive differential inputs from the input stage circuit of the operational amplifier. It has second input terminals 1 and 2 and an output terminal 3 to which an external load is connected. An n-ch first MOS transistor 13 is connected between the output terminal 3 and the ground terminal, and a p-ch second MOS transistor 12 is connected between the output terminal 3 and the power supply Vcc terminal. Have been. Further, between the output terminal 3 and the power supply Vcc terminal, p is set to improve the slew rate of the operational amplifier.
The -ch third MOS transistor 11 is connected.

The gate of the first MOS transistor 13 has an amplifying circuit 6 which operates as a gain circuit of an operational amplifier.
1 is connected, and the operation of the first MOS transistor 13 is controlled by the first control signal generated by the amplifier circuit 61. The signal of the first input terminal 1 is input to the non-inverting input of the amplifier circuit 61, and the signal of the second input terminal 2 is input to the inverting input. Amplifier circuit 61
Generates the above-described first control signal by amplifying the difference between these input signals.

The gate of the second MOS transistor 12 is connected to the first input terminal 1, and the signal at the first input terminal 1 is used as a second control signal for controlling the operation of the second MOS transistor 12. Can be

The output of the amplifier circuit 60 is connected to the gate of the third MOS transistor 11.
The third MOS is generated by the third control signal generated by
The operation of the transistor 11 is controlled. The amplification circuit 60
The signal at the first input terminal 1 is used as its non-inverting input, and the signal at the second input terminal 2 is used as its inverting input. The third control signal is generated by amplifying the difference between these input signals.

In the circuit of FIG. 1, since the output signals of the amplifier circuits 60 and 61 have the same polarity, the operation of the transistors 11 and 13 is controlled complementarily. Therefore, transistor 1
The transistors 1 and 13 are simultaneously turned on during a short period when the amplifier circuits 61 and 60 that generate the first and third control signals are in a transient state.

The amplifier circuit 6 for generating the third control signal is different from the amplifier circuit 61 for generating the first control signal.
By changing the threshold value of 0 or the changing point to give an output response to the input as shown in FIG. 2,
Further, it is possible to prevent the transistors 11 and 13 from conducting simultaneously.

That is, in FIG. 2, the amplifying circuit 61
With respect to, when the difference between the signal of the first input terminal 1 and the signal of the second input terminal 2 (the potential of the terminal 1−the potential of the terminal 2) is zero, the output signal rises and falls, The output signal of the amplifier circuit 60 rises earlier than that of the amplifier circuit 61, and the output signal falls later than the amplifier circuit 61. By providing such characteristics, the transistor 11 is switched from on to off by the third control signal before the transistor 13 is switched from off to on by the first control signal, and the transistor 13 is turned on by the first control signal. After the transistor 11 is switched off, the transistor 11 can be switched on from off by the third control signal.

Therefore, the size of the transistors 11 and 13 can be arbitrarily selected according to the load capacity connected to the output terminal 3, and the large load can be efficiently driven without increasing the steady-state current. can do. Here, the amplifier circuits 61 and 60 that generate the first and third control signals have similar configurations, so that the amplifier circuits 6 and 60 generate the first and third control signals.
The input stage circuit in 1 can be shared by both the amplifier circuits 61 and 60. In this case, the amplifier circuit 60 can generate the third control signal based on the signal of the first or second input terminal 1 or 2 and the internal signal of the amplifier circuit 61.

The operation of the circuit of FIG. 1 is as follows. A differential signal is input to the input terminals 1 and 2. When the signal at the input terminal 2 becomes higher than the signal at the input terminal 1, the transistor 13 is turned off, but the current flowing from the power supply Vcc terminal to the output terminal 3 via the transistor 12 increases.
Further, at this time, since the transistor 11 is also on, 2
A large current can be supplied from the power supply Vcc terminal to the output terminal 3 via the two transistors 11 and 12.

The signal potential at input terminal 1 rises (input terminal 2
When the signal potential of the input terminal 1 and the signal of the input terminal 2 begin to reverse, the transistor 13 switches from off to on. However, at this time, the through current does not flow through the transistors 11 and 13 because the transistor 11 has already been switched from on to off.

Transistors 12, 13 and circuit 61
When a class AB output circuit is constituted by only the transistor 13, it is necessary to increase the size of the transistor 12 in order to enhance the driving capability, and this increases the steady-state current and the through current. The presence of the transistor 11
Does not need to be increased, and the through current and the steady current can be reduced.

FIG. 3 shows a more specific circuit configuration of the circuit of this embodiment. Here, the circuits 6 and 4 correspond to the circuits 61 and 60 in FIG. 1, respectively. Further, the circuit 4 is realized by sharing the input circuit unit of the circuit 6.

That is, the circuit of FIG. 3 includes a first input terminal 1 for receiving a first input signal, a second input terminal 2 for receiving a second input signal, and a first input terminal 1 for receiving the first input signal. A circuit 6 for generating a first control signal 30 based on the signal and the signal of the second input terminal 2, and a signal of the first input terminal 1 or a signal of the second input terminal 2 as a second control signal 31; A first n-ch MOS transistor 13 controlled by a first control signal; and a second p-channel MOS transistor 13 controlled by a second control signal.
The third control signal 32, the -ch MOS transistor 12, the circuit 4 for generating the third control signal 32 based on the internal signal 25 of the circuit 6 for generating the first control signal, and the signal of the second input terminal 2; It has a third n-ch MOS transistor 11 to be controlled. In addition, 2
4 is a phase compensation circuit.

A circuit 6 for generating a first control signal 30 based on the signal at the first input terminal 1 and the signal at the second input terminal 2
Determines the drain current flowing through the p-ch MOS transistor 16 according to the signal of the first input terminal 1, so that the drain current having the same magnitude as the drain current flowing through the transistor 16 flows through the transistors 14 and 17 having the current mirror configuration. On the other hand, the drain current flowing through the transistor 19 is determined by the signal of the second input terminal 2.
9, the potential of the first control signal 30 moves to the ground terminal side, and if the current flowing through the transistor 17 is smaller than the current flowing through the transistor 19, the potential of the first control signal 30 becomes the power supply terminal. By moving to the side,
The input signal is amplified and used as the first control signal 30. The gate-grounded transistors 15 and 18 are added so that the transistors 16 and 19 do not have operating point dependency. The gate voltage is biased from the input terminal so that a new bias circuit is not required. This circuit 6 is, as described above, an amplifier circuit 61 of FIG.
This is an example of realization.

The first control signal 30 and the second control signal 31
Causes the output circuit 5 to operate, and the first control signal 30 and the second
The operation of the transistors 12 and 13 is determined by the control signal 31 and the potential of the output terminal 3 is determined. However, the transistors 12 and 13 are not simultaneously turned off, and there is a steady current flowing from the power supply side to the ground terminal.

In this circuit, the sizes of the transistors 12 and 13 are determined according to the size of the load, and the transistors 12 and 13 need to have a large size under a large load. In particular, when the size of the transistor 12 is increased, the steady-state current flowing from the power supply side to the ground terminal increases proportionately, so that an attempt to improve the transient response of the circuit increases the power consumption.

Therefore, in FIG. 3, as in FIG. 1, a circuit 4 for generating a third control signal 32 based on the signal of the first input terminal 1 and the internal signal of the circuit 6 is provided. The third p-ch MOS transistor 11 controlled by the second P-channel MOS transistor 32 is connected to the output terminal 3.

The circuit 4 for generating the third control signal 32 based on the internal signal 25 of the circuit 6 for generating the first control signal and the signal at the second input terminal 2 is a circuit 6 for generating the first control signal. The drain current flowing through the n-ch MOS transistor 7 is determined by the internal signal 25 of the second transistor 25, and a drain current having the same magnitude as the drain current flowing through the transistor 7 flows through the transistor 8. On the other hand, the second input terminal 2 The drain current flowing through the transistor 8 is determined by the signal of the third control signal 32. If the current flowing through the transistor 7 is larger than the current flowing through the transistor 8, the potential of the third control signal 32 tends to move to the ground terminal side and flows through the transistor 7. If the current is smaller than the current flowing through the transistor 8, the potential of the third control signal 32 moves to the power supply terminal side, so that the input signal There has so amplified a third control signal 32.

The transistors 9 and 10 are turned on when the potential of the third control signal 32 moves to the ground terminal, and cut off when the potential of the third control signal 32 moves to the power supply terminal. This is added so that the signal amplitude of the third control signal 32 is constant according to the power supply voltage.
The signal of the third control signal 32 is the ON / OFF of the transistor 11.
Off is controlled.

Since the input of the third control signal 32 is the internal signal 25 of the circuit 6 for generating the first control signal, the on / off of the transistor 11 operates more rapidly than the operation of the transistor 13. Therefore, the transistors 11 and 13 are not simultaneously turned on.
Therefore, as in the case of FIG. 1, it is not necessary to increase the size of the transistor 12, and it is possible to drive a large load without increasing the steady-state current and the through current.

FIG. 4 shows the overall configuration of the operational amplifier using the circuit of FIG. In the circuit of FIG.
An input stage circuit 50 of an operational amplifier is added before the first input terminal 1 and the second input terminal 2. A terminal 40 is a negative input terminal of the operational amplifier, a terminal 41 is a positive input terminal of the operational amplifier, and a terminal 42 is a bias voltage setting terminal of the operational amplifier. Transistors 45 and 48 function as current sources, transistors 43 and 44 are loads, and transistors 44 and
47 is a difference voltage detection circuit, and a transistor 49 is provided for adjusting the gain.

By the way, in a conventionally known circuit for driving a large load, (Teturo Itaku)
ia et. al), the potential difference between the positive and negative input terminals 41 and 40 of the operational amplifier is detected by a circuit similar to the difference voltage detection circuit including the transistors 44 and 47, and when the value exceeds a certain threshold value, the bias voltage setting terminal 42 Was to change the bias voltage to be applied. In such a conventional example, not only the steady-state current of the output stage but also the current of the other part of the operational amplifier increases, and the effectiveness of the present invention will be described paradoxically.

[0032]

As described above, according to the present invention, it is possible to provide an output stage circuit of an operational amplifier that can drive a large load without increasing the steady-state current.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an output stage circuit of an operational amplifier according to an embodiment of the present invention.

FIG. 2 is a diagram showing a hysteresis characteristic of an amplifier circuit provided in the circuit of FIG.

FIG. 3 is a diagram showing an example of a specific circuit configuration of an output stage circuit of the operational amplifier according to one embodiment of the present invention.

FIG. 4 is a diagram showing an example of another specific circuit configuration of the output stage circuit of the operational amplifier according to one embodiment of the present invention.

[Explanation of symbols]

 1, 2 ... input terminal 3 ... output terminal 11 ... third transistor 12 ... second transistor 13 ... first transistor 60, 61 ... amplifier circuit

Claims (3)

[Claims] A first input terminal connected to the first input terminal and a second input terminal connected to the first input terminal;
A circuit for generating a first control signal based on the signal of the input terminal and the signal of the second input terminal, and a circuit inserted between a first power supply terminal and a signal output terminal, the operation of which is controlled by the first control signal A first transistor, a second power supply terminal, and the signal output terminal. The signal of the first or second input terminal is used as a second control signal, and operation is controlled by the second control signal. An output stage circuit of an operational amplifier comprising: a third transistor inserted between the second power supply terminal and the signal output terminal; and a third transistor inserted between the second power supply terminal and the signal output terminal. Or the third transistor is complementary to the first transistor based on an internal signal of a circuit for generating the first control signal and one of the first and second input terminals. The output stage circuit of an operational amplifier characterized by comprising a circuit for generating a third control signal for operating. 2. The circuit for generating the third control signal,
The third transistor is switched from on to off before the first transistor is switched from off to on, and the third transistor is switched from off to on after the first transistor is switched from on to off. 2. The output stage circuit of an operational amplifier according to claim 1, wherein the output stage circuit is configured as follows. 3. The circuit according to claim 1, wherein the first and third transistors have opposite polarities, and the circuit for generating the first control signal and the circuit for generating the third control signal include an amplifier circuit having the same polarity. 2. The output stage circuit of an operational amplifier according to claim 1, wherein each of the output stage circuits is configured.