JPH10255214A - Digital signal decoding apparatus, magnetic information reproducing apparatus and method for compensating waveform distortion of reproduced signal of magnetic information - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce decoding error in a decoding circuit by equalizing waveform after compensating for DC signal component of reproduced signal and asymmetrical waveform component and then learning and feeding back the compensation coefficient to minimize equalizing error of the result. SOLUTION: A distortion compensating circuit 23 sends waveform distortion of a digital signal from an ADC 19 to an equalizing circuit 20 after adding a coefficient of normal number for a DC signal compensated and compensation with addition of high order items for non- symmetrical waveform component using the compensation coefficient given from a compensation coefficient learning circuit 24. The compensation coefficient learning circuit 24 is provided with a model of impulse response in the transmission path reaching a decoding circuit 21 from a read head 12 and evaluates a difference between the expected value based on this model and the equalized signal from the equalizing circuit 20 as the equalization error. The minimum equalization error is obtained using the preset evaluation function for the predetermined number of equalizing signals output continuously from the equalizing circuit 20, a revised value of the corresponding compensation coefficient is calculated and this revised value is then supplied to a distortion compensating circuit 23.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital signal decoding apparatus for decoding a reproduced signal of magnetic information read from a magnetic recording medium, and more particularly, to a digital signal capable of correcting waveform distortion included in the reproduced signal. The present invention relates to a decoding device, a magnetic information reproducing device, and a method.

[0002]

2. Description of the Related Art Conventionally, a magnetic information reproducing apparatus for digitally processing a reproduction signal of magnetic information read from a magnetic recording medium has been used. Hereinafter, a conventional magnetic information reproducing apparatus will be described.

FIG. 7 is a block diagram showing the configuration of a conventional magnetic information reproducing apparatus.

A conventional magnetic information reproducing apparatus 100 shown in FIG.
Includes a magnetic disk 101, a head 102, a preamplifier 103, a digital signal decoding device 104, and an error correction circuit 105.

The magnetic disk 101 is a medium on which magnetic information having binary codes of 1 and 0 (or -a and + a) is recorded.

[0006] The head 102 reads magnetic information recorded on the magnetic disk 101 as a reproduction signal.

The preamplifier 103 amplifies the reproduced signal output from the head 102.

As shown in FIG. 7, the digital signal decoding device 104 includes a filter 106, an analog-to-digital converter (ADC) 107, a waveform equalizing circuit 108, a decoding circuit 109, and a voltage controlled oscillator (VCO) 110 And

The filter 106 removes high frequency noise of the reproduction signal sent through the preamplifier 103.

[0010] The ADC 107 quantizes the reproduced signal sent via the filter 106 and converts it into a digital signal.

The waveform equalizer 108 equalizes the waveform of the digital signal output from the ADC 107 for decoding by the decoder 109. Here, waveform equalization refers to shaping the amplitude characteristics and phase characteristics of a reproduced signal and converting the digital signal converted by the ADC 107 into magnetic information (1 and 0 (or -a and + a) corresponding to the digital signal. )
Binary code). Normal,
The waveform equalizer 108 has a FIR (Finite impulse res
A linear filter called a ponse) filter is used.

The decoding circuit 109 performs Viterbi decoding of the waveform equalized signal output from the waveform equalizing circuit 108 and converts the signal into a binary code corresponding to the original magnetic information.

The VCO 110 generates a clock signal (CLK) 111 that determines the operation timing of each section of the digital signal decoding device 104 using the output signal (waveform equalized signal) of the waveform equalizing circuit 108.

The error correction circuit 105 includes a decoding circuit 109
, Corrects the error of the Viterbi-decoded binary code, and sends the result to the host device 112.

A conventional magnetic information reproducing apparatus 100 shown in FIG.
In the magnetic information channel (magnetic information is
Is read out as a reproduced signal by the decoding circuit 10
9, which means the transmission path up to 9)
The differentiator and the low-pass filter can be represented as being connected in series.

Here, assuming that the delay period of the delay operator in the magnetic information channel is D, the intersymbol interference of the reproduced signal caused by the passage of the reproduced signal through this magnetic information channel is (1-D) (1 + D ) Or (1-D)
It is modeled as a Partial Response Channel with (1 + D) ² impulse responses.

In a magnetic information channel where the intersymbol interference is modeled as a partial response channel with an impulse response of (1-D) (1 + D), 0 and 1
Magnetic information represented by binary codes (or -a and + a) is -1, 0 and +1 (or -c, 0
And + c) are output from the waveform equalization circuit 108 as waveform equalization signals having three values.

Further, the intersymbol interference is (1-D) (1 + D)
^For a magnetic information channel modeled as a partial response channel with an impulse response of ² , 0
And 1 (or -a and + a) represented by binary codes are -2, -1, 0, +1 and +2.
(Or -2c, -c, 0, + c, and + 2c) as a waveform equalization signal having five values,
Output from

As described above, in the magnetic channel, the magnetic information of the binary code is converted into a ternary or quinary waveform equalized signal. Accordingly, the decoding circuit 109 performs Viterbi decoding to generate a binary code of 0 or 1 from a ternary or quinary signal sequence.

Viterbi decoding can be represented as a finite state machine having N states. Here, N is 2 ^{m -1} when the storage memory length of the encoder of the convolutional code in the decoding circuit 109 is m.

The N states of the finite state machine at a certain time k are represented by vertically arranged nodes, and the transition from each of these states to each of the states at the time (k + 1) is represented as a branch. The form of the dimensional graph is called a trellis diagram, and the Viterbi decoding searches for the shortest path on the trellis diagram to perform the maximum likelihood estimation of a signal sequence in a band-limited channel having intersymbol interference.

That is, a code sequence that minimizes a distance metric (distance function) related to the received signal sequence, such as the sum of the square errors of the received signal sequence, is selected from the possible code sequences. This is equivalent to a dynamic programming problem for a multi-stage decision process.

[0023]

By the way, in recent years, as a head of a magnetic information reproducing apparatus, an MR (Magneto Resistiv) has been used.
e) A head is used. The MR head has an advantage that the reproduction signal does not depend on the relative speed with respect to the magnetic recording medium, unlike the magnetic flux change detection type head, but has a disadvantage that the linearity of the reproduction signal is poor.

FIG. 8 is a diagram showing a response curve of the MR head. In FIG. 8, the horizontal axis represents the strength of the magnetic field detected by the head, and the vertical axis represents the rate of change in resistance due to the change in the magnetic field.

Here, assuming that a constant bias magnetic field HB is applied to the MR head and the amplitude of the magnetic field in the magnetic recording medium is H0, the input magnetic field to the MR head is as shown in FIG. A vertically symmetric waveform without nonlinear waveform distortion. On the other hand, the reproduction signal of the MR head is a signal which has undergone vertically asymmetric nonlinear distortion.

As can be seen from the shape of the response curve shown in FIG. 8, in the MR head, the reproduced signal corresponding to the binary code recorded on the magnetic recording medium is output when the binary code is either one of positive or negative. Has good linearity (negative (B) data in FIG. 8), but in the case of the other sign, nonlinear waveform distortion increases and linearity worsens (positive (A) data in FIG. 8).

As described above, the equalizing circuit usually includes F
A linear filter called an IR filter is used. Therefore, if the reproduced signal of the magnetic recording medium contains nonlinear waveform distortion, the waveform distortion included in the reproduced signal is amplified in the process of equalizing the reproduced signal to a value used in the maximum likelihood estimation by Viterbi decoding. As a result, there is a problem that a waveform equalization error increases, and as a result, errors in a decoding result increase.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a digital signal decoding apparatus and a magnetic information reproducing apparatus capable of reducing a decoding error rate caused by waveform distortion included in a reproduced signal waveform. It is to provide an apparatus and a method.

[0029]

In order to solve the above-mentioned problems, a digital signal decoding apparatus according to the present invention comprises an analog-to-digital converter for sequentially sampling reproduction signals of magnetic information read from a magnetic recording medium and converting the reproduced signals into digital signals. And a waveform equalizer that outputs a waveform equalized signal by waveform equalizing the digital signal output from the analog-to-digital converter,
A decoder for decoding the waveform equalized signal output from the waveform equalizer, and a digital signal decoding device, wherein the equalization error of the waveform equalized signal of the waveform equalizer is reduced. And a correction means for correcting the reproduction signal or the digital signal with a correction coefficient corresponding to the equalization error.

Here, the magnetic information recorded on the magnetic recording medium can be represented by binary codes of 0 and 1 (or -a and + a).

The waveform equalization means shaping the amplitude and phase characteristics of a reproduced signal and converting the digital signal converted by the analog-to-digital converter into magnetic information (1 and 0 (or , -A and + a)
Binary code).

The equalization error is defined as a waveform equalization signal of the waveform equalization circuit and a value which the signal should originally take, that is, a code obtained when the delay period of the delay operator in the magnetic information channel is D. For a magnetic information channel where the interference is modeled as a partial response channel with an impulse response of (1-D) (1 + D), -1,0
And +1 (or -c, 0 and + c), and the intersymbol interference is (1-D) (1
The + D) when the magnetic information channel is modeled as a partial response channel with a ^second impulse response, -2, -1, 0, +1 and +2 (or,
-2c, -c, 0, + c, and + 2c).

According to the present invention, since the equalization error of the waveform equalized signal of the waveform equalizer can be reduced by the above configuration, the decoding error rate due to the non-linear waveform distortion included in the reproduced signal waveform is reduced. can do.

Further, since the correction coefficient is determined according to the equalization error of the waveform equalized signal output from the waveform equalizer, the correction coefficient can be determined by learning.

In the present invention, the correction means includes:
Adding means for adding the first correction coefficient to the reproduced signal or the previous digital signal to correct the reproduced signal or the digital signal; and an equalizer for each of the waveform equalized signals sequentially output from the waveform equalizer. An equalization error estimating unit for estimating an equalization error, and, for a plurality of waveform equalized signals sequentially output from the waveform equalizer, an equalization error of each of the waveform equalized signals estimated by the equalization error estimating unit. And a first correction coefficient calculating means for calculating the first correction coefficient that substantially minimizes the sum of squares of the first and second correction coefficients.

In this case, the DC signal component of the reproduced signal, which is generated by the shift of the center of the reproduced signal waveform (corresponding to the reproduced signal corresponding to the bias magnetic field HB in FIG. 8), is included in the waveform distortion of the reproduced signal. Can be suppressed.

Further, in the present invention, the correction means includes:
When the reproduced signal or the digital signal has a predetermined one of positive and negative signs, the signal obtained by multiplying a value obtained by raising the signal to the nth power by the second correction coefficient is used as the reproduced signal or Multiplying means for correcting the digital signal, equalization error estimating means for estimating an equalization error of a waveform equalized signal sequentially output from the waveform equalizer, and a plurality of sequentially output waveform equalizers For the waveform equalized signal, a second correction coefficient for calculating the second correction coefficient for substantially minimizing the sum of squares of the equalization errors of each of the waveform equalized signals estimated by the equalization error estimating means. And arithmetic means.

In this case, the upper and lower asymmetric waveform components of the reproduced signal waveform due to the difference in the polarity (sign) of the magnetic information caused by the characteristics of the head (in FIG. 8, the difference between the A portion and the B portion of the reproduced signal). (Corresponding to a difference in shape).

Further, in the present invention, the correction means includes an addition means for adding the first correction coefficient to the digital signal, and the digital signal has one of a predetermined positive and negative sign. In some cases, multiplying means for multiplying a value obtained by raising the signal to the nth power by a second correction coefficient, and when the digital signal has the one sign, the addition result by the adding means and Adding the result of the multiplication by the multiplication means and sending the result to the waveform equalizer, and selecting the result of addition by the addition means to the waveform equalizer when the result has the other sign. Means, an equalization error estimating means for estimating an equalization error of a waveform equalization signal sequentially output from the waveform equalizer, and a plurality of waveform equalization signals sequentially output from the waveform equalizer, Equalization error estimation Estimated in section, a first correction coefficient calculating means for calculating said first said correction coefficient to substantially minimize the sum of the squares of the equalization error of the waveform equalization signal respectively,
For the plurality of waveform equalized signals sequentially output from the waveform equalizer, the second which minimizes the sum of squares of the equalization errors of each of the waveform equalized signals estimated by the equalization error estimating means. And a second correction coefficient calculating means for calculating the correction coefficient.

In this case, of the distortion of the reproduced signal, the DC signal component of the reproduced signal caused by the shift of the center of the reproduced signal waveform and the head characteristics,
Both the upper and lower asymmetric waveform components of the reproduced signal waveform due to the difference in the polarity (sign) of the magnetic information can be suppressed.

[0041]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below.

FIG. 1 is a block diagram showing the configuration of a magnetic information recording / reproducing apparatus according to an embodiment of the present invention, and FIG. 2 is an enlarged block diagram of a portion A shown in FIG.

The magnetic recording information reproducing apparatus 10 of the present embodiment
As shown in FIG. 1, a magnetic disk 11, a read head 12, a write head 13, a preamplifier 14
, An amplifier 15, a digital signal decoding device 16, and an error correction circuit 17.

The magnetic disk 11 is a medium on which magnetic information having binary codes of 1 and 0 (or -a and + a) is recorded.

The read head 12 is a magnetic disk 11
Is read as a reproduction signal. The write head 13 outputs 1 and 0 (or -a and +
a) the write information consisting of the binary code
Write to.

The preamplifier 13 amplifies the reproduced signal output from the head 12. The amplifier 15 amplifies write information sent from a digital signal decoding device 16 described later.

As shown in FIG. 1, the digital signal decoding device 16 includes a filter 18 and an analog / digital converter (A
DC) 19, a waveform equalization circuit 20, a decoding circuit 21,
Voltage controlled oscillator (VCO) 22 and waveform distortion correction circuit 23
And a waveform distortion correction coefficient learning circuit 24 and an encoder 25
And

The filter 18 removes high frequency noise of the reproduction signal sent through the preamplifier 13.

The ADC 19 quantizes the reproduced signal sent via the filter 18 and converts it into a digital signal.

The waveform equalizer 20 equalizes the waveform of the digital signal output from the ADC 19 for decoding by the decoder 21. Here, waveform equalization refers to shaping the amplitude and phase characteristics of a reproduced signal and converting the digital signal converted by the ADC 19 into magnetic information (1 and 0 (or -a and + a) corresponding to the digital signal. ) Means easy identification. Usually, a linear filter called a FIR (Finite impulse response) filter is used for the waveform equalization circuit 20.

The decoding circuit 21 performs Viterbi decoding of the waveform equalized signal output from the waveform equalizing circuit 20 and converts it into a binary code corresponding to the original magnetic information.

The VCO 22 uses the output signal (waveform equalization signal) of the waveform equalization circuit 20 to
0 that determines the operation timing of each part of the clock signal (CL
K) Generate 26.

The waveform distortion correction circuit 23 calculates an AD based on a correction coefficient obtained by a waveform distortion correction coefficient learning circuit 24 described later.
The digital signal output from C19 is corrected. Then, the corrected digital signal is sent to the waveform equalization circuit 20.

As shown in FIG. 2, the waveform distortion correction coefficient learning circuit 24 includes an equalization error estimator 241 and a correction coefficient calculator 2.
42.

The equalization error estimating section 241 includes a waveform equalizing circuit 2
The equalization error of the waveform equalization signal output from 0 is estimated.
Here, the equalization error refers to a waveform equalized signal and a value that the signal should originally take, that is, if the delay period of the delay operator in the magnetic information channel is D, the intersymbol interference is (1-D ) For a magnetic information channel modeled as a partial response channel with an (1 + D) impulse response, -1, 0 and +1 (or
−c, 0 and + c), and the value of the magnetic information channel whose intersymbol interference is modeled as a partial response channel with an impulse response of (1-D) (1 + D) ² . Sometimes -2, -1,
0, +1 and +2 (or -2c, -c, 0, +
c and + 2c) and any one of the five values.

The correction coefficient calculating section 242 calculates a correction coefficient for correcting the waveform distortion of the reproduced signal based on the equalization error estimated by the equalization error estimating section 241.

The encoder 25 writes information sent from a host device 26 such as a personal computer connected to the magnetic information recording / reproducing device 10 of the present embodiment to the magnetic disk 11 as magnetic information, that is, Encode into binary code information of 1 and 0 (or -a and + a). Then, the coded information is sent to the amplifier 15.

The error correction circuit 17 corrects the error of the binary code Viterbi-decoded by the decoding circuit 21 and sends the result to the host device 26.

The magnetic information recording / reproducing apparatus 10 shown in FIG.
When writing magnetic information on the magnetic disk 11, first, the information sent from the host device 26 is encoded by the encoder 25 into information to be written on the magnetic disk 11 as magnetic information.

Next, the encoded information is transmitted to the amplifier 15.
Then, the data is written on the magnetic disk 11 by the write head 13.

On the other hand, when reading the magnetic information written on the magnetic disk 11, first, the read head 12 reads the magnetic information on the magnetic disk 11 as a reproduction signal.

Next, the high-frequency noise of the reproduction signal output from the read head 12 is removed by passing through the filter 18, and the reproduction signal is converted into a digital signal by the ADC 19.

Then, the waveform distortion correction circuit 23
The digital signal output from C19 is corrected by the correction coefficient obtained by the waveform distortion correction coefficient learning circuit 24.
The waveform is equalized by the waveform equalization circuit 20.

Then, after the waveform equalization signal output from the waveform equalization circuit 20 is Viterbi-decoded by the decoding circuit 21, a code error is corrected by the error correction circuit 17 and the result is sent to the host device 26.

Next, the waveform distortion correction circuit 23 shown in FIG.
The waveform distortion correction coefficient learning circuit 24 will be described in detail.

As described above, in the read head 12 having the response characteristics shown in FIG. 8, when a constant bias magnetic field HB is applied to the read head 12 and the amplitude of the magnetic field on the magnetic disk 11 is H0. In this case, the reproduced signal waveform of the head with respect to an input magnetic field having a vertically symmetric waveform without nonlinear waveform distortion becomes a waveform subjected to vertically asymmetric nonlinear distortion.

The waveform distortion included in the reproduced signal is amplified in the waveform equalization process in the waveform equalization circuit 20.
The equalization error increases, and as a result, errors in the decoding result increase.

Therefore, in the present embodiment, the waveform distortion included in the reproduction signal waveform of the read head 12 is corrected by the waveform distortion correction circuit 23 and the waveform distortion correction coefficient learning circuit 24, so that the linearity of the reproduction signal is improved. I try to improve.

Here, the principle of the waveform distortion correction of the present embodiment will be described.

In this embodiment, the correction of the waveform distortion included in the reproduced signal is performed in the following manner.

Output signal (digital signal) of ADC 19
, A correction coefficient c for reducing the equalization error is added. By doing so, the DC signal component of the reproduction signal generated by the shift of the center of the reproduction signal waveform of the read head 12 (corresponding to the reproduction signal corresponding to the bias magnetic field HB in FIG. 8) is corrected.

Output signal (digital signal) of ADC 19
Has a predetermined positive or negative sign, a value obtained by raising the signal to the nth power is multiplied by a correction coefficient k for reducing the equalization error. By doing so, the upper and lower asymmetric waveform components of the reproduced signal waveform due to the difference in the sign of the magnetic information generated by the read head 12 (FIG. 8)
In this case, the difference between the shape of the portion A and the shape of the portion B of the reproduced signal is corrected).

The above-mentioned n is usually 1 or 2. That is, the function of correcting the upper and lower asymmetric waveform components of the reproduced signal waveform is usually sufficient if it is a first-order or second-order function. It is preferable that the sign of the digital signal to be multiplied by the correction coefficient k is corrected, as much as possible, to the sign with the larger waveform distortion (the digital signal on the A side in FIG. 8).
However, when the correction is performed using a linear function, the same effect can be obtained by multiplying the digital signal of either the positive or negative sign by the correction coefficient k.

From the above, assuming that the digital signal output from the ADC 19 is y and the corrected digital signal input to the waveform equalization circuit 20 is z, z is

[0075]

(Equation 1)

Can be represented by Equation 1 shows an example in which, when the digital signal y has a positive sign, a value obtained by raising the digital signal y to the nth power is multiplied by a correction coefficient k.

The filter coefficient (tap coefficient) of the waveform equalization circuit 20 is W, the expected value of the waveform equalization signal of the waveform equalization circuit 20 (the value that the waveform equalization signal should originally take) is a,
Assuming that the equalization error e of the waveform equalization circuit 20 is e,

[0078]

(Equation 2)

Can be represented by

Therefore, the sum of error squares (sum of equalization error squares) J of the f waveform-equalized signals output from the waveform equalization circuit 20 is:

[0081]

(Equation 3)

Is obtained. The correction coefficients c and k may be determined so as to minimize Equation 3 above.

By differentiating Equation 3 with correction coefficients c and k,

[0084]

(Equation 4)

[0085]

(Equation 5)

Is obtained. Here, M is a value determined according to the total number of filter coefficients (the number of taps) of the equalization circuit 20. 2M + 1 corresponds to the total number of filter coefficients.

Since the equalization error sum of squares J is a quadratic function having a downward convex shape, correction coefficients k and c that make Equations 4 and 5 zero, respectively.
Should be obtained.

H sequentially output from the waveform equalizing circuit 20
Expressions (4) and (5) are represented by Δk and Δc, respectively, for (<f) output signals.

[0089]

(Equation 6)

[0090]

(Equation 7)

Is obtained. Here, α is a constant acceleration coefficient. In the present embodiment, the above equation is used for the equalization error of each of h (equal to the number of bits h) waveform equalization signals continuously output from the waveform equalization circuit 20 and estimated by the equalization error estimator 241. 6, Δk and Δc are obtained according to the following equations 8 and 9 that approximate equation 7. Then, the obtained Δk, Δc
Is the change amount for obtaining the correction coefficients k and c that minimize the above equation 3, and the correction coefficients k and c obtained in the previous execution are
And the correction coefficients k and c are updated.

That is, based on the equalization error estimated by the equalization error estimator 241, the correction coefficients k and c for minimizing Equation 3 are learned.

[0093]

(Equation 8)

[0094]

(Equation 9)

Here, sign (A) means the sign of the value A in parentheses.

The filter coefficient W may be given in advance as a fixed value, or may be obtained by learning the filter coefficient W at the same time as learning the correction coefficients k and c. Further, the learning of the filter coefficient W and the learning of the correction coefficients k and c may be performed independently. The filter coefficient W is derived by finding W that minimizes Equation 3.

Next, a waveform distortion correction circuit and a waveform distortion correction coefficient learning circuit to which the above principle is applied will be described.

FIG. 3 shows a waveform equalization circuit (FIR filter) waveform distortion correction circuit and a waveform distortion correction coefficient learning circuit when a first-order function (n = 1 in equation 1) is used as a correction function for nonlinear waveform distortion. It is the figure which showed the detail.

The FIR filter 20 includes a waveform distortion correction circuit 2
The digital signal z after the waveform distortion correction output from 3a is
The delay elements (D) 221A to 221D delay one clock at a time. Then, the outputs of the delay elements 221A to 221D are multiplied by the filter coefficients W stored in the corresponding registers 420A to 420D by the multipliers 222A to 222D, and then the sum of them is calculated by the adder 224. A waveform equalization signal 374 is output.

The waveform distortion correction circuit 23a uses the correction coefficients k and c obtained by the waveform distortion correction coefficient learning circuit 24a to calculate the AD.
The waveform distortion included in the digital signal y output from C19 is corrected.

The level determiner 312 determines whether the digital signal y output from the ADC 19 is positive or negative, and sends the result to a selector (SEL) 314.

The multiplier 316 calculates the product ky of the correction coefficient k obtained by the waveform distortion correction coefficient learning circuit 24a and the digital signal y.
Is calculated.

The selector 314 selects the output of the multiplier 316 only when the digital signal is either positive or negative according to the output of the level determiner 312, and outputs 0 in the other case. The output of the selector 314 is added to the digital signal y by the adder 330.

The adder 340 outputs the output of the adder 330
The correction coefficient c obtained by the waveform distortion correction coefficient learning circuit 24a is added.

The waveform distortion correction circuit 23a shown in FIG. 3 has the above-described configuration to correct the waveform distortion represented by Equation 1 (where n =
1) is executed. The reproduction signal z whose waveform distortion has been corrected is
The waveform is sent to the waveform equalization circuit 20.

First, the waveform distortion correction coefficient learning circuit 24a
The expected value of the waveform equalization signal 374 of the waveform equalization circuit 20 is estimated by the level determiner 360. And expected value 37
6 is output.

For example, a magnetic information channel (means a transmission path from when magnetic information is read out as a reproduction signal by the read head 12 to the decoding circuit 21)
If the delay period of the delay operator in D is D, the intersymbol interference is a magnetic information channel modeled as a partial response channel having an impulse response of (1-D) (1 + D). Signal 374 is-
It is determined which of the three values 1, 0 and +1 (or -c, 0 and + c) is closest to the three values.

The intersymbol interference is (1-D) (1 + D)
^For a magnetic information channel modeled as a partial response channel with an impulse response of ² , the waveform equalization signal 374 has -2, -1, 0, +1 and +2 (or -2c, -c, 0). + C and +2
It is determined which of the five values of c) is closest to.

The subtractor 362 calculates the difference between the waveform equalized signal 374 and the expected value of the waveform equalized signal 374 determined by the level determiner 360. Normally, correction coefficients k and c are given initial values to registers 318 and 338 described later so that the bit error rate before learning is started is sufficiently low. Signal 37
4 and the expected value 376 can be approximately treated as an equalization error e.

The level determiners 350A to 350D determine whether the output signals of the corresponding delay circuits 221A to 221D are positive or negative.

The selectors (SEL) 352A to 352D are
Only when the output of each of level determiners 350A to 350D has one of the positive and negative signs, the corresponding multiplier 222A
The result of multiplication at .about.222D is output, and 0 is output for the other sign.

The adder 354 includes selectors 352A to 352.
Calculate the sum of the outputs of D.

The sign determiner 356 determines the sign of the output of the adder 354, that is, the sum of the outputs of the selectors 352A to 352D.

Multiplier 364 calculates the product of the sign determined by sign determiner 356 and the output (equalization error e) of subtractor 362 (actually, conversion of the sign of equalization error e).

The accumulator (ACC) 380 includes a multiplier 364
, The sum of h multiplication results output continuously from is calculated.

The divider 430 divides the sum obtained by the accumulator 380 by a certain acceleration constant (the reciprocal of -α shown in the equation 8) (actually, it is performed by a bit shift operation). Thus, the amount of change Δk of the correction coefficient k shown in Expression 8 is obtained.

The adder 400 updates the correction coefficient k by adding the variation Δk obtained by the accumulator 380 to the correction coefficient k stored in the register 318. Then, the updated correction coefficient k is stored in the register 318.

The register 372 stores the sign sign (ΣWi) of the sum ΣWi of the filter coefficients W of the waveform equalization circuit 20.

Multiplier 370 calculates the product (actually, equalization error e) of the sign (ΣWi) of the sum of filter coefficients W stored in register 372 and the output (equalization error e) of subtractor 362. Sign conversion) is calculated.

The accumulator (ACC) 390 includes a multiplier 370
, The sum of h multiplication results output continuously from is calculated.

The divider 432 divides the sum obtained by the accumulator 390 by a constant acceleration constant (the reciprocal of -α shown in the equation 8) (actually, it is performed by a bit shift operation). Thus, the amount of change Δc of the correction coefficient c shown in Expression 9 is obtained.

The adder 410 updates the correction coefficient c by adding the variation Δc obtained by the accumulator 390 to the correction coefficient c stored in the register 338. Then, the updated correction coefficient c is stored in the register 338.

The waveform distortion correction coefficient learning circuit 24a shown in FIG.
Calculates Δk and Δc for the equalization error e of the h waveform equalized signals 374 continuously output from the waveform equalizing circuit 20 according to the above equations 8 and 9 by the above configuration. The registers 318 and 3
The correction coefficients k and c stored in 38 are updated.

FIG. 4 is a waveform equalization circuit (FIR filter), a waveform distortion correction circuit, and a waveform distortion correction coefficient learning circuit when a quadratic function (n = 2 in Equation 1) is used as a correction function for nonlinear waveform distortion. FIG.

In FIG. 4, the difference from the one shown in FIG. 3 is that the waveform distortion correction circuit 23a is used instead of the waveform distortion correction circuit 23a.
b is provided. Other configurations are the same as those shown in FIG.

The waveform distortion correction circuit 23b shown in FIG.
Has a configuration in which a multiplier 440 is added to the waveform distortion correction circuit 23a shown in FIG. The multiplier 440 outputs the ADC1
9 to calculate the square y ² of the output signal y. The output y ² of the multiplier 440 is multiplied by the correction coefficient k stored in the register 318 by the multiplier 316 (ky ² ).
14 is sent.

To increase the order of the correction function of the upper and lower asymmetric waveform components of the reproduced signal waveform, for example, a multiplier 440
May be increased and these may be connected in series.

As described above, in the present embodiment, the waveform distortion correction circuit 23 and the waveform distortion correction coefficient learning circuit 24 having the above configurations equalize each of the waveform equalized signals sequentially output from the waveform equalization circuit 20. An error is estimated, a correction coefficient c that substantially minimizes the sum of squares of the equalization error is calculated, and the correction coefficient c is added to the digital signal y of the ADC 19 (y + c).

By doing so, the DC signal component of the reproduced signal caused by the shift of the center of the reproduced signal waveform (corresponding to the reproduced signal corresponding to the bias magnetic field HB in FIG. 8) out of the waveform distortion of the reproduced signal. Can be suppressed.

Further, in the present embodiment, the waveform distortion correction circuit 23 and the waveform distortion correction coefficient learning circuit 24 having the above-described configurations are used to calculate the square of the equalization error of each of the waveform equalization signals sequentially output from the waveform equalization circuit 20. Correction coefficient k that minimizes the sum
And calculates the correction coefficient k as a digital signal y output from the ADC 19 and having one of the positive and negative signs.
Is multiplied by the value raised to the n-th power (ky ⁿ ).

By doing so, the upper and lower asymmetric waveform components of the reproduced signal waveform due to the difference in the sign of the magnetic information (in FIG. 8, the difference in the shape between the portion A and the portion B in the reproduced signal corresponds). Can be suppressed.

Therefore, according to the present embodiment, it is possible to reduce the decoding error rate in the decoding circuit 21 caused by the non-linear waveform distortion included in the reproduced signal waveform.

Note that the present invention is not limited to the above embodiment, and various modifications can be made within the scope of the invention.

For example, in the above embodiment, a multiplier (multiplier 316 in FIG. 3, and a multiplier 316 in FIG. 4) converts the digital signal y output from the ADC 19 having one of the positive and negative signs as the waveform correction circuit 23. Vessels 316, 4
40), the value obtained by multiplying the value obtained by raising the digital signal y to the n-th power by the correction coefficient k has been described.

However, the present invention is not limited to this. For example, a table showing the relationship between a digital signal y having one of the positive and negative signs of the ADC 19, a correction coefficient k, and an operation value obtained by multiplying a value obtained by raising the digital signal y to the nth power by the correction coefficient k is stored in a memory or the like. In the case where the digital signal y of the ADC 19 has the one sign, the calculated value corresponding to the digital signal y and the correction coefficient k obtained by the waveform distortion correction coefficient learning circuit 24 is stored in advance. May be retrieved from the table and output.

In the above embodiment, the ADC is calculated using the correction coefficients k and c obtained by the waveform distortion correction coefficient learning circuit 24.
The one that corrects 19 digital signals has been described.

However, the present invention is not limited to this. The signal at the stage before being converted into a digital signal by the ADC 19, that is, the analog reproduced signal is
The correction may be performed using the correction coefficients k and c obtained by the waveform distortion correction coefficient learning circuit 24.

FIG. 5 is a diagram for explaining a modification of the magnetic information recording / reproducing apparatus of this embodiment shown in FIG. 1, and shows a magnetic information channel (magnetic information is reproduced by the read head 12 by the read head 12) in the magnetic recording information reproducing apparatus. (The transmission path from the readout to the decoding circuit 21). In this modification, the configuration other than the configuration shown in FIG. 5 is the same as that shown in FIG.

The difference between the modification shown in FIG. 5 and the magnetic information recording / reproducing apparatus 10 of the present embodiment shown in FIG.
9 is provided with a waveform distortion correction filter 27 for correcting a reproduction signal (analog signal) of the read head 12 instead of the waveform distortion correction circuit 23 for correcting the digital signal of No. 9.

The waveform distortion correction filter 27 has a filter function represented by Equation 1. In this case, y shown in Equation 1 is the read head 12 sent through the preamplifier 14.
, And z corresponds to the output of the waveform distortion correction filter 27. The output z is input to the filter 18.

Also in the modification shown in FIG. 5, the DC signal component of the reproduced signal, which is caused by the displacement of the center of the reproduced signal waveform among the waveform distortion of the reproduced signal, can be suppressed. , The upper and lower asymmetric waveform components of the reproduced signal waveform can be suppressed. In FIG. 5, the waveform distortion correction filter 27 and the filter 18 may be configured by one filter.

In the above embodiment, the correction coefficient k,
Although the correction using both c is described, the waveform distortion included in the reproduced signal can be corrected even when the correction is performed using one of the correction coefficients k and c.

Further, in the above embodiment, the magnetic information recording / reproducing apparatus has been described. However, the present invention can be similarly applied to a magnetic information reproducing apparatus dedicated to reproduction.

Finally, the hardware configuration of the magnetic information recording / reproducing apparatus of this embodiment shown in FIG. 1 will be described.

FIG. 6 is a hardware configuration diagram of the magnetic information recording / reproducing apparatus shown in FIG. 1. FIG. 6 (a) is a front view of the magnetic information recording / reproducing apparatus, and FIG. It is a figure of an electronic circuit part.

As shown in FIG. 6A, the magnetic disk device includes a magnetic disk 11, a spindle motor 28 for rotating the magnetic disk 11, and a head 29 (read head) for reading and writing data from the magnetic disk 11. 12 and a write head 13), an arm 30 supporting a head 29, a voice coil motor (VCM) 31 for moving the head 29, and a head 2
The read / write amplifier 32 (FIG. 1)
Corresponding to the preamplifier 14 and the amplifier 15).

Further, as shown in FIG. 6B, the electronic circuit section of the magnetic information recording / reproducing apparatus has the host device 2 shown in FIG.
6, a connector 33 for controlling input / output of the connector 33, a hard disk controller 35 for controlling data transfer and format, a microcomputer 36, a digital signal decoding device 16 (see FIG. 1). (Including an error correction circuit 17 shown), a spindle control circuit 37 for controlling the spindle motor 28, and a voice coil motor control circuit 38 for controlling the voice coil motor 31 are each formed by an IC chip. I have.

In FIG. 6 (b), each component is
Although C chips are assigned, all components may be included in one chip, or may be divided into two or more chips.

[0149]

As described above, according to the present invention,
Learning a correction coefficient so as to minimize an equalization error after waveform equalization caused by nonlinear waveform distortion included in a reproduction signal, and correcting the reproduction signal or the quantized reproduction signal with the learned correction coefficient. Accordingly, decoding errors in the decoding circuit can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a magnetic information recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is an enlarged block diagram of a portion A shown in FIG.

FIG. 3 is a diagram illustrating details of a waveform equalization circuit, a waveform distortion correction circuit, and a waveform distortion correction coefficient learning circuit when a first-order function is used as a correction function for nonlinear waveform distortion.

FIG. 4 is a diagram illustrating details of a waveform equalization circuit, a waveform distortion correction circuit, and a waveform distortion correction coefficient learning circuit when a quadratic function is used as a correction function for nonlinear waveform distortion.

FIG. 5 is a diagram for explaining a modification of the magnetic information recording / reproducing apparatus of the present embodiment shown in FIG. 1;

FIG. 6 is a hardware configuration diagram of the magnetic information recording / reproducing apparatus shown in FIG.

FIG. 7 is a configuration block diagram of a conventional magnetic information reproducing apparatus.

FIG. 8 is a diagram showing a response curve of an MR head (Magneto Resistive).

[Explanation of symbols]

Reference Signs List 10 magnetic information recording / reproducing device 11 magnetic disk 12 read head 13 write head 14 preamplifier 15 amplifier 16 digital signal decoding device 17 error correction circuit 18 filter 19 analog / digital converter 20 waveform equalization circuit 21 decoding circuit 22 voltage controlled oscillator 23, 23a , 23b Waveform distortion correction circuit 24, 24a Waveform distortion correction coefficient learning circuit 25 Encoder 26 Host device 27 Waveform distortion correction filter 28 Spindle motor 29 Head 30 Arm 31 Voice coil motor 32 Read / write amplifier 33 Connector 34 Input / output circuit 35 Hard disk controller 36 Microcomputer 37 Spindle control circuit 38 Voice coil motor control circuit 241 Equalization error estimator 242 Correction coefficient calculator 221A-221D Delay element 222A- 22D, 316,364,370,440
Multipliers 224, 330, 340, 354, 400, 410 Adders 312, 350A to 350D, 360 Level determiners 314, 352A to 352D Selectors 318, 338, 372, 420A to 420D Registers 356 Code discriminators 362 Subtractors 380 , 390 Accumulator 430, 432 Divider

Claims (10)

[Claims] An analog-to-digital converter for sequentially sampling a reproduced signal of magnetic information read from a magnetic recording medium and converting the signal into a digital signal, and equalizing a waveform of the digital signal of the analog-to-digital converter to generate a waveform equalized signal A digital signal decoding device comprising: a waveform equalizer to output; and a decoder to decode a waveform equalized signal of the waveform equalizer, wherein an equalization error of the waveform equalized signal of the waveform equalizer is provided. A digital signal decoding apparatus, comprising: a correction unit that corrects the reproduction signal or the digital signal with a correction coefficient corresponding to the equalization error so as to reduce. 2. The digital signal decoding apparatus according to claim 1, wherein said correction means adds a first correction coefficient to said reproduction signal or previous digital signal to convert said reproduction signal or said digital signal. Adding means for correcting, equalizing error estimating means for estimating an equalization error of each of the waveform equalized signals sequentially output from the waveform equalizer, and a plurality of waveform equalizers sequentially output from the waveform equalizer Signal, estimated by the equalization error estimation means, a first correction coefficient calculation means for calculating the first correction coefficient to substantially minimize the sum of the squares of the equalization error of each waveform equalization signal, A digital signal decoding device, comprising: 3. The digital signal decoding device according to claim 1, wherein the correction means is configured to output the digital signal to the reproduction signal or the digital signal if the reproduction signal or the digital signal has one of predetermined positive and negative signs. Multiplying means for multiplying a value obtained by raising the signal to the nth power by the second correction coefficient to correct the reproduced signal or the digital signal; and equalizing the waveform equalized signal sequentially output from the waveform equalizer Equalization error estimating means for estimating an error, For a plurality of waveform equalized signals sequentially output from the waveform equalizer, the equalization error of each of the waveform equalized signals estimated by the equalization error estimating means is calculated. And a second correction coefficient calculating means for calculating the second correction coefficient for substantially minimizing the sum of squares. 4. The digital signal decoding apparatus according to claim 1, wherein said correction means adds a first correction coefficient to said digital signal, and said digital signal has a predetermined sign. Multiplying means for multiplying a value obtained by raising the signal to the nth power by the second correction coefficient, when the digital signal has the one sign, The result of addition by the adding means and the result of multiplication by the multiplying means are added together and sent to the waveform equalizer. Selecting means for transmitting to the waveform equalizer; equalization error estimating means for estimating an equalization error of a waveform equalized signal sequentially output from the waveform equalizer; and sequentially output from the waveform equalizer. Multiple waveform equalization signals A first correction coefficient calculating unit that calculates the first correction coefficient that substantially minimizes the sum of the squares of the equalization errors of each of the waveform equalized signals, estimated by the equalization error estimation unit, For the plurality of waveform equalized signals sequentially output from the waveform equalizer, the second which minimizes the sum of squares of the equalization errors of each of the waveform equalized signals estimated by the equalization error estimating means. And a second correction coefficient calculating means for calculating the correction coefficient. 5. The digital signal decoding device according to claim 4, wherein said multiplying means includes a digital signal having said one sign, said second correction coefficient, and a digital signal having said one sign. And a calculated value obtained by multiplying a value obtained by multiplying the second correction coefficient by a value raised to the nth power, wherein a digital signal of the analog-to-digital converter has the one sign. A digital signal decoding device for retrieving an operation value corresponding to the value of the digital signal and the value of the second correction coefficient obtained by the second correction coefficient operation means. 6. The digital signal decoding device according to claim 2, wherein said waveform equalizer is a FIR (Finite impulse response).
A filter, wherein the first correction coefficient calculating means, for a plurality of waveform equalized signals sequentially output from the FIR filter, an equalization error of the waveform equalized signal estimated by the equalization error estimating means; A digital signal decoding apparatus, wherein the first correction coefficient is calculated by accumulating a product of a sign of a sum of filter coefficients of the FIR filter and the sign. 7. The digital signal decoding device according to claim 3, wherein the waveform equalizer is a FIR (Finite impulse response).
A filter, the second correction coefficient calculating means, for a plurality of waveform equalized signals sequentially output from the FIR filter, the equalization error of the waveform equalized signal estimated by the equalization error estimating means, Of the digital signal used to generate the waveform equalized signal by the FIR filter, the product of the sign of the sum of the digital signal having the one sign multiplied by the filter coefficient of the FIR filter Wherein the second correction coefficient is calculated by accumulating the second correction coefficient. 8. The digital signal decoding device according to claim 2, wherein the equalization error estimating means includes an expected value calculating means for obtaining an expected value of a waveform equalized signal of the waveform equalizer. A difference calculating means for calculating a difference between the waveform equalized signal of the waveform equalizing means and an expected value of the waveform equalized signal calculated by the expected value calculating means; and a difference calculated by the difference calculating means. Is the equalization error. 9. A digital signal according to claim 1, 2, 3, 4, 5, 6, 7, or 8 wherein: a magnetic recording medium; and reading means for reading magnetic information from the magnetic recording medium to generate a reproduction signal. A magnetic information reproducing device comprising: a decoding device. 10. An analog-to-digital converter for sequentially sampling a reproduced signal of magnetic information read from a magnetic recording medium and converting the signal into a digital signal, and waveform-equalizing the digital signal of the analog-to-digital conversion means to generate a waveform-equalized signal. A digital signal decoding device comprising: a waveform equalizer to be output; and a decoder for decoding a waveform equalized signal of the waveform equalizing means. A reproduced signal of magnetic information for correcting waveform distortion included in the reproduced signal. A method for correcting a waveform distortion of a reproduction signal of magnetic information, wherein the reproduction signal or the digital signal is corrected with a correction coefficient according to an equalization error of the waveform equalization signal. .