JPH10222440A - Data transmission/reception equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To attain the effective utilization of line by reducing overhead and throughput by providing an input address pointer and storing or extracting a header and data while switching a header record in the header area of data buffer and a data record in the data area. SOLUTION: A data buffer 1 is provided with collected header and data areas and the common section of header can be used while being copied. When a transmission request is received, any header area is designated by an address pointer 2, the header is stored in that header record, only the peculiar information such as the header number of the next header is stored in the next header record, and data are stored in the data record of data area while switching the address pointer. At the time of transmission, the leading header is extracted from the header area, data are extracted from the data area, a packet is prepared and transmitted, the next header is extracted, the common part with the preceding header is copied, data are extracted while switching the address pointer, and the packet is prepared.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data transmitting / receiving apparatus for transmitting / receiving a packet composed of a header and data.

[0002]

2. Description of the Related Art Conventionally, a file control apparatus for transferring data is packetized between a host and a terminal on the other side via a line control unit 45 under the configuration shown in FIG. Sending and receiving data. Hereinafter, the configuration and operation of FIG. 8 will be briefly described.

FIG. 8 is an explanatory diagram of the prior art. FIG. 8A shows a system configuration diagram. In FIG. 8A, HOST (1) 41 and HOST (2) 61 provide various services.

[0004] Channels 42 and 62 are for data transfer. The file control devices 43 and 63
D44 and 64 are accessed to store and read data, and are transferred to another host via a line.

[0005] The DASDs 44 and 64 are disk devices and storage devices for randomly accessing data.
The line control devices 45 and 65 are for creating a packet and transmitting the packet to the line, receiving a packet from the line, and the like.

FIG. 8B shows a main part of FIG. 8A. In FIG. 8B, the file control device 43
As shown in the figure, data is read from the DASD 44, divided into data (0), (1),..., And headers (0), (1). (0) record, header (1) record, data (1) record,...
(1)... Are generated. These generated packets (0), (1),... Are converted into line data by a line control function and transmitted. On the receiving side, conversely, the line controller 65 sequentially extracts data from the received packets in the correct order, passes the data to the file controller 63, and
Store in ASD.

[0007]

As described above, the conventional file control device 43 creates a required number of pairs of headers and data as shown in FIG. Request and send to the other party,
Even though most of the header part has the same contents for each packet, it is necessary to create all of them, which increases the overhead (load), reduces the processing speed, and results in the inability to use the line effectively. There was a problem.

When data is divided into a plurality of data blocks and transmitted or received in a plurality of packets, the data is divided and transmitted in pairs with a header.
It is necessary to extract only data from the received packets and combine them, and there is a problem in that the overhead increases due to these processes, the processing speed is reduced, and the line cannot be used effectively.

[0009] The present invention solves these problems,
An input address pointer is provided to switch between a header record in the header area of the data buffer and a data record in the data area to store and retrieve the header and data for transmission / reception, thereby reducing overhead and reducing the amount of processing. The aim is to make effective use of the line.

[0010]

Means for solving the problem will be described with reference to FIGS. 1 and 5. 1 and 5, a data buffer 1 stores a header and data. In this example, a data buffer 1 includes a header area including a plurality of header (0) records, a header (1) record. Data area composed of data (0) record, data (1) record...

When data is stored in the data buffer 1, the input address pointer 2 stores a header (0) record, a header (1) record... In the header area of the data buffer 1 and data ( 0) record,
Data (1) record... Are switched and indicated.

The output address pointer 3 stores a header (0) record, a header (1) record... In the header area of the data buffer 1 and a data (0) record, data ( 1) Record ...
Are switched and pointed out.

The control means 6 performs various controls. Next, the operation will be described. When the control means 6 receives the transmission request, it creates the first header and stores it in the first header record in the header area pointed to by the input address pointer 2, and stores only the unique information of the next header in the next header record. Are sequentially written, and the input address pointer 2 is switched to the data record in the data area for the data requested to be transmitted, and is sequentially stored from the beginning. At the time of transmission, the input address pointer 2 is switched to the header record in the header area and Take out the header, switch to the data record in the data area, take out the first data, make a packet and send it, then switch to the next header record in the header area, take out the next header, and Copy the data, switch to the data record in the data area, and fetch the next data. I have to repeat that you create and submit the door.

When the control means 6 receives a transmission request, it creates a first header, stores it in the first header record in the header area pointed to by the input address pointer 2, and stores the next header record in the next header record. The storage of the unique information of the header and the common information of the head header are copied, and the input address pointer 2 is switched to the data record in the data area for the data requested to be transmitted and stored sequentially from the head. The pointer 2 is switched to the header record in the header area to extract the first header, the data is switched to the data record in the data area, the first data is extracted, a packet is created and transmitted, and then the packet is transferred to the next header record in the header area. Switch to retrieve the next header and switch to the data record in the data area to So that repeated to create and send a packet Eject and.

At this time, in addition to the input address pointer 2, a header record in the header area of the data buffer 1 and an output address pointer 3 for switching and extracting a header and data from the data record in the data area are provided.

The input address pointer 2 is switched to a data record in the data area of the data buffer 1 so that data requested to be transmitted is stored continuously.

When the control means 6 receives the packet, the header of the packet is taken out, the storage and data are taken out from the head of the header record in the header area pointed to by the input address pointer 2, and the input address pointer 2 is taken out.
Is repeated from the beginning of the data record in the data area indicated by, the input address pointer 2 is switched to the data record in the data area, and data is continuously and collectively taken out from the beginning (take out and D
ASD is stored).

At this time, in addition to the input address pointer 2, an output address pointer 3 for switching and extracting data from the data record in the data area of the data buffer 1 is provided.

Therefore, by providing the input address pointer 2 and switching between the header record in the header area of the data buffer 1 and the data record in the data area, storing and retrieving the header and data and transmitting / receiving the data, The overhead (load) can be reduced, the processing amount can be reduced, and the line can be effectively used.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment and operation of the present invention will be described in detail sequentially with reference to FIGS.

FIG. 1 is a block diagram showing one embodiment of the present invention.
In FIG. 1, a data buffer 1 stores a header and data. Here, the data buffer 1 includes a header area including a plurality of header records and a data area including a plurality of data records.

As shown in the figure, the header area includes a header (0) record and a header (1) at a position pointed by the input address pointer 2 from the beginning (a position of a predetermined fixed length jump).
Records are provided in order and the headers are sequentially stored.

As shown in the figure, the data area includes a data (0) record and a data (1) at a position pointed by the input address pointer 2 from the beginning (a position of a predetermined fixed length jump).
Records are sequentially provided to divide and store data. The header (i) record (i = 1, 2,... N) in the header area is associated with the data (i) record in the data area.

The output address pointer 3 is for extracting a header and data from the header record in the header area and the data record in the data area. By providing the output address pointer 3 separately from the input address pointer 2, the input to the data buffer 1 and the output can be operated independently, and high-speed processing can be performed.

The DASD 4 is a disk device and a storage device that can be accessed randomly. This DASD4
, And sends the data to the file control device of the other party.

The file control device 5 is a destination file control device. The file control device 5 has a DASD for storing data. The control means 6 performs various controls. Here, the control means 6 stores a header or data in a header record in the header area of the data buffer 1 pointed to by the input address pointer 2 or a data record in the data area, It performs various controls such as extracting headers and data from a header record in the header area of the data buffer 1 and a data record in the data area indicated by the output address pointer 3 (described later with reference to FIGS. 2 to 4). ).

Input address pointer 11 for header area
Stores an address for inputting a header indicating a header record in the header area of the data buffer 1. The data area input address pointer 12 stores an address for inputting data indicating a data record in the data area of the data buffer 1.

MPX13 is a multiplexer,
One of the addresses of the header area input address pointer 11 and the data area input address pointer 12 is selected and set as the input address pointer 2.

Output address pointer 14 for header area
Stores an address from which data indicating a header record in the header area of the data buffer 1 is extracted. The data area output address pointer 15 stores an address for extracting data indicating a data record in the data area of the data buffer 1.

MPX16 is a multiplexer,
One of the addresses of the header area output address pointer 14 and the data area output address pointer 15 is selected and set as the output address pointer 3.

Next, the operation of the configuration of FIG. 1 will be described in detail according to the order shown in the flowchart of FIG. FIG. 2 is a flowchart illustrating the operation of the present invention.

In FIG. 2, S1 switches to a packet header address pointer (input). This is switched so that the input address pointer 2 in FIG. 1 points to the head of the header record in the header area (MPX1
3 selects the input address pointer 11 for the header area, sets the address to the input address pointer 2, and switches.

In step S2, the header is stored from the start address of the header area. Thereby, as described later with reference to FIG.
The header (0) is stored in the first header (0) record in the header area, and the subsequent header (1) record,
Header (2) Record ... each header (1), (2)
.. Can store unique information (for example, a header number). Note that headers (1), (2),.
In the information common to (n), the common information of the header (0) is copied at the time of transmission in FIG. 4 described later in this embodiment, but the header at the time of S2 is copied in the header area of the data buffer 1. Header (0) record, header (1) record ...
・ Copy common information when storing in (copy)
You may make it.

In step S3, the pointer is switched to the data part address pointer (input) of the packet. This is switched by the input address pointer 2 of FIG. 1 so as to point to the head of the data record in the data area (the MPX 13 selects the data area input address pointer 12 and sets the address to the input address pointer 2 and switches). .

In step S4, data is stored from the start address of the data area. As a result, the data (0) is stored in the first data (0) record in the data area.

In S5, it is determined whether or not a predetermined packet has been stored. If YES, the process ends. If NO, S3 and subsequent steps are repeated to store the data of the next packet.

Through the above steps S1 to S5, when a data transmission request is received, the header is stored in the header record in the header area, and the data is stored continuously in the data record in the data area. Has been completed. At this time, only the first header (0) is created and stored in the first header (0) record in the header area of the data buffer 1, and only the unique information is created for the next header and the header (1) record is created. , Header (2) records..., So that it is not necessary to create common information, and the processing amount can be reduced. Further, the data may be stored continuously in the data record in the data area, and can be stored in the data area of the data buffer 1 with a reduced processing amount.

Next, according to the order shown in FIG.
The creation and storage of the header will be described in detail. FIG. 3 is an explanatory diagram of header creation / storage according to the present invention.

FIG. 3A shows a flow chart of header creation / storage according to the present invention. In FIG. 3A, S2
1 creates a header portion of the packet (0). S22
Stores the header part of the packet (0) in the data buffer. At S21 and S22, as described at the top of the header area of the data buffer 1 in FIG. 3B, the header information (0) is created and the top (header (0) record) of the header area of the data buffer 1 is created. ).

In step S23, only the packet number part is created for the header part of the packet (1). This is the packet (1)
For example, only the packet number portion is created as unique information of the packet (other portions are common information. In this embodiment, the common information extracted from the packet (0) in S35 of FIG. Copy to 1)).

In step S24, the header of the packet (1) is stored in the data buffer (the header (1) record in the header area of the data buffer 1). In S25, it is determined whether or not a predetermined packet has been stored. If YES, the process ends. In the case of NO, the process returns to S23 and repeats for the header part of the next packet.

FIG. 3B shows an example of the detailed contents of the header area. In FIG. 3B, the following information shown in the figure is stored in the packet (0) part (header (0) record).

Header information (0) = header number 00 Header information (1) = destination address Similarly, the information shown in the drawing is stored for the next packet (1) (header (1) record). I do.

As described above, the header (0) of the packet is created and stored in the header (0) record at the head of the header area of the data buffer 1, and the next header (1),
For (2),..., Unique information (for example, a header number) is created and set in the header (1) record, the header (2) record..., And in this embodiment, common information is left blank ( At the time of transmission, common information is extracted from header (0) and copied.

FIG. 4 is a flow chart showing a header copying process according to the present invention. In FIG. 4, S31 takes out the header part of the packet (0). In step S32, a packet (0) is created and transmitted.

In a step S33, it is determined whether or not a predetermined packet has been processed. If YES, the process ends. In the case of NO, the process proceeds to S34. In step S34, the header of the packet (1) is extracted.

A step S35 copies the common part from the packet (0) to the packet (1). Thus, in each of the headers for which only the unique information (for example, the header number) is set for the headers (1), (2),... In the flowchart of FIG. It is possible to retrieve and set, create a complete header and send it. Then, the process is repeated for the next packet in S32.

As described above, only the header (0) is completely created for the header, and the header (1),
(2) It is possible to set only unique information, copy and transmit common information at the time of transmission, reduce the processing amount of header creation and storage as a whole, and reduce overhead. Become.

Next, the case of receiving a packet will be described in detail with reference to FIGS. FIG. 5 shows another embodiment of the present invention (at the time of reception). The configuration at the time of reception in FIG. 5 is different from the configuration at the time of transmission in FIG. 1 in that a packet is received from the file control device 5 on the other end, stored in the data buffer 1, and the data is collectively stored in the DASD 4. This is the case where the packet flow is reversed.

In FIG. 5, the data buffer 1 stores a header and data, and here is composed of a header area and a data area.
The header area includes a header (0) record, a header (1) record at a position (a predetermined fixed-length jump position) pointed to by the input address pointer 2 from the top as shown in the figure.
..Header (n) records include headers (0), (1)
... (N) are stored.

As shown in the figure, the data area includes a data (0) record and a data (1) at the position pointed to by the input address pointer 2 from the beginning (position of a predetermined fixed length jump).
Record... Data (n) This area stores data (0), (1)... (N) in a record. The header (i) record in the header area (i = 1, 2,...)
n) is associated with the data (i) record in the data area.

The output address pointer 3 is for extracting a header and data from the header record in the header area and the data record in the data area.
By providing the output address pointer 3 separately from the input address pointer 2, the input to the data buffer 1
Output can be made independent, and high-speed processing can be performed.

The DASD 4 is a disk device and a storage medium that can be accessed randomly. This DASD4
, The data transmitted from the file control device 5 on the other side is extracted and stored.

The file control device 5 is a transmission source file control device of the other party. The file control device 5 has a DASD for storing data. Control means 6
Performs various controls. Here, the header and data extracted from the received packet are stored in the header record in the header area of the data buffer 1 or the data record in the data area indicated by the input address pointer 2. And performs various controls such as collectively extracting data from a data record in the data area of the data buffer 1 indicated by the output address pointer 3 and storing the data in the DASD 4 (described later with reference to FIG. 6).

Input address pointer 11 for header area
Stores an address for inputting a header indicating a header record in the header area of the data buffer 1. The data area input address pointer 12 stores an address for inputting data indicating a data record in the data area of the data buffer 1.

MPX13 is a multiplexer,
One of the addresses of the header area input address pointer 11 and the data area input address pointer 12 is selected and set as the input address pointer 2.

Output address pointer 14 for header area
Stores an address from which data indicating a header record in the header area of the data buffer 1 is extracted. The data area output address pointer 15 stores an address for extracting data indicating a data record in the data area of the data buffer 1.

MPX16 is a multiplexer,
One of the addresses of the header area output address pointer 14 and the data area output address pointer 15 is selected and set as the output address pointer 3.

Next, the operation of the configuration of FIG. 5 will be described in detail according to the order shown in the flowchart of FIG. FIG. 6 is a flowchart illustrating another operation of the present invention.

In FIG. 6, in step S40, the line control device receives a packet. In step S41, the file control device is in a reception waiting state. In S42, switching is made to the header address pointer (input) of the packet. This is shown in FIG.
Is switched so as to point to the head of the header record in the header area by the input address pointer 2 (MPX13).
The input address pointer 11 for the header area is selected, and the address is set to the input address pointer 2 for switching.

In step S43, the header is stored from the start address of the header area. As a result, the header (0) is stored in the header (0) record at the head of the header area, and the header (1) is sequentially stored in the header (1) record from the head in the second time.

In step S44, switching is made to the data part address pointer (input) of the packet. This is switched by the input address pointer 2 of FIG. 5 so as to point to the head of the data record in the data area (the MPX 13 selects the data area input address pointer 12 and sets the address to the input address pointer 2 and switches). .

In step S45, data is stored from the start address of the data area. As a result, the data (0) is stored in the first data (0) record in the data area, and the data (1) is sequentially stored in the data (1) record from the top in the second time.

In step S46, it is determined whether a predetermined number of packets have been received. If YES, the process ends. In the case of NO, the process returns to S41 and is repeated. S41 to S46 above
Thus, it becomes possible to pack the header and data from the received packet sequentially from the first header record in the header area and sequentially from the first data record in the data area and store them.

In step S47, switching is made to the data part address pointer (output) of the packet. This is switched by the output address pointer 3 in FIG. 5 so as to point to the first data record in the data area (the MPX 16 selects the data area output address pointer 15 and sets the address to the output address pointer 3 and switches). .

In step S48, data is extracted from the start address of the data area. A step S49 stores the data in the DASD. By these S48 and S49, data can be continuously and collectively extracted from the first data record in the data area of the data buffer 1 in FIG.

By the above steps S47 to S49,
When the packet is received, since the data is packed from the first data record in the data area of the data buffer 1 and stored, it is read continuously and the DASD4 is read.
, Can be processed at high speed, and overhead (load) can be reduced.

FIG. 7 shows a system configuration diagram of the present invention.
This is a specific system configuration of the configurations in FIGS. 1 and 5. FIG. 7A shows an overall system configuration diagram.

In FIG. 7A, HOST (1) 2
1. The HOST (2) 31 provides various services. Channels 22 and 32 perform data transfer.

The file controllers 23 and 33 are DASD
24 and 34 are accessed to store and read data, and are transferred to another host via a line.

The DASDs 24 and 34 are disk devices and storage devices for randomly accessing data.
The line control devices 25 and 35 are for creating a packet and transmitting it to the line, receiving a packet from the line, and the like.

FIG. 7B shows a main part according to the present invention. In FIG. 7B, the file control device 33
As shown, data is read from the DASD 34, and the header (0) record, the header (1) record, and the header (0) in the header area pointed to by the input address pointer 2 (not shown) in the data buffer 1 as described above. 2)
Records have headers (0), (1), (2) ...
Is switched to data (0) record, data (1) record, data (2) record... In the data area pointed to by the storage and input address pointer 2, and data (0), (1), (2) .. Are stored. The header and data sequentially stored in the header area and the data area of the data buffer 1 are divided into a packet (0) by the header (0) and the data (0) as shown in the figure.
Generate The generated packets (0), (1),
(2) ... is converted into line data by the line control function and transmitted. On the receiving side, conversely, data is collectively stored in the DASD 34 by the configuration and procedure of FIGS. 5 and 6 described above by the line control device and the file control device.

[0073]

As described above, according to the present invention,
When a transmission request is received, the first header is created, stored in the first header record in the header area pointed to by the input address pointer 2, sequentially writes only the unique information in the next header record, and receives the transmission request. For data, the input address pointer 2 is switched to the data record in the data area and stored sequentially from the beginning, and at the time of transmission, the input address pointer 2 is switched to the header record in the header area to extract the first header and the data record in the data area. Switch to, take out the first data, create and send a packet, switch to the next header record in the header area, take out the next header, copy the common part of the first header, and copy the next data record in the data area Switch to, take out the next data, create a packet and send it Since any configuration is adopted, the input address pointer 2 is provided so that the header record in the header area of the data buffer 1 and the data record in the data area can be switched and transmitted / received, thereby reducing the processing amount and the overhead (load). Can be reduced. By these, (1)
Since the beginning of the packet header is created, only the unique information of the subsequent header is created, and the common information is copied and transmitted, the processing of header creation is reduced, the overhead is reduced, the processing speed is increased, and It can be used effectively.

(2) Since the header of the packet header is created, only the unique information of the subsequent header is created, and the common part of the header is copied and transmitted, so the header creation processing is reduced and the overhead is reduced. It is possible to reduce the processing speed and increase the processing speed so that the line can be used effectively.

(3) Since the input address pointer 2 and the output address pointer 3 are provided separately, the input and output to the data buffer 1 are independently processed to speed up the transmission processing and to effectively use the line. Becomes possible.

(4) Since data is continuously packed and stored in the data record in the data area of the data buffer 1 at the time of transmission request, the data is transferred at high speed during transmission to reduce overhead and increase processing speed. The line can be used effectively.

(5) Since the data is continuously packed and stored in the data record in the data area of the data buffer 1 at the time of reception, the data received from the data area of the data buffer 1 is transferred to DASD or the like. , Data can be transferred at high speed continuously, and overhead can be reduced.

(6) Since the input address pointer 2 and the output address pointer 3 are provided separately, the input and output to the data buffer 1 are processed independently to speed up the reception process and effectively use the line. Becomes possible.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of one embodiment of the present invention.

FIG. 2 is a flowchart illustrating the operation of the present invention.

FIG. 3 is an explanatory diagram of header creation / storage according to the present invention.

FIG. 4 is a header copy flowchart of the present invention.

FIG. 5 is a configuration diagram (during reception) of another embodiment of the present invention.

FIG. 6 is a flowchart illustrating another operation of the present invention.

FIG. 7 is a system configuration diagram of the present invention.

FIG. 8 is an explanatory diagram of a conventional technique.

[Explanation of symbols]

 1: data buffer 2: input address pointer 3: output address pointer 4, 24, 34: DASD (disk device) 5: file controller 6: control means 23, 33: file controller 25, 35: line controller

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiromi Sugawara 2-4-1-19 Shin-Yokohama, Kohoku-ku, Yokohama, Kanagawa Prefecture Inside Fujitsu Program Giken Co., Ltd. (72) Hideo Takahashi 2--4, Shin-Yokohama, Kohoku-ku, Yokohama, Kanagawa No. 19 Fujitsu Program Giken Co., Ltd. (72) Inventor Takaaki Yamato 2-19-4, Shin-Yokohama, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture In-Fujitsu Program Giken Co., Ltd. (72) Naomi Fujimoto 2 Shin-Yokohama, Kohoku-ku, Yokohama, Kanagawa No.4-19, Fujitsu Program Giken Co., Ltd. (72) Inventor Shinji Nishiyama 2-4-1-19 Shin-Yokohama, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Fujitsu Program Giken Co., Ltd. (72) Inventor Hideki Yamanaka, Kohoku-ku, Yokohama-shi, Kanagawa 2-4-19 Shin-Yokohama Fujitsu Program Giken Co., Ltd.

Claims (6)

[Claims] 1. A data transmission / reception apparatus for transmitting / receiving a packet composed of a header and data, comprising: a data buffer divided into a header area including a plurality of header records and a data area including a plurality of data records; An address pointer for switching and specifying a header record in the header area of the header area and a data record in the data area; and, when receiving a transmission request, the first header created by the address pointer. In the first header record, only the unique information of the next header is stored in the next header record, and the address pointer is switched to the data record in the data area for the data requested to be transmitted, so that the first data is stored. Means to store the records sequentially, and the above After the address pointer is switched to the header record in the header area and the first header is extracted, the address pointer is switched to the data record in the data area and the first data is extracted to create a packet and transmitted. Switch to the next header record in the header area, retrieve the next header, copy the common part of the first header, switch the address pointer to the data record in the data area, retrieve the next data, and create a packet And a means for transmitting the data. 2. A data transmission / reception apparatus for transmitting / receiving a packet composed of a header and data, comprising: a data buffer divided into a header area including a plurality of header records and a data area including a plurality of data records; An address pointer for switching and specifying a header record in the header area of the header area and a data record in the data area; and, when receiving a transmission request, the first header created by the address pointer. The header information is stored in the first header record, the unique information of the next header is stored in the next header record, and the common information with the first header is copied. Switch to the middle data record and start from the first data record Means for transmitting the address pointer to the header record in the header area at the time of transmission to extract the first header, and then switching the address pointer to the data record in the data area to extract the first data and create a packet. After transmitting the address pointer to the next header record in the header area and extracting the next header, the address pointer is switched to the data record in the data area to extract the next data and fetch the packet. And a means for creating and transmitting the data. 3. A second address for switching and designating a header record in the header area and a data record in the data area of the data buffer separately from the address pointer when extracting a header and data from the data buffer. 3. The data transmitting / receiving device according to claim 1, further comprising a pointer. 4. The data buffer according to claim 1, wherein said address pointer is switched to a data record in a data area of said data buffer to continuously store data requested to be transmitted. Data transmission and reception device. 5. A data transmission / reception device for transmitting / receiving a packet composed of a header and data, comprising: a data buffer divided into a header area composed of a plurality of header records and a data area composed of a plurality of data records; And an address pointer for switching and specifying the header record in the header area and the data record in the data area. When a packet is received, the header of the packet is taken out and the header in the header area specified by the address pointer is taken out. Means for storing from the beginning of the header record, extracting the data of the packet and storing from the beginning of the data record in the data area specified by the address pointer, and switching the address pointer to the data record in the data area. Continuous data from the beginning A data transmission / reception device comprising: 6. The data buffer according to claim 1, further comprising a second address pointer for switching and specifying a data record in said data area of said data buffer in addition to said address pointer when data is taken out from said data buffer. Item 6. The data transmitting / receiving device according to Item 5.