JPH10218276A - Tray for semiconductor device - Google Patents

Tray for semiconductor device

Info

Publication number
JPH10218276A
JPH10218276A JP9018590A JP1859097A JPH10218276A JP H10218276 A JPH10218276 A JP H10218276A JP 9018590 A JP9018590 A JP 9018590A JP 1859097 A JP1859097 A JP 1859097A JP H10218276 A JPH10218276 A JP H10218276A
Authority
JP
Japan
Prior art keywords
semiconductor device
ball
tray
shaped electrode
wall
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9018590A
Other languages
Japanese (ja)
Inventor
Katsuji Kawaguchi
克二 川口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9018590A priority Critical patent/JPH10218276A/en
Publication of JPH10218276A publication Critical patent/JPH10218276A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To obtain a tray for a semiconductor device which can support a ball-grid type semiconductor device without contact with ball type electrodes. SOLUTION: This tray is provided with a plurality of containing pockets 9 formed by the wall 10 and the bottom face 11 surrounded by the wall 10. Semiconductor devices 30 having a plurality of ball type electrodes 3 arranged in rows to form a lattice at the lower face 2a are contained respectively while they are positioned along the wall 10, in the tray for semiconductor devices. Support members 12 are protruded higher than the height of the ball type electrodes 3 at the position avoiding the electrodes on the bottom face 11 to support the semiconductor device 30 at the tops.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は底面に配線用のボ
ール形電極を有するボールグリットアレイ(以下BGA
と略す)形の半導体装置を収納するトレイに係り、特に
収納ポケットの半導体装置を支持する部分の構造に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ball grid array (hereinafter referred to as BGA) having a ball-shaped electrode for wiring on the bottom surface.
The present invention relates to a tray for accommodating semiconductor devices of the abbreviated form, and more particularly to a structure of a portion of a storage pocket for supporting a semiconductor device.

【0002】[0002]

【従来の技術】図8はこの種のBGA形半導体装置の構
成を示す一部断面斜視図、図9はBGA形半導体装置を
収納する従来の半導体装置用トレイの構成を示す斜視
図、図10は図9における収納ポケットの構成を拡大し
て示す断面斜視図、図11は図10の収納ポケットにB
GA形半導体装置を収納した状態を示す部分断面図であ
る。図において、1は封止体2および封止体2の下面2
aにそれぞれx、yの間隙を有し格子状に整列された複
数のボール形電極3で構成されたBGA形半導体装置
(以下半導体装置と略す)、4は半導体装置用トレイの
上面に形成されている複数の収納ポケットで、壁部5お
よび壁部5で囲われた底面6および底面6の周囲にボー
ル形電極3の高さZより高い段差Wを有する段部7とで
形成されている。
2. Description of the Related Art FIG. 8 is a partially sectional perspective view showing the structure of a BGA type semiconductor device of this type, FIG. 9 is a perspective view showing the structure of a conventional semiconductor device tray for accommodating a BGA type semiconductor device, and FIG. FIG. 11 is an enlarged sectional perspective view showing the configuration of the storage pocket in FIG. 9, and FIG.
It is a fragmentary sectional view showing the state where the GA type semiconductor device was stored. In the figure, reference numeral 1 denotes a sealing body 2 and a lower surface 2 of the sealing body 2.
A BGA type semiconductor device (hereinafter abbreviated as a semiconductor device) composed of a plurality of ball-shaped electrodes 3 arranged in a lattice and having gaps of x and y respectively in a is formed on the upper surface of a semiconductor device tray. A plurality of storage pockets, a wall portion 5, a bottom surface 6 surrounded by the wall portion 5, and a step portion 7 having a step W higher than the height Z of the ball-shaped electrode 3 around the bottom surface 6. .

【0003】次に動作について説明する。半導体装置1
をそれぞれ収納ポケット4の壁部5に沿わせて挿入し、
封止体2の下面2aの周縁を収納ポケット4の段部7で
支持することにより半導体装置1は収納ポケット4内に
収納される。そして、この状態でボール電極3の先端は
底面6に接触することなく保持され異物付着等の不具合
が防止される。また、壁部5は半導体装置1挿入時のガ
イドとして機能するとともにトレイ移送時において半導
体装置1が動くことを規制し損傷等の不具合を防止する
役目も果たしている。
Next, the operation will be described. Semiconductor device 1
Are inserted along the wall 5 of the storage pocket 4, respectively.
The semiconductor device 1 is stored in the storage pocket 4 by supporting the periphery of the lower surface 2 a of the sealing body 2 with the step 7 of the storage pocket 4. Then, in this state, the tip of the ball electrode 3 is held without contacting the bottom surface 6, and problems such as adhesion of foreign substances are prevented. Further, the wall portion 5 functions as a guide when the semiconductor device 1 is inserted, and also serves to restrict the movement of the semiconductor device 1 during the transfer of the tray and prevent problems such as damage.

【0004】[0004]

【発明が解決しようとする課題】従来の半導体装置用ト
レイは上記のように構成され、半導体装置1の封止体2
の下面2aの周縁を支持するようにしていたので、近年
小形化を追求したCSP(Chip Size Pac
kage)化による封止体2の極小化に伴いボール形電
極3の間隙x、yを狭めるとともに、支持される封止体
2の下面2a周縁も狭小となり、図12に示すようにC
SP化した半導体装置30では下面2aの周縁に近いボ
ール形電極が段部7に接するような状態となるため、封
止体2を安定して支持することができず半導体装置30
の収納に不具合を生じるという問題点があった。
The conventional semiconductor device tray is constructed as described above, and the sealing body 2 of the semiconductor device 1 is formed.
CSP (Chip Size Pac) pursuing miniaturization in recent years because the periphery of the lower surface 2a of the
12, the gaps x and y between the ball-shaped electrodes 3 are reduced with the miniaturization of the sealing body 2 due to the formation of the sealing body 2, and the periphery of the lower surface 2a of the supported sealing body 2 is also narrowed, as shown in FIG.
In the SP-formed semiconductor device 30, since the ball-shaped electrode near the periphery of the lower surface 2a comes into contact with the stepped portion 7, the semiconductor device 30 cannot stably support the sealing body 2.
However, there is a problem that a problem occurs in the storage of the document.

【0005】この発明は上記のような問題点を解消する
ためになされたもので、CSP化された半導体装置を収
納ポケット内にボール形電極と接することなく安定した
状態で収納できる半導体装置用トレイを得ることを目的
とする。
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and a semiconductor device tray capable of stably storing a CSP-formed semiconductor device in a storage pocket without contacting a ball-shaped electrode. The purpose is to obtain.

【0006】[0006]

【課題を解決するための手段】この発明の請求項1に係
る半導体装置用トレイは、壁部およびこの壁部に囲まれ
た底面とで形成された複数の収納ポケットを備え収納ポ
ケット内に、下面に格子状に整列された複数のボール形
電極を有する半導体装置を壁部で位置を規制してそれぞ
れ収納する半導体装置用トレイにおいて、底面のボール
形電極を避けた位置にボール形電極の高さより高く突出
されその頂部で半導体装置を支持する支持部材を設けた
ものである。
According to a first aspect of the present invention, there is provided a semiconductor device tray including a plurality of storage pockets formed by a wall and a bottom surface surrounded by the wall. In a semiconductor device tray in which a semiconductor device having a plurality of ball-shaped electrodes arranged in a lattice pattern on the lower surface is regulated at a wall portion and accommodated therein, the height of the ball-shaped electrodes is set at a position avoiding the ball-shaped electrodes on the bottom surface. A supporting member that protrudes higher than the upper end and supports the semiconductor device at the top is provided.

【0007】また、この発明の請求項2に係る半導体装
置用トレイは、請求項1において、支持部材を少なくと
も三角状に配置され円錐または角錐状に形成された突出
部で構成したものである。
According to a second aspect of the present invention, there is provided a semiconductor device tray according to the first aspect, wherein the supporting member is constituted by a projection formed at least in a triangular shape and formed in a cone or pyramid shape.

【0008】また、この発明の請求項3に係る半導体装
置用トレイは、請求項1において、支持部材を少なくと
も三角状に配置され頂部にボール形電極を避ける凹部を
有する柱状に形成された突出部で構成したものである。
According to a third aspect of the present invention, there is provided a semiconductor device tray according to the first aspect, wherein the supporting member is formed at least in a triangular shape, and the projection is formed in a column shape having a recess at the top to avoid a ball-shaped electrode. It consists of.

【0009】また、この発明の請求項4に係る半導体装
置用トレイは、請求項1において、支持部材を頂部がナ
イフエッジ状に形成され互いに交差するリブで構成した
ものである。
According to a fourth aspect of the present invention, there is provided a semiconductor device tray according to the first aspect, wherein the supporting member is formed of ribs which are formed in a knife-edge shape at the top and cross each other.

【0010】[0010]

【発明の実施の形態】BEST MODE FOR CARRYING OUT THE INVENTION

実施の形態1.以下、この発明の実施の形態1を図につ
いて説明する。図1はこの発明の実施の形態1による半
導体装置用トレイの構成を示す斜視図、図2は図1にお
ける半導体装置用トレイの収納ポケットの構成を拡大し
て示す断面斜視図である。図において、9は半導体装置
用トレイの上面に形成される複数の収納ポケットで、壁
部10および壁部10で囲われた底面11、および底面
11のボール形電極3を避けた位置に4個配置されボー
ル形電極3の高さZより大なる高さSで円錐状に突出し
て形成された支持部材としての突出部12とで形成され
ている。
Embodiment 1 FIG. Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view showing a configuration of a semiconductor device tray according to a first embodiment of the present invention, and FIG. 2 is an enlarged sectional perspective view showing a configuration of a storage pocket of the semiconductor device tray in FIG. In the drawing, reference numeral 9 denotes a plurality of storage pockets formed on the upper surface of the semiconductor device tray, and four storage pockets at positions avoiding the wall portion 10, the bottom surface 11 surrounded by the wall portion 10, and the ball-shaped electrode 3 on the bottom surface 11. The projection 12 is formed as a support member which is disposed and has a height S larger than the height Z of the ball-shaped electrode 3 and is formed to protrude conically at a height S.

【0011】次に動作について説明する。CSP化され
た半導体装置30がそれぞれ収納ポケット9の壁部10
に沿って挿入されると、ボール形電極3を避けた位置に
配置された4個の突出部12の頂部が、ボール形電極3
と底面11間に間隙を有した状態で封止体2の下面2a
と当接し頂部でBGA形半導体装置30を支持するの
で、トレイの収納ポケット9にCSP化された半導体装
置30を安定して支持し収納できる。なお、図2では突
出部12を4個配置したが、少なくとも3個を三角状に
配置し3点で支持するようにすれば安定した支持が得ら
れることは云うまでもない。また、突出部12は円錐状
のものを示したが、これに限定されるものではなく例え
ば角錐状としてもよい。
Next, the operation will be described. Each of the CSP-formed semiconductor devices 30 is attached to the wall 10 of the storage pocket 9.
When the ball-shaped electrode 3 is inserted along the top of the ball-shaped electrode 3, the tops of the four protrusions 12 arranged at positions avoiding the ball-shaped electrode 3
The lower surface 2a of the sealing body 2 with a gap between
And the BGA type semiconductor device 30 is supported at the top, so that the semiconductor device 30 converted into a CSP can be stably supported and stored in the storage pocket 9 of the tray. In FIG. 2, four protruding portions 12 are arranged. However, if at least three protruding portions 12 are arranged in a triangular shape and supported at three points, it goes without saying that stable support can be obtained. In addition, the projection 12 has a conical shape, but is not limited thereto, and may have a pyramid shape, for example.

【0012】実施の形態2.図3はこの発明の実施の形
態2における半導体装置用トレイの収納ポケットの構成
を示す断面斜視図、図4は図3の線IV−IVに沿った
断面図である。図において、13はトレイの上面に形成
される複数の収納ポケットで、壁部14および壁部14
に囲われた底面15、および底面15のボール形電極3
を避けた位置に4個配置され頂部の中央にボール形電極
3を避ける凹部16aを有しボール形電極3の高さより
高く柱状に突出する支持部材としての突出部16とで形
成されている。
Embodiment 2 FIG. FIG. 3 is a sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray according to a second embodiment of the present invention, and FIG. 4 is a sectional view taken along line IV-IV in FIG. In the figure, reference numeral 13 denotes a plurality of storage pockets formed on the upper surface of the tray,
Bottom surface 15 surrounded by a ball-shaped electrode 3 on the bottom surface 15
And four projections 16 as support members that have a recess 16a at the center of the top to avoid the ball-shaped electrode 3 and protrude in a column shape higher than the height of the ball-shaped electrode 3.

【0013】次に動作について説明する。CSP化され
た半導体装置30がそれぞれ収納ポケット13の壁部1
4に沿って挿入されると、頂部中央の凹部16aでボー
ル形電極3を避けた位置に配置された4個の突出部16
の頂部がボール形電極3と凹部16aの底面との間に間
隙Gを有した状態で封止体2の下面2aと当接し頂部で
半導体装置30を支持するので、トレイの収納ポケット
13にCSP化された半導体装置30を安定して支持し
収納できる。なお、図3では突出部16を4個配置した
が、少なくとも3個を三角状に配置し3点で支持するよ
うにすれば安定した支持が得られることは云うまでもな
い。
Next, the operation will be described. The CSP-formed semiconductor device 30 is mounted on the wall 1 of the storage pocket 13.
4, the four protrusions 16 arranged at positions avoiding the ball-shaped electrode 3 in the recess 16a at the center of the top.
Abuts on the lower surface 2a of the sealing body 2 with the gap G between the ball-shaped electrode 3 and the bottom surface of the concave portion 16a and supports the semiconductor device 30 at the top. The semiconductor device 30 can be stably supported and housed. Although four protrusions 16 are arranged in FIG. 3, it is needless to say that stable support can be obtained if at least three protrusions are arranged in a triangular shape and supported at three points.

【0014】実施の形態3.図5はこの発明の実施の形
態3における半導体装置用トレイの収納ポケットの構成
を示す断面斜視図、図6は図5の線VI−VIに沿った
断面図である。図から明らかなように、上記実施の形態
2では突出部16を頂部の中央にボール形電極3を避け
る凹部16aを有するものとしたがこの実施の形態3で
はボール形電極3を避ける凹部17aが頂部の周囲4個
所に形成された突出部17として4個所の凹部17aで
ボール電極3を避けるようにしたものであり、上記実施
の形態2におけると同様の効果を得るようにしたもので
ある。なお、図5では突出部17を4個配置したが、少
なくとも3個を三角状に配置し3点による支持するよう
にすれば安定した支持が得られることは云うまでもな
い。
Embodiment 3 FIG. 5 is a cross-sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray according to Embodiment 3 of the present invention, and FIG. 6 is a cross-sectional view taken along line VI-VI of FIG. As is apparent from the figure, in the second embodiment, the protrusion 16 has a recess 16a at the center of the top to avoid the ball-shaped electrode 3. However, in the third embodiment, the recess 17a to avoid the ball-shaped electrode 3 is provided. The projections 17 formed at four locations around the top are formed so as to avoid the ball electrode 3 by four recesses 17a, so that the same effect as in the second embodiment can be obtained. Although four protrusions 17 are arranged in FIG. 5, it is needless to say that stable support can be obtained by arranging at least three in a triangular shape and supporting them at three points.

【0015】実施の形態4.図7はこの発明の実施の形
態4における半導体装置用トレイの収納ポケットの構成
を示す断面斜視図である。図において、18はトレイの
上面に形成された複数の収納ポケットで、壁部19およ
び壁部19で囲われた底面20および底面20のボール
形電極3を避けた位置にボール形電極3の高さZより大
なる高さTで頂部をナイフエッジ状に形成して突出し互
いに交差する支持部材としてのリブ21とで形成されて
いる。
Embodiment 4 FIG. 7 is a sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray according to Embodiment 4 of the present invention. In the drawing, reference numeral 18 denotes a plurality of storage pockets formed on the upper surface of the tray, and a wall portion 19, a bottom surface 20 surrounded by the wall portion 19, and a height of the ball-shaped electrode 3 at a position avoiding the ball-shaped electrode 3 on the bottom surface 20. The height is greater than the height Z and the top is formed in a knife-edge shape, and is formed of a rib 21 as a supporting member that protrudes and crosses each other.

【0016】次に動作について説明する。CSP化され
た半導体装置30がそれぞれ収納ポケット18の壁部1
9に沿って挿入されると、ボール形電極3を避けた位置
に配置されたリブ21の頂部がボール形電極3と底面2
0間に間隙を有した状態で封止体2の下面2aと当接し
頂部で半導体装置30を支持するので、トレイの収納ポ
ケット18にCSP化された半導体装置30を安定して
支持し収納できる。
Next, the operation will be described. The CSP-formed semiconductor device 30 is mounted on the wall 1 of the storage pocket 18.
9, the top of the rib 21 disposed at a position avoiding the ball-shaped electrode 3 becomes the ball-shaped electrode 3 and the bottom surface 2.
Since the semiconductor device 30 is supported at the top while being in contact with the lower surface 2a of the sealing body 2 with a gap between 0, the CSP-formed semiconductor device 30 can be stably supported and stored in the storage pocket 18 of the tray. .

【0017】[0017]

【発明の効果】以上のようにこの発明の請求項1によれ
ば、壁部およびこの壁部に囲まれた底面とで形成された
複数の収納ポケットを備え収納ポケット内に、下面に格
子状に整列された複数のボール形電極を有する半導体装
置を壁部で位置を規制してそれぞれ収納する半導体装置
用トレイにおいて、底面のボール形電極を避けた位置に
ボール形電極の高さより高く突出されその頂部で半導体
装置を支持する支持部材を設けたので、CSP化した半
導体装置をボール形電極と接することなく安定して支持
することが可能な半導体装置用トレイを得ることができ
る。
As described above, according to the first aspect of the present invention, there are provided a plurality of storage pockets formed by a wall portion and a bottom surface surrounded by the wall portion. In a semiconductor device tray that stores a semiconductor device having a plurality of ball-shaped electrodes arranged in a row and regulates the position thereof by a wall portion, the semiconductor device is protruded to a position avoiding the ball-shaped electrode on the bottom surface and higher than the height of the ball-shaped electrode. Since a support member for supporting the semiconductor device is provided at the top, a semiconductor device tray capable of stably supporting the CSP-formed semiconductor device without contacting the ball-shaped electrode can be obtained.

【0018】また、この発明の請求項2によれば、請求
項1において、支持部材を少なくとも三角状に配置され
円錐または角錐状に形成された突出部で構成したので、
CSP化した半導体装置をボール形電極を接することな
く安定して支持することが可能な半導体装置用トレイを
得ることができる。
According to a second aspect of the present invention, in the first aspect, the supporting member is constituted by at least a triangularly arranged conical or pyramid-shaped projection.
A semiconductor device tray capable of stably supporting a CSP-formed semiconductor device without contacting a ball-shaped electrode can be obtained.

【0019】また、この発明の請求項3によれば、請求
項1において、支持部材を少なくとも三角状に配置され
頂部にボール形電極を避ける凹部を有する柱状に形成さ
れた突出部で構成したので、CSP化した半導体装置を
ボール形電極と接することなく安定して支持することが
可能な半導体装置用トレイを得ることができる。
According to a third aspect of the present invention, in the first aspect, the supporting member is formed of a columnar projection having at least a triangular shape and a concave portion at the top to avoid a ball-shaped electrode. And a semiconductor device tray capable of stably supporting the CSP-formed semiconductor device without contacting the ball-shaped electrode.

【0020】また、この発明の請求項4によれば、請求
項1において、支持部材を頂部がナイフエッジ状に形成
され互いに交差するリブで構成したので、CSP化した
半導体装置をボール形電極と接することなく安定して支
持することが可能な半導体装置用トレイを得ることがで
きる。
According to a fourth aspect of the present invention, in the first aspect, the support member is formed by ribs having a top formed in a knife-edge shape and intersecting with each other. A tray for a semiconductor device that can be stably supported without contact can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明の実施の形態1における半導体装置
用トレイの構成を示す斜視図である。
FIG. 1 is a perspective view showing a configuration of a semiconductor device tray according to Embodiment 1 of the present invention;

【図2】 図1における半導体装置用トレイの収納ポケ
ットの構成を拡大して示す断面斜視図である。
FIG. 2 is an enlarged sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray in FIG. 1;

【図3】 この発明の実施の形態2における半導体装置
用トレイの収納ポケットの構成を示す断面斜視図であ
る。
FIG. 3 is a sectional perspective view showing a configuration of a storage pocket of a tray for a semiconductor device according to a second embodiment of the present invention.

【図4】 図3における線IV−IVに沿った断面図で
ある。
FIG. 4 is a sectional view taken along line IV-IV in FIG. 3;

【図5】 この発明の実施の形態3における半導体装置
用トレイの収納ポケットの構成を示す断面斜視図であ
る。
FIG. 5 is a sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray according to a third embodiment of the present invention.

【図6】 図5における線VI−VIに沿った断面図で
ある。
FIG. 6 is a sectional view taken along line VI-VI in FIG. 5;

【図7】 この発明の実施の形態4における半導体装置
用トレイの収納ポケットの構成を示す断面斜視図であ
る。
FIG. 7 is a sectional perspective view showing a configuration of a storage pocket of a semiconductor device tray according to a fourth embodiment of the present invention.

【図8】 一般的なBGA形半導体装置の構成を示す一
部断面斜視図である。
FIG. 8 is a partial cross-sectional perspective view showing a configuration of a general BGA type semiconductor device.

【図9】 従来の半導体装置用トレイの構成を示す斜視
図である。
FIG. 9 is a perspective view showing a configuration of a conventional semiconductor device tray.

【図10】 図9における収納ポケットの構成を拡大し
て示す断面斜視図である。
FIG. 10 is an enlarged sectional perspective view showing a configuration of a storage pocket in FIG. 9;

【図11】 図10の収納ポケットに半導体装置を収納
した状態を示す部分断面図である。
11 is a partial cross-sectional view showing a state where the semiconductor device is stored in the storage pocket of FIG.

【図12】 従来の構成における問題点を説明するため
の部分断面図である。
FIG. 12 is a partial cross-sectional view for describing a problem in a conventional configuration.

【符号の説明】[Explanation of symbols]

2 封止体、2a 下面、3 ボール形電極、9,1
3,18 収納ポケット、10,14,19 壁部、1
1,15,20 底面、12,16,17 突出部(支
持部材)、16a,17a 凹部、21 リブ(支持部
材)、30 半導体装置。
2 sealing body, 2a bottom surface, 3 ball-shaped electrode, 9.1
3,18 storage pockets, 10,14,19 wall, 1
1, 15, 20 Bottom surface, 12, 16, 17 Projection portion (support member), 16a, 17a recess portion, 21 rib (support member), 30 semiconductor device.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 壁部およびこの壁部に囲まれた底面とで
形成された複数の収納ポケットを備え上記収納ポケット
内に、下面に格子状に整列された複数のボール形電極を
有する半導体装置を上記壁部で位置を規制してそれぞれ
収納する半導体装置用トレイにおいて、上記底面の上記
ボール形電極を避けた位置に上記ボール形電極の高さよ
り高く突出されその頂部で上記半導体装置を支持する支
持部材を設けたことを特徴とする半導体装置用トレイ。
1. A semiconductor device comprising a plurality of storage pockets formed by a wall and a bottom surface surrounded by the wall, and a plurality of ball-shaped electrodes arranged in a lattice pattern on a lower surface in the storage pocket. In the semiconductor device tray, the position of the ball-shaped electrode is regulated and stored by the wall portion, and the height of the ball-shaped electrode is protruded at a position on the bottom surface avoiding the ball-shaped electrode, and the top supports the semiconductor device. A tray for a semiconductor device, comprising a support member.
【請求項2】 支持部材は少なくとも三角状に配置され
円錐または角錐状に形成された突出部で構成されている
ことを特徴とする請求項1に記載の半導体装置用トレ
イ。
2. The semiconductor device tray according to claim 1, wherein the support member is at least arranged in a triangular shape and is formed of a projection formed in a conical or pyramid shape.
【請求項3】 支持部材は少なくとも三角状に配置され
頂部にボール形電極を避ける凹部を有する柱状に形成さ
れた突出部で構成されていることを特徴とする請求項1
に記載の半導体装置用トレイ。
3. The supporting member according to claim 1, wherein the supporting member is formed of a column-shaped protrusion having a concave portion at least at a top thereof and avoiding a ball-shaped electrode.
4. The semiconductor device tray according to item 1.
【請求項4】 支持部材は頂部がナイフエッジ状に形成
され互いに交差するリブで構成されていることを特徴と
する請求項1に記載の半導体装置用トレイ。
4. The semiconductor device tray according to claim 1, wherein the support member is formed by ribs having a top formed in a knife-edge shape and intersecting with each other.
JP9018590A 1997-01-31 1997-01-31 Tray for semiconductor device Pending JPH10218276A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9018590A JPH10218276A (en) 1997-01-31 1997-01-31 Tray for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9018590A JPH10218276A (en) 1997-01-31 1997-01-31 Tray for semiconductor device

Publications (1)

Publication Number Publication Date
JPH10218276A true JPH10218276A (en) 1998-08-18

Family

ID=11975862

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9018590A Pending JPH10218276A (en) 1997-01-31 1997-01-31 Tray for semiconductor device

Country Status (1)

Country Link
JP (1) JPH10218276A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278518A (en) * 2005-03-28 2006-10-12 Yamaha Corp Chip housing structure
JP2006298397A (en) * 2005-04-18 2006-11-02 Ricoh Co Ltd Housing tray for semiconductor integrated circuit device
JP2012240697A (en) * 2011-05-18 2012-12-10 Mitsubishi Electric Corp Chip tray

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278518A (en) * 2005-03-28 2006-10-12 Yamaha Corp Chip housing structure
JP4506532B2 (en) * 2005-03-28 2010-07-21 ヤマハ株式会社 Chip storage structure
JP2006298397A (en) * 2005-04-18 2006-11-02 Ricoh Co Ltd Housing tray for semiconductor integrated circuit device
JP4694247B2 (en) * 2005-04-18 2011-06-08 株式会社リコー Storage tray for semiconductor integrated circuit device
JP2012240697A (en) * 2011-05-18 2012-12-10 Mitsubishi Electric Corp Chip tray

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