JPH10189656A - Circuit module, circuit board used thereto, and electronic equipment mounted therewith - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a circuit module which is enhanced in wiring density without increasing signal wiring layers in number, simple in structure, and reduced in manufacturing cost. SOLUTION: A circuit module 30 is equipped with a circuit part 31 possessed of a large number of bumps 48 and a circuit board 32 where a large number of pads 42 are arranged in matrix on its surface 32a where the circuit part 31 is mounted. Insulating layers 34a to 34c and signal wiring layers 35a to 35c electrically connected to the pads 42 are alternately laminated to constitute the circuit board 32. The circuit board 32 is provided with an opened recess 38 on its surface, the recess 38 is made to confront the circuit part 31 and formed like a terrace having pad setting surfaces 39a, 39b, and 40 which are different from each other in depth from the surface. Inner signal wiring layers interposed between the insulating layers 34a to 34c are introduced onto the pad setting surfaces 39a, 39b and 40, and pads are arranged corresponding to the signal wiring layers.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit module having a circuit component having a large number of bumps arranged in a matrix, a circuit board having the circuit component mounted thereon, and a multilayer structure used for the circuit module. The present invention relates to an electronic device on which a circuit board and a circuit module are mounted.

[0002]

2. Description of the Related Art In recent years, the performance of portable computers has been remarkably improved, and the number of pins has been increasing with the increase in the number of inputs / outputs, even in semiconductor packages constituting CPUs. A semiconductor package typified by a QFP (quad flat package) has a large number of pins arranged in a line at four peripheral portions. Requires a large mounting space.

A semiconductor package of a ball grid array (BGA) type is known as one that can cope with an increase in the number of pins while suppressing the area occupied by the package on the circuit board. This type of semiconductor package is the same as the QFP
Unlike a package in which pins are arranged in the peripheral area as shown in the figure, a large number of bumps are arranged in a matrix over the entire surface facing the circuit board. It can be arranged easily and is suitable for high-density mounting.

FIGS. 10 to 14 disclose the configuration of a connection portion between a conventional ball grid array type semiconductor package 1 and a circuit board 2. FIG. In FIG. 10, the semiconductor package 1 has a package body 3 having a flat rectangular box shape. The package body 3 includes a printed circuit board 4 as a package base material and the printed circuit board 4.
And a molding material 6 made of synthetic resin or ceramics for molding the semiconductor element 5 on the printed circuit board 4.

[0005] A wiring pattern 7 is formed on the surface 4 a of the printed board 4, and the electrodes of the semiconductor element 5 are wire-bonded to the wiring pattern 7.
A large number of ball-shaped bumps 8 are arranged on the back surface 4b of the printed board 4 in a matrix. These bumps 8 cover substantially the entire back surface 4 b of the printed circuit board 4 and are electrically connected to the semiconductor element 5 via the wiring pattern 7.

The circuit board 2 has a front surface 2a on which the semiconductor package 1 is mounted, and a back surface 2b opposite to the front surface 2a. On the surface 2a of the circuit board 2, a number of pads 10 corresponding to the bumps 8 of the semiconductor package 1 are arranged in a matrix.

In the example shown in FIG. 11, a large number of pad rows A1 to An are arranged at intervals from each other, and in each of the pad rows A1 to An, a large number of pads 10 are spaced from each other. Are arranged in a line. Therefore,
The pads 10 are arranged in a row on the surface 2a of the circuit board 2 vertically and horizontally.

As shown in FIG. 10, the circuit board 2 has a first
To third insulating layers 12a to 12c, and first to fourth insulating layers 12a to 12c.
And the signal wiring layers 13a to 13d are alternately stacked. The first insulating layer 12a forms the front surface 2a of the circuit board 2, and the third insulating layer 12c forms the back surface 2b of the circuit board 2.

As shown in FIG. 11, the first signal wiring layer 13a disposed on the front surface 2a of the circuit board 2 is connected to two outer rows of the pads 10 among the pads 10 arranged in a matrix. And a large number of first and second wiring patterns 14a and 14b. The first wiring patterns 14a are arranged in parallel at an interval from each other, and extend outward from the area where the pads 10 are arranged. The second wiring pattern 14b is guided between the first wiring patterns 14a through the space between the pads 10 on the outer row.

Further, the first to third insulating layers 12a to 12a-1
2nd and 3rd signal wiring layers 13 laminated between 2c
b, 13c and a fourth substrate disposed on the back surface 2b of the circuit board 2.
Are connected to the remaining pads 10 via a large number of through holes 15, respectively.

The through holes 15 penetrate the circuit board 2 in the thickness direction, and the inner surface of each through hole 15
It is covered by the conductive layer 16. Through hole 15
As shown in FIG. 11, the outer two rows of pads 10
On the inner side, they are arranged in portions surrounded by four pads 10, respectively, and are arranged in a line in the vertical and horizontal directions of the circuit board 2.

Therefore, the outermost through-holes 15 in the first row are electrically connected to the pads 10 in the third row from the outside on the front surface 2 a of the circuit board 2, and the through-holes 15 in the second row are On the surface 2 a of the circuit board 2, the pads are electrically connected to the pads 10 in four rows from the outside. Similarly, the through holes 15 in the third row are 5
The through-holes 15 in the fourth row are electrically connected to the pads 10 in the sixth row from the outside.

As shown in FIG. 12, the through holes 15 in the first and second columns are electrically connected to the second signal wiring layer 13b inside the circuit board 2. The second signal wiring layer 13b includes through holes 15 in the first and second columns.
Numerous first and second wiring patterns 17 connected to
a and 17b. First wiring pattern 17a
Are arranged in parallel with an interval therebetween, and extend outward from the area where the through holes 15 are arranged. The second wiring pattern 17b is led between the first wiring patterns 17a through the space between the through holes 15 in the first column.

As shown in FIG. 13, the through holes 15 in the third row are electrically connected to the third signal wiring layer 13c inside the circuit board 2. The third signal wiring layer 13c has a number of wiring patterns 18 connected to the through holes 15 in the third column. Wiring pattern 18
Extends through the space between the through holes 15 in the first and second rows to the outside of the area where the through holes 15 are arranged.

As shown in FIG. 14, the through holes 15 in the fourth row are electrically connected to the fourth signal wiring layer 13d on the back surface 2b of the circuit board 2. The fourth signal wiring layer 13d has a number of wiring patterns 19 connected to the through holes 15 in the fourth column. Wiring pattern 1
Reference numeral 9 extends to the outside of the area where the through holes 15 are arranged, between the through holes 15 in the first to third rows.

[0016]

According to the conventional circuit board 2 having such a structure, the first signal wiring layer 13a has two outer rows of pads because there is no through hole 15 in the wiring path. First and second numbers corresponding to 10
Wiring patterns 14a and 14b can be formed.

The second signal wiring layer 13b has a
Although the through holes 15 of the first column exist immediately before the through holes 17 of the column, the number of the first and second wirings corresponding to the pads 10 of the two columns respectively, as in the first signal wiring layer 13a. Patterns 17a and 17b can be formed.

However, when the third signal wiring layer 13c and the fourth signal wiring layer 13d are formed, as is apparent from FIGS. 13 and 14, immediately before the through hole 15 where these signal wiring layers 13c and 13d are continuous, Through-hole 1 in front row
5 are located. In general, the land diameter of the through hole 15 cannot be significantly reduced due to the restriction on the manufacturing of the circuit board 2. Therefore, the number of wiring patterns connected to one row of pads 10 is between adjacent through holes 15. 1
Only 8 and 19 can be placed.

Specifically, the arrangement interval of the bumps 8 is 1.2
The semiconductor package 1 defined to be 7 mm
Is 0.75 mm, and the distance between adjacent pads 10 is 0.
11 and 12 when mounted on the circuit board 2 in which the land diameter of the through-hole 15 is 0.8 mm and the line width of the first to fourth signal wiring layers 13a to 13d is 0.15 mm. As shown in FIG. 5, the first and second signal wiring layers 13a and 13b have wiring patterns 14a, 14b and 17a, 17b corresponding to the two rows of pads 10, respectively, so that the through holes 15 do not interfere. Can be arranged.

On the other hand, in the third and fourth signal wiring layers 13c and 13d, as shown in FIGS. 13 and 14, adjacent to the through hole 15 to which these signal wiring layers 13c and 13d are connected. In the front row through hole 1
5 is located. Therefore, the signal wiring layers 13c and 13d
Wiring patterns 18 and 19 must be wired in a limited space between the through-holes 15. Considering that the line width of the signal wiring layers 13c and 13d is 0.15 mm, Between them, only the number of wiring patterns 18 and 19 corresponding to the pads 10 for one row can be passed.

As a result, every time the number of rows of the pads 10 on the circuit board 2 increases by one, the number of signal wiring layers on the circuit board 2 must be increased by one, and the configuration of the circuit board 2 becomes complicated. There is a problem such as becoming.

Further, the arrangement interval of the bumps 8 is 1.00 m.
m, the diameter of the pad 10 is 0.5 mm, and the distance between adjacent pads 10 is 0.5 m.
m, a space for arranging the through hole 15 as described above between the adjacent pads 10 cannot be secured, and some countermeasures are required on the circuit board 2 side.

The present invention has been made in view of such circumstances, and a high-density wiring is possible without increasing the number of signal wiring layers. It is an object of the present invention to provide a circuit board to be used and an electronic device having a circuit module mounted thereon.

[0024]

Means for Solving the Problems In order to achieve the above object, the invention described in claim 1 is a circuit component having a large number of bumps arranged in a matrix and a mounting on which the circuit component is mounted A multi-layer circuit board on which a plurality of pads are arranged in a matrix on the mounting surface and a plurality of signal wiring layers are arranged in an inner layer. It is assumed that a circuit module is formed by electrically connecting the bumps of the circuit components described above. The circuit board has a recess on the mounting surface, and the recess faces the circuit component, and has a stepped shape having a plurality of pad mounting surfaces having different depths from the mounting surface. A pad electrically connected to the signal wiring layer is disposed on each of the pad mounting surfaces.

According to this configuration, since the circuit board has the concave portion including a plurality of step-like pad installation surfaces, the signal wiring layer and the pad in the inner layer can be electrically connected without using a through hole as in the related art. Can be connected. For this reason, there is no restriction in forming the wiring pattern of the inner signal wiring layer, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the circuit components, and the mounting density of the circuit components can be increased.

According to a second aspect, the circuit component according to the first aspect has a package base on which a semiconductor element is mounted, and the bumps are arranged in a matrix on the back surface of the package base. The bumps are columnar, and the height of the bumps corresponding to the pads on the pad mounting surface is larger than the height of the bumps on the mounting surface. Have been.

According to this configuration, the circuit components and the circuit board can be electrically connected to each other by changing the height of the bumps according to the depth dimension of the pad installation surface.
Therefore, it is not necessary to change the basic configuration of the circuit component even though some pads are arranged in the recess.

According to a third aspect, the circuit component according to the first aspect is a semiconductor package having a package base on which a semiconductor element is mounted, and the package base of the semiconductor package is the circuit board. A convex portion corresponding to the concave portion is provided on a back surface facing the mounting surface of the semiconductor device, and the convex portion has a step-like shape having a plurality of bump mounting surfaces facing the pad mounting surface, and the bump mounting surface and the package. The bump is arranged on the back surface of the substrate.

According to this configuration, the dimension between the bump installation surface and the pad installation surface can be made equal to the dimension between the mounting surface and the package base material. Therefore, the shapes and dimensions of many bumps can be equalized, and the bumps and pads can be reliably brought into contact.

According to a fourth aspect, the circuit board according to the first aspect has a plurality of through holes opened in the bottom surface of the concave portion, and the through holes are electrically connected to the signal wiring layer. It is connected to the.

According to this configuration, more pads can be arranged on one pad installation surface, and the number of pad installation surfaces can be reduced. Therefore, the shape of the concave portion can be simplified, and the cost can be reduced.

According to a fifth aspect of the present invention, there is provided a semiconductor package having a large number of solder bumps arranged in a matrix and a mounting surface on which the semiconductor package is mounted. On this mounting surface,
A circuit board on which a large number of pads are arranged in a matrix; and a circuit module formed by soldering the solder bumps of the semiconductor package to the pads of the circuit board. And the circuit board is
A plurality of insulating layers and a plurality of signal wiring layers electrically connected to the pads are alternately laminated, and the first signal wiring layer is arranged on the mounting surface of the circuit board. The circuit board has a concave portion opened on the mounting surface, and the concave portion faces the semiconductor package,
And, it has a step-like shape having a plurality of pad mounting surfaces having different depths from the mounting surface, and guides an inner signal wiring layer interposed between the insulating layers to each of these pad mounting surfaces, It is characterized in that pads corresponding to these signal wiring layers are arranged.

According to this structure, the circuit board has a concave portion including a plurality of stair-like pad installation surfaces, and the inner signal wiring layer is led to these pad installation surfaces, so that the conventional through-hole is provided. Can be used to electrically connect the inner signal wiring layer and the pad. For this reason,
Since there is no restriction on forming the wiring pattern of the inner signal wiring layer, the wiring pattern can be formed under the same conditions as the first signal wiring layer located on the mounting surface of the circuit board. The number of wiring patterns corresponding to the pads in the row can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the semiconductor package, and the mounting density on the circuit board can be increased.

In order to achieve the above object, according to a sixth aspect of the present invention, a large number of pads are arranged in a matrix on a mounting surface on which circuit components are mounted.
It is assumed that a circuit board has a multi-layer board main body in which a plurality of signal wiring layers are arranged in an inner layer, and the bumps of the circuit components are electrically connected to pads of the board main body. The substrate body has a concave portion on the mounting surface, and the concave portion has a step shape having a plurality of pad mounting surfaces facing the circuit component and having different depths from the mounting surface. A pad electrically connected to the signal wiring layer is disposed on each of the pad mounting surfaces.

According to this structure, since the substrate main body has the concave portion including the stepped pad mounting surface, the inner signal wiring layer and the pad can be electrically connected without using a through hole as in the related art. Can be connected. For this reason, there is no restriction in forming the wiring pattern of the inner signal wiring layer, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the substrate body opposite to the circuit components, and the mounting density on the substrate body can be increased.

According to a seventh aspect, the substrate body according to the sixth aspect has a plurality of through holes opened in the bottom surface of the concave portion, and these through holes are electrically connected to the signal wiring layer. It is connected to the.

According to this configuration, more pads can be arranged on one pad installation surface, and the number of pad installation surfaces can be reduced. Therefore, the shape of the concave portion can be simplified, and the manufacturing cost of the circuit board can be reduced.

[0038] In order to achieve the above object, the invention described in claim 8 provides a semiconductor package having a large number of bumps arranged in a matrix and a mounting surface on which the semiconductor package is mounted. A multi-layer circuit board in which a number of pads are arranged in a matrix on a mounting surface and a plurality of signal wiring layers are arranged in an inner layer; and a bump of the semiconductor package is provided on a pad of the circuit board. It is assumed that a circuit module is formed by electrically connecting the circuit modules.

The circuit board has a concave portion on the mounting surface, and the concave portion has a stepped shape having a plurality of pad mounting surfaces facing the semiconductor package and having different depths from the mounting surface. A pad electrically connected to the signal wiring layer is arranged on each of the pad mounting surfaces, and the semiconductor package is provided with a protrusion corresponding to the recess on a back surface facing the mounting surface of the circuit board. Having a step, having a step-like shape having a plurality of bump installation surfaces facing the pad installation surface, characterized in that the bumps are arranged on the back surface of the bump installation surface and the package base material. I have.

According to this configuration, since the circuit board has the concave portion including a plurality of step-like pad mounting surfaces, the signal wiring layer and the pad in the inner layer can be formed without using a through hole as in the related art. Can be electrically connected. For this reason, there is no restriction in forming the wiring pattern of the inner signal wiring layer, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the circuit components, and the mounting density of the circuit components can be increased. Further, the dimension between the bump installation surface and the pad installation surface can be made equal to the dimension between the mounting surface and the semiconductor package. Therefore, the shapes and dimensions of many bumps can be equalized, and the bumps and pads can be reliably brought into contact.

In order to achieve the above object, according to the ninth aspect of the present invention, there is provided a circuit component having a large number of bumps arranged in a matrix and a mounting surface on which the circuit component is mounted. A multi-layer circuit board in which a number of pads are arranged in a matrix on a mounting surface and a plurality of signal wiring layers are arranged in an inner layer; and a bump of the circuit component is provided on a pad of the circuit board. It is assumed that a circuit module is formed by electrically connecting the circuit modules.
The circuit board has a concave portion on the mounting surface, the concave portion has a pad mounting surface on a bottom portion facing the circuit component, and the pad mounting surface has a part of the signal wiring layer. Pads electrically connected to the signal wiring layer and pads connected to the remaining signal wiring layers via through holes are arranged.

According to this structure, since the circuit board has the concave portion including the pad mounting surface, the number of through holes is reduced and the inner signal wiring layer and the pad are electrically connected. be able to. For this reason, restrictions on forming the wiring pattern of the inner signal wiring layer are reduced, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained.

Moreover, since some of the pads on the pad mounting surface are connected to the inner signal wiring layer via the through holes, more pads can be arranged on one pad mounting surface. For this reason, the number of pad installation surfaces can be reduced, and the shape of the recess can be simplified.

In order to achieve the above object, a tenth aspect of the present invention includes a box-shaped housing; and a circuit module housed in the housing. Circuit component having a large number of bumps arranged in a matrix; and a mounting surface on which the circuit component is mounted. On the mounting surface, a large number of pads are arranged in a matrix and a plurality of pads are formed in an inner layer. A multi-layer circuit board on which signal wiring layers are arranged; and an electronic device in which bumps of the circuit components are electrically connected to pads of the circuit board. The circuit board has a recess on the mounting surface, and the recess faces the circuit component, and has a stepped shape having a plurality of pad mounting surfaces having different depths from the mounting surface. A pad electrically connected to the signal wiring layer is disposed on each of the pad mounting surfaces.

According to this configuration, since the circuit board has the concave portion including the plurality of step-like pad mounting surfaces, the signal wiring layer and the pad in the inner layer can be formed without using a through hole as in the related art. Can be electrically connected. For this reason, there is no restriction in forming the wiring pattern of the inner signal wiring layer, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the circuit components, and the mounting density of the circuit components can be increased.

To achieve the above object, an invention according to claim 11 comprises a box-shaped housing; and a circuit module housed inside the housing, and the circuit module is a matrix. A semiconductor package having a large number of bumps arranged in a matrix; and a mounting surface on which the semiconductor package is mounted. On the mounting surface, a large number of pads are arranged in a matrix and a plurality of pads are arranged in an inner layer. A multi-layer circuit board on which a signal wiring layer is arranged; and an electronic device in which bumps of the semiconductor package are electrically connected to pads of the circuit board. The circuit board has a recess on the mounting surface, and the recess faces the semiconductor package,
In addition, it has a step-like shape having a plurality of pad mounting surfaces having different depths from the mounting surface, and on each of these pad mounting surfaces, a pad electrically connected to the signal wiring layer is arranged. The semiconductor package has a convex portion corresponding to the concave portion on a back surface facing the mounting surface of the circuit board, and the convex portion has a step shape having a plurality of bump mounting surfaces facing the pad mounting surface, The present invention is characterized in that the bumps are arranged on the bump installation surface and the back surface of the package base material.

According to this structure, since the circuit board has the concave portion including the plurality of step-like pad installation surfaces, the signal wiring layer and the pad in the inner layer can be formed without using a through hole as in the related art. Can be electrically connected. For this reason, there is no restriction in forming the wiring pattern of the inner signal wiring layer, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Further, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the circuit components, and the mounting density of the circuit components can be increased. Further, the dimension between the bump installation surface and the pad installation surface can be made equal to the dimension between the mounting surface and the semiconductor package. Therefore, the shapes and dimensions of many bumps can be equalized, and the bumps and pads can be reliably brought into contact.

According to a twelfth aspect of the present invention, there is provided a housing having a box shape; and a circuit module housed in the housing. Circuit component having a large number of bumps arranged in a matrix; and a mounting surface on which the circuit component is mounted. On the mounting surface, a large number of pads are arranged in a matrix and a plurality of pads are formed in an inner layer. A multi-layer circuit board on which signal wiring layers are arranged; and an electronic device in which bumps of the circuit components are electrically connected to pads of the circuit board. The circuit board has a concave portion on the mounting surface, the concave portion has a pad mounting surface on a bottom portion facing the circuit component, and the pad mounting surface has a part of the signal wiring layer. Pads electrically connected to the signal wiring layer and pads connected to the remaining signal wiring layers via through holes are arranged.

According to this structure, since the circuit board has the concave portion including the pad mounting surface, the number of through holes is reduced and the inner signal wiring layer and the pad are electrically connected. be able to. For this reason, restrictions on forming the wiring pattern of the inner signal wiring layer are reduced, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained.

Moreover, since some of the pads on the pad mounting surface are connected to the inner signal wiring layer through the through holes, more pads can be arranged on one pad mounting surface. For this reason, the number of pad installation surfaces can be reduced, and the shape of the recess can be simplified.

[0051]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the present invention will be described below with reference to FIGS. FIG. 1 shows a portable computer 21. The computer 21 includes a flat box-shaped housing 22 and a housing 2
2 and a flat display unit 23 supported by the display unit 2.

The housing 22 includes a base 24 and the base 2
4 and an upper cover 25 detachably connected to the upper cover 4. The base 24 has a flat bottom wall 24a. The upper cover 25 has an upper wall 25a facing the bottom wall 24a. The front part of the upper wall 25a is a flat armrest 26, and this armrest 26
A keyboard 27 is disposed behind the keyboard.

The display unit 23 is provided in the housing 2
2 is supported at the rear end thereof via a hinge shaft 28. Therefore, the display unit 23 is
The armrest 26 and the keyboard 27 can be rotated between a closed position that covers the keyboard 6 and the keyboard 27 and an open position where the armrest 26 and the keyboard 27 are exposed.

Incidentally, the circuit module 30 is housed inside the housing 22. The circuit module 30
A semiconductor package 31 as a circuit component and a circuit board 32 on which the semiconductor package 31 is mounted are provided.

The circuit board 32 has a surface 32 as a mounting surface.
a and a back surface 32b opposite to the front surface 32a
And The circuit board 32 is detachably supported by the housing 4, and the back surface 32 b of the circuit board 32 faces the bottom wall 24 a of the housing 22.

As shown in FIG. 2, the circuit board 32
To third insulating layers 34a to 34c, and first to third insulating layers 34a to 34c.
And a signal wiring layer 35a to 35c. The first to third insulating layers 34a to 34c are made of glass epoxy, polyimide, or the like. The first insulating layer 34a is formed on the surface 32a of the circuit board 32.
And the third insulating layer 34c forms the back surface 32b of the circuit board 32.

First to third signal wiring layers 35a to 35a
c is made of a copper foil having a predetermined pattern. The first signal wiring layer 35a of the first layer is
Are arranged on the surface 32a. The second signal wiring layer 35b of the second layer includes a first insulating layer 34a and a second insulating layer 34b.
b. The third signal wiring layer 35c of the third layer is stacked between the second insulating layer 34b and the third insulating layer 34c. Therefore, the second and third signal wiring layers 35b and 35c are arranged inside the circuit board 32.

The circuit board 32 has a concave portion 38 at a position corresponding to the mounting portion of the semiconductor package 31. The recess 38 has a square opening end 38 a opened on the surface 32 a of the circuit board 32, and the opening shape of the recess 38 is smaller than the planar shape of the package body 3 of the semiconductor package 31. Therefore, the recess 38
Are the bumps 8 in the second row from the outside of the semiconductor package 31
It is located in the part surrounded by.

The recess 38 is provided with a pair of first pad mounting surfaces 3.
9a, 39b and a second pad installation surface 40 are formed in a stepped shape. First pad installation surfaces 39a, 39b
The depth dimension from the surface 32 a of the circuit board 32 is different between the second pad installation surface 40 and the second pad installation surface 40.

That is, the first pad mounting surfaces 39a, 3
9b is constituted by the surface of the second insulating layer 34b,
From the surface 32a of the circuit board 32 to the first pad mounting surface 39
The depth dimension up to a, 39b substantially corresponds to the thickness dimension of the first insulating layer 34a. The second pad mounting surface 40 includes:
The depth dimension from the surface 32a of the circuit board 32 to the second pad mounting surface 40 substantially corresponds to the thickness dimension of the first and second insulating layers 34a and 34b. doing. This second pad mounting surface 40
Is disposed between the first pad mounting surfaces 39a and 39b, and also serves as the bottom surface of the recess 38.

First and second pad mounting surfaces 39a, 3
9 b and 40 are exposed to the outside of the circuit board 32 through the opening end 38 a of the concave portion 38, and face the semiconductor package 31. Then, the first pad installation surface 39
The second signal wiring layer 35b is led to a and 39b, and the third signal wiring layer 35c is led to the second pad installation surface 40.

As shown in FIGS. 2 and 3, the surface 32a of the circuit board 32 facing the recess 38 and the first and second
A large number of pads 42 are respectively arranged on the pad installation surfaces 39a, 39b, 40 of the above.

The pads 42 on the surface 32a are arranged at intervals along the opening end 38a of the recess 38, and these pads 42 are arranged in two rows so as to surround the opening end 38a of the recess 38. . First pad mounting surface 39
The pads 42a and 39b are spaced apart from each other by two.
They are arranged in columns. The pads 42 on the second pad installation surface 40 are arranged in four rows at intervals. Therefore, when the circuit board 32 is viewed in a plan view, the pad 42 is
are arranged in a matrix in a matrix in a range extending over the periphery of a.

As shown in FIG. 3, the surface 3 of the circuit board 32
The pad 42a of the first signal wiring layer 35a
Is electrically connected to This first signal wiring layer 35
a includes a first wiring pattern 43a connected to the pads 42 in the outer row, and a second wiring pattern 43b connected to the pads 42 in the inner row. First wiring pattern 4
3a are arranged in parallel with a space therebetween, and extend outward of the area where the pads 42 are arranged. Second
The wiring pattern 43b is guided between the first wiring patterns 43a through the pads 42 in the outer row, and is arranged in parallel with the first wiring pattern 43a.

As shown in FIG. 4, the first pad mounting surface 3
The pads 42 of 9a and 39b are electrically connected to the second signal wiring layer 35b of the second layer. The second signal wiring layer 35b includes a first wiring pattern 44a connected to the pads 42 in the outer row, and a second wiring pattern 44b connected to the pads 42 in the inner row. The first wiring patterns 44a are arranged in parallel with an interval therebetween, and extend outward from the area where the pads 42 are arranged. The second wiring pattern 44b is guided between the first wiring patterns 44a through between the pads 42 in the outer row, and is arranged in parallel with the first wiring pattern 44a.

As shown in FIG. 5, the second pad mounting surface 4
The zero pad 42 is electrically connected to the third signal wiring layer 35c of the third layer. This third signal wiring layer 35c
Has a first wiring pattern 45a connected to the pads 42 in the outer row and a second wiring pattern 45b connected to the pads 42 in the inner row. First wiring pattern 45
“a” are arranged in parallel with an interval therebetween, and extend outward from the area where the pads 42 are arranged.
The second wiring pattern 45b is guided between the first wiring patterns 45a through the pads 42 in the outer row, and is arranged in parallel with the first wiring pattern 45a.

As a result, the first to third signal wiring layers 3
5a to 35c denote first and second wiring patterns 43a, 43b, 44, 44 connected to the two rows of pads 42, respectively.
b, 45a and 45b.

The semiconductor package 31 has basically the same configuration as that of the semiconductor package 1 described in the prior art, except for a bump 48 serving as a connection terminal. Therefore, the same components as those of the above-described conventional semiconductor package 1 are denoted by the same reference numerals, and description thereof is omitted.

As shown in FIG. 2, the bumps 48 are arranged in a matrix on the back surface 4 b of the printed circuit board 4 constituting the package body 3. These bumps 48 correspond to the pads 42 of the circuit board 32, and each have a columnar (pin) shape. The height of the bump 48 changes over three steps so that the height gradually increases from the outermost pad 42 of the semiconductor package 31 toward the inside.

That is, when the semiconductor package 31 is mounted on the surface 32 a of the circuit board 32, the package body 3 has a step-like first and second pad mounting surface 39.
a, 39b, 40 facing the recess 38. Therefore, the distance between the package body 3 and the first pad mounting surfaces 39a and 39b is larger than the distance between the package body 3 and the surface 32a of the circuit board 32, and the package body 3 3 and first pad setting surface 3
The distance between the package body 3 and the second pad mounting surface 40 is larger than the distance between the package bodies 9a and 39b.

Therefore, of the bumps 48, the pads 42 on the first and second pad mounting surfaces 39 a, 39 b, 40
Is set larger than the height of the bump 48 corresponding to the pad 42 on the surface 32 a of the circuit board 32, and absorbs the depth of the recess 38.

Each bump 4 of the semiconductor package 31
8 is soldered to the pad 42 of the circuit board 32, whereby the semiconductor package 31 and the circuit board 32 are electrically connected.

According to such a configuration, the first and second pad mounting surfaces 39a, 39b, 40, which are arranged stepwise, are mounted on the circuit board 32 on which the semiconductor package 31 is mounted.
Are formed, and the second and third signal wiring layers 35b and 35c inside the circuit board 32 are led to the first and second pad mounting surfaces 39a, 39b and 40, respectively. The first and second pad mounting surfaces 39a,
A plurality of rows of pads 42 and second and third signal wiring layers 35b and 35c can be electrically connected on 39b and 40.

For this reason, since a large number of through holes for signal wiring are not required, the second and third signal wiring layers 35 are not required.
There is no restriction in forming the wiring patterns 44a, 44b, 45a, 45b such as guiding the wires b and 35c between the through holes, and the second and third signal wiring layers 35b and 35c inside the circuit board 32 are eliminated. Also the circuit board 3
The wiring patterns 44a, 44b, 45a, 45b can be formed under the same conditions as the first signal wiring layer 35a on the surface 32a of the second.

Therefore, the number of wiring patterns 44a, 44b, 45a, 45b corresponding to the two rows of pads 42 can be formed without difficulty, and high-density signal wiring can be achieved while reducing the number of signal wiring layers. .

Further, since no through-hole penetrating through the circuit board 32 is required, the back surface 32b of the circuit board 32 is not required.
Among them, other circuit components such as a semiconductor package and a connector can be arranged in a portion corresponding to the concave portion 38. Therefore, the mounting density on the circuit board 32 can be increased, and the size of the circuit board 32 can be reduced.

Further, according to the above configuration, the height of the bump 48 of the semiconductor package 31 is made different depending on the depth of the first and second pad mounting surfaces 39a, 39b, 40. Although the pad 42 is arranged inside the concave portion 38, it is not necessary to change the basic structure of the package body 3, and the cost can be reduced.

In the first embodiment, all the bumps of the semiconductor package are formed in the shape of a column (pin). However, the present invention is not limited to this. May be formed in a ball shape, and the bumps connected to the pads on the first and second pad installation surfaces may be formed in a columnar or prismatic shape.

The present invention is not limited to the first embodiment, and FIG. 6 shows a second embodiment of the present invention. The second embodiment is different from the first embodiment in the configuration of the printed circuit board 52 of the semiconductor package 31, and the other configurations are the same as the first embodiment. Therefore, in the second embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and description thereof will be omitted.

As shown in FIG.
Are formed on the back surface 52b facing the circuit board 32 by the protrusions 5.
Three. The convex portion 53 faces the concave portion 38 of the circuit board 32 when the semiconductor package 31 is mounted on the circuit board 32.

The projection 53 has a first pad mounting surface 39a,
A pair of first bump installation surfaces 55a,
55b and a second bump installation surface 56 facing the second pad installation surface 40 has a stepped shape. Therefore, the height from the back surface 52b of the printed board 52 to the first first bump setting surfaces 55a and 55b is smaller than the height from the back surface 52b of the printed board 52 to the second bump setting surface 56. .

A large number of ball-shaped solder bumps 57 are arranged on the back surface 52b of the printed circuit board 52 and the first and second bump mounting surfaces 56a and 56b, respectively.
The solder bumps 57 on the back surface 52b are arranged in two rows with an interval therebetween so as to surround the projection 53.
The solder bumps 57 on the first bump installation surface 56a are arranged in two rows with an interval therebetween. The solder bumps 57 on the second bump setting surface 56b are arranged in four rows at intervals.

Therefore, the back surface 52b of the printed circuit board 52
When viewed from above, the solder bumps 57
The solder bumps 57 are arranged in rows and columns in a matrix in the range of 3 and the periphery thereof, and all of these solder bumps 57 have the same shape and dimensions.

Incidentally, the solder bumps 57 are soldered to the pads 42, whereby the semiconductor package 31 is
And the circuit board 32 are electrically connected. According to such a configuration, the printed board 52 of the semiconductor package 31 includes the convex portions 53 having the first and second bump mounting surfaces 55a, 55b, and 56 arranged in a stepwise manner. 2, the bump installation surfaces 55a, 55b,
56 and the first and second pad mounting surfaces 39a, 39b,
40 can be determined to be equal to the dimension between the back surface 52b of the printed board 52 and the front surface 32a of the circuit board 32.

For this reason, some of the pads 4
Despite the formation of the recess 38 accommodating the solder bumps 2, the shapes and dimensions of the many solder bumps 57 can be equalized, and the solder bumps 57 and the pads 42 can be reliably brought into contact. Therefore, the reliability of the connection between the semiconductor package 31 and the circuit board 32 is improved.

FIG. 7 to FIG. 9 disclose a third embodiment of the present invention. In the third embodiment,
The partial configuration of the circuit board 61 on which the semiconductor package 31 is mounted is different from that of the first embodiment, and the other configuration is the same as that of the first embodiment.

As shown in FIG. 7, the circuit board 61 has the recess 6 at a position corresponding to the mounting portion of the semiconductor package 31.
Two. The recess 62 is provided on the surface 61 of the circuit board 61.
a has a square opening end 62 a opened at a, and the opening shape of the concave portion 62 is determined to be smaller than the planar shape of the package body 3 of the semiconductor package 31. For this reason, the concave portion 62 is located 2 mm from the outside of the semiconductor package 31.
It is located in a portion surrounded by the bumps 48 in the row.

The recess 62 has a flat pad installation surface 63. The pad installation surface 63 also serves as the bottom surface of the recess 62. The pad mounting surface 63 is formed on the second insulating layer 34b.
The depth dimension from the surface 61a of the circuit board 61 to the pad mounting surface 63 is the first insulating layer 3
4a substantially corresponds to the thickness dimension. Therefore, the concave portion 62
The pad installation surface 63 forms a step-like step in cooperation with the surface 61a of the circuit board 61.

The pad installation surface 63 is provided at the opening end 6 of the recess 62.
It is exposed to the outside of the circuit board 61 through 2a and faces the semiconductor package 31. The second signal wiring layer 35b is led to the pad installation surface 63.

Surface 61 a of circuit board 61 facing recess 62
Also, a large number of pads 4 are provided on the pad installation surface 63, respectively.
2 are arranged. The pads 42 on the surface 32a are arranged at an interval along the opening end 62a of the recess 62, and the pads 42 are arranged in two rows so as to surround the opening end 62a of the recess 62. Pad installation surface 63
The pads 42 are arranged in eight rows at intervals from one another. Therefore, when the circuit board 61 is viewed in a plan view, the pads 42 are arranged in a matrix in a vertical and horizontal line in a range extending around the concave portion 62 and the opening end 62a.

As shown in FIG. 8, the surface 6 of the circuit board 61 is
The pad 42 of 1a is similar to the first embodiment,
It is electrically connected to the first signal wiring layer 35a of the first layer. Out of the pads 42 on the pad mounting surface 63, the outer two rows of pads 42 are electrically connected to the second signal wiring layer 35b as in the first embodiment. I have.

Out of the pads 42 on the pad mounting surface 63, the remaining four rows of pads 42 except for the outer two rows of pads 42 are electrically connected to the third signal wiring layer 35 c of the third layer via many through holes 65. Connected. Through hole 65
Penetrates the circuit board 61 in the thickness direction, and is opened on the pad installation surface 63 and the back surface 61b of the circuit board 61, respectively. The inner surface of each through hole 65 is
6. As shown in FIG. 8, the through-holes 65 are arranged inside the two rows of pads 42 to which the second signal wiring layer 35b is connected, at portions surrounded by the four pads 42, respectively. Are arranged in a line vertically and horizontally.

As shown in FIG. 9, the third signal wiring layer 35c to which the through hole 65 is connected is the first wiring pattern 45a connected to the pad 42 in the outer row among the remaining four rows of pads 42. And a second wiring pattern 45b connected to the pads 42 in the inner row. The first wiring patterns 45a are arranged in parallel at an interval from each other, and extend outward from the area where the pads 42 are arranged. The second wiring pattern 45b is guided between the first wiring patterns 45a through the through holes 65 in the outer row, and is arranged in parallel with the first wiring pattern 45a.

According to such a configuration, the pad mounting surface 6
3 among the pads 42 arranged on the outer two rows of the pads 4
The pads 42 in the inner four rows except for the pad 2 are electrically connected to the third signal wiring layer 35 c through the through holes 65, so that one pad mounting surface 63 has more pads 4.
2 can be arranged. Therefore, only one pad installation surface 63 of the concave portion 62 is sufficient, and the shape of the concave portion 62 can be simplified by that amount, and the manufacturing cost of the circuit board 61 can be reduced.

Further, since the through hole 65 is only connected to the third signal wiring layer 35c, there is no restriction in forming the wiring patterns 45a and 45b of the third signal wiring layer 35c. This third signal wiring layer 35c
, The first and second signal wiring layers 35a, 35
The wiring patterns 45a and 45b can be formed under the same conditions as in the case b. Therefore, the number of wiring patterns 45a and 45b corresponding to the four rows of pads 42 can be formed without difficulty.

In practicing the present invention, the circuit components mounted on the circuit board are not limited to a semiconductor package on which one semiconductor element is mounted, but, for example, a plurality of semiconductor elements mounted on a printed circuit board. Alternatively, a multi-chip module called an MCM may be used.

[0097]

According to the first, fifth, sixth and tenth aspects of the present invention, the electrical connection between the internal signal wiring layer and the pad located inside the circuit board without using a through hole is achieved. Can be. Therefore, there is no restriction on forming the wiring pattern of the inner signal wiring layer, and the wiring pattern can be formed under the same conditions as the first signal wiring layer located on the mounting surface of the circuit board. A number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Therefore, high-density wiring can be performed while reducing the number of stacked signal wiring layers, and the manufacturing cost of the circuit board can be reduced. Moreover, if through holes are not required, other circuit components can be arranged on the surface of the circuit board opposite to the circuit components, and the mounting density on the circuit board can be increased. According to the eighth and eleventh aspects of the present invention, in addition to the above main effects, the shapes and dimensions of a large number of bumps can be equalized, and these bumps can be reliably brought into contact with the pads. it can. further,
According to the ninth and twelfth aspects of the present invention, since the number of through holes can be reduced and the inner signal wiring layer and the pad can be electrically connected, the wiring pattern of the inner signal wiring layer is reduced. The restrictions on the formation are reduced, and a number of wiring patterns corresponding to a plurality of rows of pads can be obtained. Therefore, high-density wiring can be performed while reducing the number of stacked signal wiring layers, and the manufacturing cost of the circuit board can be reduced. In addition, since some of the pads on the pad mounting surface are connected to the inner signal wiring layer via through holes, more pads can be arranged on one pad mounting surface, and The number of pad installation surfaces can be reduced, and the shape of the recess can be simplified.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a portable computer on which a circuit module is mounted according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view of the circuit module showing a state where the semiconductor package is mounted on a circuit board.

FIG. 3 is a plan view showing wiring paths of first to third signal wiring layers connected to pads on a circuit board.

FIG. 4 is a plan view showing a wiring path of a second signal wiring layer.

FIG. 5 is a plan view showing a wiring path of a third signal wiring layer.

FIG. 6 is a sectional view of a circuit module showing a state in which a semiconductor package is mounted on a circuit board according to the second embodiment of the present invention.

FIG. 7 is a cross-sectional view of a circuit module showing a state where a semiconductor package is mounted on a circuit board in a third embodiment of the present invention.

FIG. 8 is a plan view showing wiring paths of first and second signal wiring layers connected to pads on a circuit board.

FIG. 9 is a plan view showing a wiring path of a third signal wiring layer.

FIG. 10 is a sectional view of a conventional circuit module.

FIG. 11 is a plan view showing a wiring path of a conventional first signal wiring layer.

FIG. 12 is a plan view showing a wiring path of a conventional second signal wiring layer.

FIG. 13 is a plan view showing a wiring path of a conventional third signal wiring layer.

FIG. 14 is a plan view showing a wiring path of a conventional fourth signal wiring layer.

[Explanation of symbols]

Reference Signs List 22 housing 30 circuit module 31, 51 circuit component (semiconductor package) 32 circuit board 32a mounting surface (front surface) 35a to 35c signal wiring layer (first to third signal wiring layers) 36, 62 ... concave portions 39a, 39b, 40, 63 ... pad installation surfaces (first and second pad installation surfaces) 42 ... pads 48 ... bumps 53 ... projections 55a, 55b ... bump installation surfaces (first and second bump installation surfaces) Surface) 65 ... Through hole

Claims (12)

[Claims] 1. A circuit component having a large number of bumps arranged in a matrix, and a mounting surface on which the circuit component is mounted, and a large number of pads arranged on the mounting surface in a matrix. A multi-layer circuit board having a plurality of signal wiring layers disposed in an inner layer thereof; and a circuit module comprising a circuit board having bumps of the circuit components electrically connected to pads of the circuit board. Has a concave portion on the mounting surface, and the concave portion has a step shape having a plurality of pad mounting surfaces facing the circuit component and having different depths from the mounting surface. A circuit module, wherein pads electrically connected to the signal wiring layer are arranged on a surface. 2. The circuit component according to claim 1, wherein the circuit component has a package base on which a semiconductor element is mounted, and the bumps are arranged in a matrix on a back surface of the package base. While having a columnar shape,
The circuit module according to claim 1, wherein a height of the bump corresponding to the pad on the pad mounting surface is larger than a height of the bump corresponding to the pad on the mounting surface. . 3. The semiconductor device according to claim 1, wherein the circuit component is a semiconductor package having a package base on which a semiconductor element is mounted, and the package base of the semiconductor package faces a mounting surface of the circuit board. On the back surface, there is a convex portion corresponding to the concave portion, and the convex portion has a step-like shape having a plurality of bump mounting surfaces facing the pad mounting surface, and is formed on the bump mounting surface and the back surface of the package base material. A circuit module, wherein the bump is arranged. 4. The circuit board according to claim 1, wherein the circuit board has a plurality of through holes opened on a bottom surface of the recess, and the through holes are electrically connected to the signal wiring layer. A circuit module, characterized in that: 5. A semiconductor package having a large number of solder bumps arranged in a matrix; and a mounting surface on which the semiconductor package is mounted.
A circuit board in which a number of pads are arranged in a matrix; and a solder bump of the semiconductor package is soldered to the pad of the circuit board. Layers, and a plurality of signal wiring layers electrically connected to the pads are alternately laminated, and the first signal wiring layer is arranged on the mounting surface of the circuit board. Having a concave portion opened on the mounting surface,
The recess faces the semiconductor package, and has a stepped shape having a plurality of pad mounting surfaces having different depths from the mounting surface, and the pad mounting surfaces are interposed between the insulating layers. And a pad connected to the signal wiring layers. 6. A large number of pads are arranged in a matrix on a mounting surface on which circuit components are mounted.
A circuit board having a multilayer board body in which a plurality of signal wiring layers are arranged in an inner layer, and electrically connecting bumps of the circuit component to pads of the board body, wherein the board body has the mounting surface The recess has a step-like shape having a plurality of pad mounting surfaces facing the circuit component and having different depths from the mounting surface. A circuit board having a pad electrically connected to a wiring layer. 7. The substrate body according to claim 6, wherein the substrate main body has a plurality of through holes opened on a bottom surface of the concave portion, and the through holes are electrically connected to the signal wiring layer. A circuit board, characterized in that: 8. A semiconductor package having a large number of bumps arranged in a matrix, and a mounting surface on which the semiconductor package is mounted, and a large number of pads arranged in a matrix on the mounting surface. And a multi-layer circuit board having a plurality of signal wiring layers arranged in an inner layer; and a circuit module having a bump of the semiconductor package electrically connected to a pad of the circuit board. Has a concave portion on the mounting surface, and the concave portion has a step-like shape having a plurality of pad mounting surfaces facing the semiconductor package and having different depths from the mounting surface. A pad electrically connected to the signal wiring layer is disposed on a surface, and the semiconductor package faces a mounting surface of the circuit board. On the mating back surface, there is a convex portion corresponding to the concave portion, and the convex portion has a step shape having a plurality of bump mounting surfaces facing the pad mounting surface, and also has a bump mounting surface and a back surface of the package base material. A circuit module, wherein the bump is arranged on the circuit module. 9. A circuit component having a large number of bumps arranged in a matrix; and a mounting surface on which the circuit component is mounted, and a large number of pads arranged on the mounting surface in a matrix. A multi-layer circuit board having a plurality of signal wiring layers disposed in an inner layer thereof; and a circuit module comprising a circuit board having bumps of the circuit components electrically connected to pads of the circuit board. Has a concave portion on the mounting surface, the concave portion has a pad mounting surface on the bottom portion facing the circuit component, and the pad mounting surface has an electrical connection to some of the signal wiring layers among the signal wiring layers. And a pad connected to the remaining signal wiring layer via a through hole in the circuit module. 10. A box-shaped housing; and a circuit module housed in the housing; a circuit component having a large number of bumps arranged in a matrix; A multi-layer circuit board having a mounting surface on which the circuit components are mounted, a large number of pads arranged in a matrix on the mounting surface, and a plurality of signal wiring layers arranged in an inner layer; In an electronic device in which bumps of the circuit component are electrically connected to pads of the circuit board, the circuit board has a recess on the mounting surface, and the recess faces the circuit component, and It has a stepped shape having a plurality of pad mounting surfaces having different depths from the mounting surface, and a pad electrically connected to the signal wiring layer is arranged on each of the pad mounting surfaces. Electronic devices that. 11. A housing having a box shape; a circuit module housed inside the housing; a semiconductor package having a large number of bumps arranged in a matrix; A multi-layer circuit board having a mounting surface on which the semiconductor package is mounted, a plurality of pads arranged in a matrix on the mounting surface, and a plurality of signal wiring layers arranged in an inner layer. In an electronic device in which bumps of the semiconductor package are electrically connected to pads of the circuit board, the circuit board has a recess on the mounting surface, and the recess faces the semiconductor package, and It has a stepped shape having a plurality of pad mounting surfaces having different depths from the mounting surface, and each of these pad mounting surfaces is electrically connected to the signal wiring layer. The semiconductor package has a convex portion corresponding to the concave portion on the back surface facing the mounting surface of the circuit board, and the convex portion has a plurality of bump mounting surfaces facing the pad mounting surface. An electronic device, wherein the bumps are arranged on the bump installation surface and on the back surface of the package base material. 12. A box-shaped housing; and a circuit module housed in the housing; a circuit component having a large number of bumps arranged in a matrix; A multi-layer circuit board having a mounting surface on which the circuit components are mounted, a large number of pads arranged in a matrix on the mounting surface, and a plurality of signal wiring layers arranged in an inner layer; An electronic device comprising a circuit board having electrically connected bumps of the circuit component to pads of the circuit board, wherein the circuit board has a concave portion on the mounting surface, and the concave portion has a pad on a bottom portion facing the circuit component. A pad electrically connected to a part of the signal wiring layers among the signal wiring layers, and a pad connected to the remaining signal wiring layers via through holes; Electronic apparatus, characterized in that a.