JPH10164444A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPH10164444A
JPH10164444A JP8313855A JP31385596A JPH10164444A JP H10164444 A JPH10164444 A JP H10164444A JP 8313855 A JP8313855 A JP 8313855A JP 31385596 A JP31385596 A JP 31385596A JP H10164444 A JPH10164444 A JP H10164444A
Authority
JP
Japan
Prior art keywords
frequency
vco
divider
signal
oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8313855A
Other languages
Japanese (ja)
Inventor
Toshihiro Tsuruoka
利博 鶴岡
Masao Okumura
昌夫 奥村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP8313855A priority Critical patent/JPH10164444A/en
Publication of JPH10164444A publication Critical patent/JPH10164444A/en
Pending legal-status Critical Current

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  • Processing Of Color Television Signals (AREA)

Abstract

PROBLEM TO BE SOLVED: To eliminate special oscillator for control, to reduce the number of external components and elements for an IC and to facilitate the formation of IC by automatically controlling the central frequency of frequency modulator at the PLL circuit of RF modulator while using an oscillator to be used for the frequency conversion of chrominance signal. SOLUTION: A 1/35 frequency divider 13 divides a chrominance subordinate carrier wave frequency oscillated by an OSC 12 inside a chroma signal processing circuit 11 and outputs the result to a phase comparator 7 of PLL circuit 9. The phase comparator 7 compares the phase of output signal from a 1/44 frequency divider 14, for dividing the central frequency of frequency modulator VCO 1 with the phase of output signal from the 1/35 frequency divider 13, a voltage for controlling the oscillation frequency of VCO 1 is generated, and the VCO 1 is controlled through an LPF 8 and an adder 3. At such a time, the frequency oscillated by the VCO 1 has sufficiently allowable frequency difference from the required central frequency. Thus, a crystal oscillator for regulating the central frequency of VCO 1 is dispensed with IC formation is facilitated.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、家庭用のVTR等
に利用される映像信号や音声信号をRF変調するRFモ
ジュレータのPLL回路に関するもので、特に音声信号
をRF変調する際に使用するPLL回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PLL circuit of an RF modulator for RF modulating a video signal or an audio signal used in a home VTR or the like, and more particularly to a PLL circuit used for RF modulating an audio signal. Circuit.

【0002】[0002]

【従来の技術】例えば、家庭用のVTRで再生された映
像信号及び音声信号をTV受像機で再生する際には一
旦、RF(ラジオ周波数)信号に変換してからTV受像
機のアンテナに印加するようにしている。音声信号の場
合、ベースバンドの音声信号を4.5MHZのVCO
(FM変調器)で周波数変調し、更にチャンネル2(9
7.25MHZ)等の高い周波数によって周波数変換され10
1.75MHZになる。
2. Description of the Related Art For example, when a video signal and an audio signal reproduced by a home VTR are reproduced by a TV receiver, they are first converted into RF (radio frequency) signals and then applied to an antenna of the TV receiver. I am trying to do it. In the case of an audio signal, the baseband audio signal is converted to a 4.5 MHz VCO
(FM modulator), and further modulates the frequency in channel 2 (9
7.25MHZ)
1.75 MHZ.

【0003】この場合に、ベースバンドの音声信号を
4.5MHZのVCOで周波数変調するにはPLL回路
を使用することがある。そのようなPLL回路を図2に
示す。図2のVCO(1)は4.5MHZを中心周波数
として発振する。入力端子(2)には、ベースバンドの
音声信号が印加され、加算器(3)に印加される。加算
器(3)からの信号はVCO(1)の制御端子に印加さ
れ4.5MHZを中心周波数として発振するVCO
(1)の周波数変調を行う。
In this case, a PLL circuit may be used to frequency-modulate a baseband audio signal with a 4.5 MHz VCO. Such a PLL circuit is shown in FIG. The VCO (1) in FIG. 2 oscillates with a center frequency of 4.5 MHz. A baseband audio signal is applied to the input terminal (2) and applied to the adder (3). The signal from the adder (3) is applied to the control terminal of the VCO (1), and the VCO oscillates with a center frequency of 4.5 MHz.
The frequency modulation of (1) is performed.

【0004】VCO(1)の4.5MHZの出力信号
は、1/36分周器(4)で1/36分周され、125000H
Zの周波数となる。この125000HZの周波数と等
しい周波数の信号を作成するのに4.0MHZの一定周
波数で発振する発振器(5)と1/32分周を行う1/32分周
器(6)とを用いる。4.0MHZの信号を1/32分周す
ることに依り、125000HZの信号が作成できる。
The output signal of 4.5 MHZ of the VCO (1) is divided by 1/36 by the 1/36 frequency divider (4) to obtain 125000H.
Z frequency. An oscillator (5) that oscillates at a constant frequency of 4.0 MHZ and a 1/32 divider (6) that divides 1/32 are used to generate a signal having a frequency equal to the frequency of 125000 Hz. By dividing the frequency of the 4.0 MHZ signal by 1/32, a signal of 125000 HZ can be created.

【0005】この為、位相比較器(7)には12500
0HZの等しい周波数の2つの信号が印加され位相比較
が行われ、その差に応じた信号がLPF(8)に印加さ
れる。LPF(8)の出力信号に応じてVCO(1)の
周波数及び位相が調整され、PLL回路(9)は発振器
(5)の出力信号の位相にロックする。
For this reason, 12,500 is added to the phase comparator (7).
Two signals having the same frequency of 0HZ are applied, phase comparison is performed, and a signal corresponding to the difference is applied to the LPF (8). The frequency and phase of the VCO (1) are adjusted according to the output signal of the LPF (8), and the PLL circuit (9) locks on the phase of the output signal of the oscillator (5).

【0006】発振器(5)の発振周波数は正確であるの
で、VCO(1)は、正確に4.5MHZを中心周波数
として発振する。従って、出力端子(10)よりベース
バンドの音声信号を周波数4.5MHZの搬送波信号で
FM変調した信号が得られる。
Since the oscillation frequency of the oscillator (5) is accurate, the VCO (1) oscillates with a center frequency of exactly 4.5 MHz. Accordingly, a signal obtained by FM-modulating a baseband audio signal with a carrier signal having a frequency of 4.5 MHz is obtained from the output terminal (10).

【0007】[0007]

【発明が解決しようとする課題】しかしながら、図2の
PLL回路には、125000HZの信号を作成するた
めに専用の発振器(5)を必要とする、という問題があ
った。発振器(5)の発振周波数は正確にする必要があ
るので、クリスタル発振子を必要とする。一般に図2の
PLL回路はIC化されるが、クリスタル発振子はIC
の外付けとなるのでIC化に不適であった。
However, the PLL circuit of FIG. 2 has a problem that a dedicated oscillator (5) is required to generate a signal of 125000 HZ. Since the oscillation frequency of the oscillator (5) needs to be accurate, a crystal oscillator is required. Generally, the PLL circuit shown in FIG.
Was unsuitable for use in an IC.

【0008】[0008]

【課題を解決するための手段】本発明は、上述の点に鑑
みなされたもので、NTSC方式の色副搬送波周波数で
ある3579545HZで発振する発振器と、該発振器
の発振出力信号を1/35分周する第1分周器と、音声
インターキャリア周波数である4500000HZを中
心周波数として発振するVCOと、該VCOの発振出力
信号を1/44分周する第2分周器と、前記第1及び第
2分周器の分周出力信号を位相比較する位相比較器と、
該位相比較器の出力信号を平滑し前記VCOに発振周波
数の制御電圧として印加するLPFとを備えることを特
徴とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has an oscillator which oscillates at a color subcarrier frequency of 3579545HZ of the NTSC system, and an oscillation output signal of the oscillator is reduced by 1/35. A first frequency divider that oscillates, a VCO that oscillates with a center frequency of 4500000 HZ that is an audio intercarrier frequency, a second frequency divider that divides the oscillation output signal of the VCO by 1/44, and the first and second frequency dividers. A phase comparator for comparing the phases of the frequency-divided output signals of the two-frequency divider,
And an LPF for smoothing an output signal of the phase comparator and applying the smoothed signal to the VCO as a control voltage of an oscillation frequency.

【0009】[0009]

【発明の実施の形態】図1は、本発明のPLL回路を示
すもので、(11)はクロマ(色)信号の記録再生処理
を行うクロマ信号処理回路、(12)はクロマ信号処理
回路(11)に内蔵され、NTSC方式の色副搬送波周
波数fSCである3579545HZで発振しクロマ信
号の周波数変換に供される発振器、(13)は発振器
(12)の発振出力信号を1/35分周する第1分周
器、(14)はVCO(1)の発振出力信号を1/44
分周する第2分周器、(15)はベースバンドのビデオ
信号が印加される入力端子、(16)はTV受像機のチ
ャンネル2(97.25MHZ)の周波数の搬送波が印加される
入力端子、(17)はVCO(1)からのFM変調され
ている音声インターキャリア周波数信号と入力端子(1
5)からのビデオ信号を入力端子(16)からの搬送波
によって周波数変換された信号が、入力端子(16)か
らの搬送波に応じてAM変調された信号に加えられて出
力端子(18)に導出されるRF混合回路である。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows a PLL circuit according to the present invention. (11) is a chroma signal processing circuit for recording and reproducing chroma (color) signals, and (12) is a chroma signal processing circuit ( An oscillator which is built in 11) and oscillates at 3579545HZ which is a color subcarrier frequency fSC of the NTSC system and is used for frequency conversion of a chroma signal, and (13) divides the oscillation output signal of the oscillator (12) by 1/35. The first frequency divider (14) outputs the oscillation output signal of the VCO (1) by 1/44
A second frequency divider for frequency division, (15) an input terminal to which a baseband video signal is applied, (16) an input terminal to which a carrier having a frequency of a channel 2 (97.25 MHz) of a TV receiver is applied, (17) is a frequency-modulated audio intercarrier frequency signal from the VCO (1) and the input terminal (1).
The signal obtained by frequency-converting the video signal from 5) with the carrier from the input terminal (16) is added to the AM-modulated signal according to the carrier from the input terminal (16), and is derived to the output terminal (18). RF mixing circuit.

【0010】図1において、図2と同一の回路素子、回
路ブロックについては同一の符号を付し説明を省略す
る。本発明では、VTRには、クロマ信号の記録再生処
理を行うクロマ信号処理回路に、NTSC方式の色副搬
送波周波数である3579545HZで発振しクロマ信
号の周波数変換に供される発振器(12)が存在するこ
とに着目し、該発振器(12)を利用してVCO(1)
の周波数を調整するようにしている。
In FIG. 1, the same circuit elements and circuit blocks as those in FIG. 2 are denoted by the same reference numerals, and description thereof will be omitted. In the present invention, the VTR includes an oscillator (12) that oscillates at 3579545 HZ, which is the color subcarrier frequency of the NTSC system, and that is used for frequency conversion of the chroma signal, in the chroma signal processing circuit that performs the recording and reproduction processing of the chroma signal. And the VCO (1) using the oscillator (12).
The frequency of is adjusted.

【0011】発振器(12)の周波数である35795
45HZは、音声インターキャリア周波数である450
0000HZとの間に基準周波数としての最大公約数が
ないので、通常は位相同期させることができないと、考
えられる。しかしながら、ある量の誤差範囲を認めるこ
とにより最大公約数をとり得るようにできる。
35795 which is the frequency of the oscillator (12)
45HZ is 450 which is the voice intercarrier frequency.
Since there is no greatest common divisor as the reference frequency between 0000HZ and 0000HZ, it is considered that phase synchronization cannot be normally performed. However, the greatest common divisor can be obtained by allowing a certain amount of error margin.

【0012】 色副搬送波fSC = 3579545HZ 音声インターキャリア周波数fVC = 4500000HZ(公称値) である。第1分周器(13)の分周数をn、第2分周器
(14)の分周数をm、第1分周器(13)の出力信号
周波数をfrn、VCO(1)の発振周波数をfVCO
1とすると、 frn = fSC/n m≦fVCO1/frn< m+1 となる。この時PLLが動作すると、位相比較器(7)
において周波数が一致する様にフィードバックがかかり
fVCO1=mfrnになる。
The color subcarrier fSC = 35795545HZ, the audio intercarrier frequency fVC = 4500000HZ (nominal). The frequency division number of the first frequency divider (13) is n, the frequency division number of the second frequency divider (14) is m, the output signal frequency of the first frequency divider (13) is frn, and the VCO (1) The oscillation frequency is fVCO
Assuming that 1, frn = fSC / nm ≦ fVCO1 / frn <m + 1. At this time, when the PLL operates, the phase comparator (7)
Feedback is performed so that the frequencies match at fVCO1 = mfrn.

【0013】この時、周波数差△fは、 △f = fVCO1−fVC となる。△f≦1000HZとした時のnの最小値はn
=35となり、この時のmは44となる。その際の周波
数差△fは、0.5HZ7となるので周波数差として十
分に許容できる量となる。
At this time, the frequency difference Δf becomes Δf = fVCO1−fVC. The minimum value of n when Δf ≦ 1000HZ is n
= 35, and m at this time is 44. At this time, the frequency difference Δf is 0.5HZ7, which is a sufficiently allowable frequency difference.

【0014】第1分周器(13)の分周数n、第2分周
器(14)の分周数m、第1分周器(13)の出力信号
周波数をfrn、周波数差△fの関係を図3に示す。図
3に示されるようにN=35以外では周波数差△fは、
非常に大きな値になってしまい、実用化できない。とこ
ろが、n=35と、m=44の組み合わせに限りfVC
O1は公称値に非常に近くなる。
The frequency division number n of the first frequency divider (13), the frequency division number m of the second frequency divider (14), the output signal frequency of the first frequency divider (13) is frn, and the frequency difference Δf Is shown in FIG. As shown in FIG. 3, except for N = 35, the frequency difference Δf is
It becomes a very large value and cannot be put to practical use. However, fVC is limited to the combination of n = 35 and m = 44.
O1 will be very close to the nominal value.

【0015】この為、図1のVCO(1)は、発振器
(12)の正確な周波数に基づき周波数が自動調整され
ることとなる。これにより、VCO(1)よりベースバ
ンドの音声信号により4.5MHZのキャリアをFM変
調した信号が得られ、RF混合回路(17)に印加され
る。
For this reason, the frequency of the VCO (1) in FIG. 1 is automatically adjusted based on the accurate frequency of the oscillator (12). As a result, a signal obtained by FM-modulating a 4.5 MHZ carrier from the VCO (1) with a baseband audio signal is obtained and applied to the RF mixing circuit (17).

【0016】[0016]

【発明の効果】以上述べた如く、本発明によれば、RF
モジュレータのPLL回路に使用される4500000
HZを中心周波数として発振するVCOの中心周波数を
3579545HZで発振し色信号の周波数変換に供さ
れる発振器を用いて自動調整することができる。そのた
め、調整のための格別な発振器が不要となり、ICの外
付け部品や素子数削減が計れIC化に好適である。
As described above, according to the present invention, the RF
4500000 used for modulator PLL circuit
The center frequency of a VCO that oscillates with HZ as the center frequency can be automatically adjusted using an oscillator that oscillates at 3579545 HZ and is used for frequency conversion of color signals. Therefore, a special oscillator for adjustment becomes unnecessary, and the number of external components and elements of the IC can be reduced, which is suitable for the IC.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のPLL回路を示す回路図である。FIG. 1 is a circuit diagram showing a PLL circuit of the present invention.

【図2】従来のPLL回路を示す回路図である。FIG. 2 is a circuit diagram showing a conventional PLL circuit.

【図3】図1の説明に供するための数値表である。FIG. 3 is a numerical table for explanation of FIG. 1;

【符号の説明】[Explanation of symbols]

(1) VCO (7) 位相比較器 (8) LPF (12) 発振器 (13) 第1分周器 (14) 第2分周器 (1) VCO (7) Phase comparator (8) LPF (12) Oscillator (13) First frequency divider (14) Second frequency divider

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 NTSC方式の色副搬送波周波数である
3579545HZで発振する発振器と、 該発振器の発振出力信号を1/35分周する第1分周器
と、 音声インターキャリア周波数である4500000HZ
を中心周波数として発振するVCOと、 該VCOの発振出力信号を1/44分周する第2分周器
と、 前記第1及び第2分周器の分周出力信号を位相比較する
位相比較器と、 該位相比較器の出力信号を平滑し前記VCOに発振周波
数の制御電圧として印加するLPFとを備えることを特
徴とするPLL回路。
1. An oscillator which oscillates at 3579545HZ which is a color subcarrier frequency of the NTSC system, a first frequency divider which divides an oscillation output signal of the oscillator by 1/35, and a voice intercarrier frequency which is 4500000HZ
VCO that oscillates at a center frequency, a second divider that divides the oscillation output signal of the VCO by 1/44, and a phase comparator that compares the phases of the divided output signals of the first and second dividers And a LPF for smoothing an output signal of the phase comparator and applying the same to the VCO as a control voltage of an oscillation frequency.
【請求項2】 NTSC方式の色副搬送波周波数である
3579545HZで発振し色信号の周波数変換に供さ
れる発振器と、 該発振器の発振出力信号を1/35分周する第1分周器
と、 音声インターキャリア周波数である4500000HZ
を中心周波数として発振するVCOと、 該VCOの発振出力信号を1/44分周する第2分周器
と、 前記第1分周器の出力信号を更に分周する第3分周器
と、 前記第2分周器の出力信号を更に分周する第4分周器
と、 前記第3及び第4分周器の分周出力信号を位相比較する
位相比較器と、 該位相比較器の出力信号を平滑し前記VCOに発振周波
数の制御電圧として印加するLPFとを備えることを特
徴とするPLL回路。
2. An oscillator which oscillates at 3579545HZ which is a color subcarrier frequency of the NTSC system and is used for frequency conversion of a chrominance signal, a first frequency divider which divides an oscillation output signal of the oscillator by 1/35, 4500000HZ which is the voice intercarrier frequency
A VCO that oscillates at a center frequency, a second divider that divides the oscillation output signal of the VCO by 1/44, a third divider that further divides the output signal of the first divider, A fourth frequency divider for further dividing the output signal of the second frequency divider, a phase comparator for comparing the phases of the divided output signals of the third and fourth frequency dividers, and an output of the phase comparator And a LPF for smoothing a signal and applying the signal to the VCO as a control voltage of an oscillation frequency.
JP8313855A 1996-11-25 1996-11-25 Pll circuit Pending JPH10164444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8313855A JPH10164444A (en) 1996-11-25 1996-11-25 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8313855A JPH10164444A (en) 1996-11-25 1996-11-25 Pll circuit

Publications (1)

Publication Number Publication Date
JPH10164444A true JPH10164444A (en) 1998-06-19

Family

ID=18046325

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8313855A Pending JPH10164444A (en) 1996-11-25 1996-11-25 Pll circuit

Country Status (1)

Country Link
JP (1) JPH10164444A (en)

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