JPH10163531A - Light-emitting diode having electrode at periphery - Google Patents

Light-emitting diode having electrode at periphery

Info

Publication number
JPH10163531A
JPH10163531A JP33165996A JP33165996A JPH10163531A JP H10163531 A JPH10163531 A JP H10163531A JP 33165996 A JP33165996 A JP 33165996A JP 33165996 A JP33165996 A JP 33165996A JP H10163531 A JPH10163531 A JP H10163531A
Authority
JP
Japan
Prior art keywords
electrode
light emitting
emitting diode
semiconductor layer
peripheral
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP33165996A
Other languages
Japanese (ja)
Other versions
JP3244010B2 (en
Inventor
Motokazu Yamada
元量 山田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Chemical Industries Ltd
Original Assignee
Nichia Chemical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Chemical Industries Ltd filed Critical Nichia Chemical Industries Ltd
Priority to JP33165996A priority Critical patent/JP3244010B2/en
Publication of JPH10163531A publication Critical patent/JPH10163531A/en
Application granted granted Critical
Publication of JP3244010B2 publication Critical patent/JP3244010B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To minimize the reduction of the light-emitting output and lower the forward voltage. SOLUTION: A light-emitting diode having an electrode at the periphery comprises a nitride semiconductor layer, including a light-emitting layer on a square flat substrate, and a pair of p and n-electrodes 5, 4, formed on the surface on which the nitride semiconductor layer, is formed. The diode has a square flat shape, as seen from the electrodes disposed at the corners of the diode along its diagonal line. One of the paired p and n-electrodes 5, 4 is connected to a peripheral electrode 7 disposed at the periphery of the diode, and the other is connected to a transparent electrode 6 disposed inside the peripheral electrode 7.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体発光ダイオー
ドに関し、とくに、動作電圧を低くできる発光ダイオー
ドに関する。本明細書において、「発光ダイオード」は
レーザーダイオードを含む広い意味に使用する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting diode, and more particularly, to a light emitting diode capable of reducing an operating voltage. In this specification, "light emitting diode" is used in a broad sense including a laser diode.

【0002】[0002]

【従来の技術】絶縁性基板の同じ面に、p電極とn電極
を設けた窒化物半導体層を有する発光ダイオードの平面
図を図1に、断面図を図2に示す。この図の発光ダイオ
ードは、絶縁性基板1の上にn型窒化物半導体層2とp
型窒化物半導体層3とを積層している。p型窒化物半導
体層3は、n電極4を設ける隅部を除いた部分に設け、
p型窒化物半導体層3のない隅部にn電極4を配設して
いる。p型窒化物半導体層3は、表面に透明電極6を積
層し、この透明電極6の隅部にp電極5を接続してい
る。
2. Description of the Related Art FIG. 1 is a plan view of a light-emitting diode having a nitride semiconductor layer provided with a p-electrode and an n-electrode on the same surface of an insulating substrate, and FIG. The light emitting diode of this figure has an n-type nitride semiconductor layer 2
Type nitride semiconductor layer 3. The p-type nitride semiconductor layer 3 is provided in a portion excluding a corner where the n-electrode 4 is provided,
An n-electrode 4 is provided at a corner where no p-type nitride semiconductor layer 3 exists. The transparent electrode 6 is laminated on the surface of the p-type nitride semiconductor layer 3, and the p-electrode 5 is connected to a corner of the transparent electrode 6.

【0003】この図に示す発光ダイオードは、p電極5
から供給される電流を、透明電極6でp型窒化物半導体
層3の全面に拡散して流すことができる。このため、p
n接合で発光する光を、透明電極6から外部に効率よく
取り出しできる特長がある。ただ、発光層を窒化物半導
体層とする発光ダイオードは、規定の電流を流すために
p電極とn電極とに加える電圧、すなわち、順方向電圧
Vfが高い。赤色の発光ダイオードは、20mA定格電
流を流す順方向電圧Vfが約2Vである。これに対し
て、窒化物半導体層の発光ダイオードは、同じ電流を流
す順方向電圧Vfが、約3.5Vである。順方向電圧V
fが高いことは、たとえば、電池駆動の用途に著しく制
約を受けることがある。このため、窒化物半導体層の発
光ダイオードは、順方向電圧Vfをできる限り低くする
ことが切望されている。
The light emitting diode shown in FIG.
Can be diffused by the transparent electrode 6 and flow over the entire surface of the p-type nitride semiconductor layer 3. Therefore, p
There is a feature that light emitted at the n-junction can be efficiently extracted to the outside from the transparent electrode 6. However, in a light emitting diode using a light emitting layer as a nitride semiconductor layer, a voltage applied to a p electrode and an n electrode to flow a specified current, that is, a forward voltage Vf is high. The red light emitting diode has a forward voltage Vf of approximately 2 V at which a rated current of 20 mA flows. On the other hand, in the light emitting diode of the nitride semiconductor layer, the forward voltage Vf for flowing the same current is about 3.5V. Forward voltage V
High f may, for example, severely limit battery-powered applications. For this reason, it is desired that the light emitting diode of the nitride semiconductor layer have the forward voltage Vf as low as possible.

【0004】発光ダイオードの順方向電圧Vfは、たと
えば、特開昭54−6787号公報に記載されるよう
に、外周に沿って電極を設ける構造で低くできる。この
公報に記載される発光ダイオードは、図3に示すよう
に、外周の全体と、その中心部とに一対の電極を配設し
ている。この電極構造の発光ダイオードは、絶縁性基板
1を四角い平面形状として、その片面に、リング状の周
縁電極7と、この周縁電極7の中心に他方の電極8を配
設している。
[0004] The forward voltage Vf of a light emitting diode can be reduced by a structure in which electrodes are provided along the outer periphery, as described in, for example, JP-A-54-6787. As shown in FIG. 3, the light-emitting diode described in this publication has a pair of electrodes disposed on the entire outer periphery and the center thereof. In the light emitting diode having this electrode structure, the insulating substrate 1 has a square planar shape, and a ring-shaped peripheral electrode 7 is provided on one surface thereof, and the other electrode 8 is provided at the center of the peripheral electrode 7.

【0005】[0005]

【発明が解決しようとする課題】この構造の発光ダイオ
ードは、順方向電圧Vfを低くできるが、絶縁性基板1
の四隅部を発光できないので、全体として発光出力が小
さくなる欠点がある。さらに、周縁電極7を幅の狭いリ
ング状とするので、ワイヤーボンドを確実に接続できな
い欠点がある。さらにまた、ワイヤーボンドするため
に、中心の電極8を大きくすると、発光面積が小さくな
って、全体としての発光出力が低下する欠点がある。
In the light emitting diode of this structure, the forward voltage Vf can be lowered, but the insulating substrate 1
Since the four corners cannot emit light, there is a disadvantage that the light emission output is reduced as a whole. Further, since the peripheral electrode 7 is formed in a narrow ring shape, there is a disadvantage that wire bonds cannot be reliably connected. Furthermore, if the center electrode 8 is enlarged for wire bonding, there is a disadvantage that the light emitting area is reduced and the light emitting output as a whole is reduced.

【0006】すなわち、図1に示すように、ワイヤーボ
ンドする電極を対角線上に配設する発光ダイオードは、
発光領域を広くして発光出力を大きくできるが、順方向
電圧Vfが高くなる。図3に示すように、中心とその周
縁に電極を配設すると、順方向電圧Vfを低くできる
が、発光領域が狭くなって発光出力が弱くなる欠点があ
る。
That is, as shown in FIG. 1, a light emitting diode in which electrodes to be wire-bonded are arranged diagonally is
Although the light emitting area can be widened to increase the light emitting output, the forward voltage Vf increases. As shown in FIG. 3, when electrodes are provided at the center and the periphery thereof, the forward voltage Vf can be reduced, but there is a disadvantage that the light emitting region is narrowed and the light emitting output is weakened.

【0007】本発明は、これ等の欠点を解消することを
目的に開発されたものである。本発明の重要な目的は、
互いに相反する特性である、発光出力の低下を最小にし
て、しかも順方向電圧Vfを低くできる発光ダイオード
を提供することにある。
[0007] The present invention has been developed for the purpose of eliminating these disadvantages. An important object of the present invention is
It is an object of the present invention to provide a light emitting diode in which a decrease in light emission output, which is a characteristic contradictory to each other, can be minimized and the forward voltage Vf can be reduced.

【0008】[0008]

【課題を解決するための手段】本発明の請求項1に記載
する発光ダイオードは、前述の目的を達成するために下
記の構成を備える。発光ダイオードは、四角い平面形状
の基板1の上に、発光層を含む窒化物半導体層が積層さ
れており、その窒化物半導体層の同一面側に、p電極5
とn電極4からなる一対の電極を形成している。
According to a first aspect of the present invention, there is provided a light emitting diode having the following configuration to achieve the above object. In the light emitting diode, a nitride semiconductor layer including a light emitting layer is laminated on a substrate 1 having a square planar shape, and a p electrode 5 is provided on the same surface side of the nitride semiconductor layer.
And a pair of electrodes consisting of an n-electrode 4.

【0009】さらに、本発明の発光ダイオードは、電極
側から見て四角い平面形状をしており、p電極5とn電
極4を、四角い発光ダイオードの隅部に位置して対角線
上に配設している。p電極5とn電極4からなる一対の
電極は、一方の電極に周縁電極7を接続し、他方の電極
には透明電極6を接続している。周縁電極7は、発光ダ
イオードの外周縁に沿って設けられ、透明電極6は、周
縁電極7の内側に設けられている。
Further, the light-emitting diode of the present invention has a square planar shape when viewed from the electrode side, and the p-electrode 5 and the n-electrode 4 are arranged diagonally at the corners of the square light-emitting diode. ing. A pair of electrodes composed of a p-electrode 5 and an n-electrode 4 has a peripheral electrode 7 connected to one electrode and a transparent electrode 6 connected to the other electrode. The peripheral electrode 7 is provided along the outer peripheral edge of the light emitting diode, and the transparent electrode 6 is provided inside the peripheral electrode 7.

【0010】請求項1に記載される発光ダイオードの平
面図を図4に、断面図を図5に示す。これ等の図に示す
発光ダイオードは、四角い平面形状の隅部に位置して、
対角線上にワイヤーボンドするためのp電極5とn電極
4を配設している。n電極4には周縁電極7を接続し、
p電極5には透明電極6を接続している。周縁電極7
は、四角い発光ダイオードの外周縁に設けられ、透明電
極6は、この周縁電極7の内側に配設されている。
FIG. 4 is a plan view of the light emitting diode according to the first embodiment, and FIG. 5 is a sectional view of the light emitting diode. The light emitting diodes shown in these figures are located at the corners of a square planar shape,
The p-electrode 5 and the n-electrode 4 for diagonal wire bonding are provided. A peripheral electrode 7 is connected to the n-electrode 4,
A transparent electrode 6 is connected to the p-electrode 5. Peripheral electrode 7
Is provided on the outer peripheral edge of the square light emitting diode, and the transparent electrode 6 is disposed inside the peripheral electrode 7.

【0011】この電極構造の発光ダイオードは、p電極
5とn電極4の面積を大きくして、確実にワイヤーボン
ドできる。また、発光層の発光を透明電極6から外部に
効率よく放射できる特長がある。さらに、全周に周縁電
極7を設けているので、順方向電圧Vfを低くできる特
長もある。
In the light-emitting diode having this electrode structure, the area of the p-electrode 5 and the n-electrode 4 can be increased so that wire bonding can be performed reliably. In addition, there is a feature that light emitted from the light emitting layer can be efficiently emitted from the transparent electrode 6 to the outside. Further, since the peripheral electrode 7 is provided on the entire circumference, there is a feature that the forward voltage Vf can be reduced.

【0012】ただ、この構造の発光ダイオードは、図1
に示す発光ダイオードに比較すると、p型窒化物半導体
層3と透明電極6の面積が小さくなって、全体としての
発光出力が低下する欠点がある。すなわち、図1に示す
ように、p型窒化物半導体層3と透明電極6の面積を大
きくすると、発光出力は大きくなるが順方向電圧Vfが
高くなり、図4に示すように、周縁に周縁電極7を設け
ると順方向電圧Vfは低下するが、発光出力が低下する
欠点がある。
However, the light emitting diode having this structure is similar to that of FIG.
As compared with the light emitting diode shown in (1), there is a disadvantage that the area of the p-type nitride semiconductor layer 3 and the transparent electrode 6 is reduced, and the light emission output as a whole is reduced. That is, as shown in FIG. 1, when the area of the p-type nitride semiconductor layer 3 and the transparent electrode 6 is increased, the light emission output is increased, but the forward voltage Vf is increased, and as shown in FIG. When the electrode 7 is provided, the forward voltage Vf decreases, but there is a disadvantage that the light emission output decreases.

【0013】さらに、この欠点を解消する発光ダイオー
ドが請求項2に記載する発光ダイオードである。請求項
2に記載する発光ダイオードは、前述の目的を達成する
ために、図6に示すように、周縁電極を独特の構成とし
ている。周縁電極7は、透明電極6に電気接続される電
極を設けている隅部で切欠しており、透明電極6に接続
される電極を設けられた隅部を除く外周部に設けてい
る。
Further, a light emitting diode which solves this drawback is the light emitting diode according to the second aspect. In the light emitting diode according to the second aspect, in order to achieve the above-mentioned object, the peripheral electrode has a unique configuration as shown in FIG. The peripheral electrode 7 is notched at a corner where an electrode electrically connected to the transparent electrode 6 is provided, and is provided at an outer peripheral portion excluding the corner where the electrode connected to the transparent electrode 6 is provided.

【0014】さらにまた、本発明の請求項3に記載する
発光ダイオードは、周縁電極7をn電極4に接続し、透
明電極6をp電極5に接続している。
Further, in the light-emitting diode according to the third aspect of the present invention, the peripheral electrode 7 is connected to the n-electrode 4 and the transparent electrode 6 is connected to the p-electrode 5.

【0015】また、本発明の請求項4に記載する発光ダ
イオードは、n電極4とp電極5との形状が、互いに異
なる平面形状を有する。
In the light emitting diode according to a fourth aspect of the present invention, the shapes of the n-electrode 4 and the p-electrode 5 are different from each other.

【0016】[0016]

【発明の実施の形態】以下、本発明の実施例を図面に基
づいて説明する。ただし、以下に示す実施例は、本発明
の技術思想を具体化するための発光ダイオードを例示す
るものであって、本発明は発光ダイオードを下記のもの
に特定しない。
Embodiments of the present invention will be described below with reference to the drawings. However, the embodiments described below exemplify light emitting diodes for embodying the technical idea of the present invention, and the present invention does not specify the light emitting diodes as follows.

【0017】さらに、この明細書は、特許請求の範囲を
理解し易いように、実施例に示される部材に対応する番
号を、「特許請求の範囲の欄」、および「課題を解決す
るための手段の欄」に示される部材に付記している。た
だ、特許請求の範囲に示される部材を、実施例の部材に
特定するものでは決してない。
Further, in this specification, in order to make it easy to understand the claims, the numbers corresponding to the members shown in the embodiments will be referred to as "claims" and "claims". In the column of “means”. However, the members described in the claims are not limited to the members of the embodiments.

【0018】図4ないし図7は、本発明の実施例の発光
ダイオードを示す。これ等の図に示す発光ダイオード
は、四角い平面形状の絶縁性基板1の上に、発光層を含
む窒化物半導体層を積層しており、窒化物半導体層の同
一面側、図5と図7において上面に、p電極5とn電極
4からなる一対の電極を設けている。p電極5とn電極
4は、互いに異なる平面形状をしている。p電極5は方
形状で、n電極4は、図において右下のコーナー部を湾
曲させる形状としている。
FIGS. 4 to 7 show a light emitting diode according to an embodiment of the present invention. In the light emitting diodes shown in these figures, a nitride semiconductor layer including a light emitting layer is stacked on an insulating substrate 1 having a square planar shape, and the same side of the nitride semiconductor layer as shown in FIGS. , A pair of electrodes including a p-electrode 5 and an n-electrode 4 is provided on the upper surface. The p electrode 5 and the n electrode 4 have different plane shapes from each other. The p-electrode 5 has a square shape, and the n-electrode 4 has a shape in which a lower right corner in the figure is curved.

【0019】さらに、図に示す発光ダイオードは、電極
側である上面から見て、図4と図6に示すように、四角
い平面形状をしている。また、p電極5とn電極4を、
四角い発光ダイオードの隅部に位置して対角線上に配設
している。図の発光ダイオードは、n電極4を左上の隅
部に、p電極5を右下の隅部に配設している。
Further, the light emitting diode shown in the figure has a square planar shape as shown in FIGS. 4 and 6 when viewed from the upper surface on the electrode side. Also, the p electrode 5 and the n electrode 4 are
It is located diagonally and located at the corner of a square light emitting diode. In the illustrated light emitting diode, the n-electrode 4 is disposed at the upper left corner, and the p-electrode 5 is disposed at the lower right corner.

【0020】基板1に積層される、発光層を含む窒化物
半導体層は、バッファ層9を介して基板1に積層される
n型窒化物半導体層2と、このn型窒化物半導体層2に
積層される多重半導体層10とからなっている。バッフ
ァ層9とn型窒化物半導体層2とは、四角い平面形状の
絶縁性基板1の全面に設けられている。したがって、こ
れ等の層は、基板1と同じ外形の四角い平面形状をして
いる。
The nitride semiconductor layer including the light emitting layer laminated on the substrate 1 includes an n-type nitride semiconductor layer 2 laminated on the substrate 1 with a buffer layer 9 interposed between the n-type nitride semiconductor layer 2 and the n-type nitride semiconductor layer 2. And multiple semiconductor layers 10 to be stacked. The buffer layer 9 and the n-type nitride semiconductor layer 2 are provided on the entire surface of the square planar insulating substrate 1. Therefore, these layers have a square planar shape having the same outer shape as the substrate 1.

【0021】多重半導体層10は、n電極4と周縁電極
7を設ける平面を除く部分に設けられている。さらに、
多重半導体層10は、n電極4に接触しないように、n
電極4と周縁電極7から多少離して積層されている。図
6の発光ダイオードは、左上の隅部にn電極4を、右下
の隅部を除く外周縁に周縁電極7を設けている。このた
め、多重半導体層10は、n電極4が設けられる左上の
隅部と、周縁電極7が設けられる周縁部との平面を除く
部分に積層されている。さらに、図7に示す発光ダイオ
ードは、多重半導体層10を、n型窒化物半導体層2の
外周縁よりも多少内側に位置する外形に形成して、その
外周面をSiO2の保護膜11で被覆している。
The multiple semiconductor layer 10 is provided in a portion other than a plane on which the n-electrode 4 and the peripheral electrode 7 are provided. further,
The multiple semiconductor layers 10 have n
The electrode 4 and the peripheral electrode 7 are laminated with a certain distance therebetween. The light emitting diode of FIG. 6 has an n-electrode 4 at the upper left corner and a peripheral electrode 7 at the outer peripheral edge excluding the lower right corner. For this reason, the multiple semiconductor layer 10 is laminated on a portion excluding the plane of the upper left corner where the n-electrode 4 is provided and the peripheral portion where the peripheral electrode 7 is provided. Further, in the light emitting diode shown in FIG. 7, the multiple semiconductor layer 10 is formed to have an outer shape located slightly inside the outer peripheral edge of the n-type nitride semiconductor layer 2, and the outer peripheral surface is covered with a protective film 11 of SiO 2. Coated.

【0022】p電極5とn電極4からなる一対の電極
は、一方の電極であるn電極4に周縁電極7を接続して
いる。他方の電極となるp電極5には透明電極6を接続
している。周縁電極7は、発光ダイオードの外周縁に沿
って設けられ、透明電極6は、周縁電極7の内側に設け
られている。図に示す発光ダイオードは、周縁電極7を
n型窒化物半導体層2の外周縁に沿って設けているが、
n電極4とn型窒化物半導体層2の外周縁をぴったりと
一致させる形状としていない。n電極4の外側縁は、n
型窒化物半導体層2の外側にほぼ一致しているが、多少
内側に位置するように配設している。周縁電極7に加え
て、n電極4とp電極5も、発光ダイオードの外周縁よ
りも多少内側に配設している。
A pair of electrodes consisting of a p-electrode 5 and an n-electrode 4 connects a peripheral electrode 7 to one n-electrode 4. A transparent electrode 6 is connected to a p-electrode 5 serving as the other electrode. The peripheral electrode 7 is provided along the outer peripheral edge of the light emitting diode, and the transparent electrode 6 is provided inside the peripheral electrode 7. In the light emitting diode shown in the figure, the peripheral electrode 7 is provided along the outer peripheral edge of the n-type nitride semiconductor layer 2,
The shape is not such that the outer periphery of the n-electrode 4 and the n-type nitride semiconductor layer 2 exactly match. The outer edge of the n-electrode 4 is n
It is arranged so as to substantially coincide with the outside of the type nitride semiconductor layer 2 but to be located slightly inside. In addition to the peripheral electrode 7, the n-electrode 4 and the p-electrode 5 are also arranged slightly inside the outer peripheral edge of the light emitting diode.

【0023】さらに、図4の発光ダイオードは、周縁に
配設される周縁電極7を全周に設けているが、図6の発
光ダイオードは、周縁電極7を、全周には設けていな
い。周縁電極7は、p電極5を設けている右下の隅部で
切欠して、p電極5を設けている隅部を除く外周部に設
けられる。図6の発光ダイオードは、右下の隅部にp電
極5を設け、左上の隅部にn電極4を設け、p電極5と
n電極4を設けている隅部を除く周縁に沿って周縁電極
7を設けている。周縁電極7は、p電極5に接触しない
ように、p電極5から離して、n電極4に接続して設け
ている。
Further, the light-emitting diode of FIG. 4 has the peripheral electrode 7 arranged on the entire periphery, but the light-emitting diode of FIG. 6 does not have the peripheral electrode 7 on the entire periphery. The peripheral electrode 7 is cut off at the lower right corner where the p electrode 5 is provided, and is provided on the outer peripheral portion excluding the corner where the p electrode 5 is provided. The light emitting diode of FIG. 6 is provided with a p-electrode 5 at the lower right corner, an n-electrode 4 at the upper left corner, and a periphery along the periphery except for the corner where the p-electrode 5 and the n-electrode 4 are provided. An electrode 7 is provided. The peripheral electrode 7 is provided separately from the p electrode 5 and connected to the n electrode 4 so as not to contact the p electrode 5.

【0024】n電極4と周縁電極7は、n型窒化物半導
体層2に、AlとTi、あるいはAlとWを2μmの膜
厚に蒸着して設けられる。
The n-electrode 4 and the peripheral electrode 7 are provided by depositing Al and Ti or Al and W to a thickness of 2 μm on the n-type nitride semiconductor layer 2.

【0025】透明電極6は、多重半導体層10の最表面
に、例えばPd(パラジウム)を30オングストローム
の膜厚で蒸着して設けられる。蒸着後、Pd膜は透光性
を示す。透明電極6は、多重半導体層10のほぼ全面に
形成して、良好なオーミック接触を得るとともに、電流
を多重半導体層10全体に均一に広げる。透明電極6を
設けた後、透明電極6の右下の隅部に、AuとNiを含
むp電極5を2μmの膜厚で形成する。n電極4は、透
明電極6とp電極5を蒸着した後、露出したn型窒化物
半導体層2に蒸着して設けられる。透明電極6とp電極
5とn電極4は、最後にアニール装置で400℃以上で
熱処理して、合金化させる。
The transparent electrode 6 is provided on the outermost surface of the multiple semiconductor layer 10 by depositing, for example, Pd (palladium) to a thickness of 30 angstroms. After the deposition, the Pd film shows a light-transmitting property. The transparent electrode 6 is formed on almost the entire surface of the multiple semiconductor layer 10 to obtain a good ohmic contact and spread the current uniformly over the entire multiple semiconductor layer 10. After the transparent electrode 6 is provided, a p-electrode 5 containing Au and Ni is formed in a thickness of 2 μm at the lower right corner of the transparent electrode 6. The n-electrode 4 is provided by evaporating the transparent electrode 6 and the p-electrode 5 and then evaporating the exposed n-type nitride semiconductor layer 2. Finally, the transparent electrode 6, the p-electrode 5, and the n-electrode 4 are heat-treated at 400 ° C. or more by an annealing device to be alloyed.

【0026】透明電極6には、NiとAuを含む金属の
他、Pdに加えて、白金(Pt)、ロジウム(Rh)、
ルテニウム(Ru)、オスミウム(Os)、イリジウム
(Ir)、ニッケル(Ni)、金(Au)よりなる群か
ら選択された少なくともー種の金属を含むことできる。
これらの元素をPdに添加する透明電極6は、多重半導
体層10とのオーミック性を損なうことなく、電極の透
光性を保つことができる。なお添加した後の電極構造と
しては、薄膜を積層した積層構造でも良いし、積層構造
が熱アニールされて合金化された状態でも良く、また最
初から合金の状態としても良い。中でも、PdにAuを
添加する透明電極は、Auを含むポンディングパッド電
極と接着性が良いので、非常に好ましい。透明電極6
は、膜厚を50nm以下、さらに好ましくは20nm以
下として、好ましい透光性を示す。
The transparent electrode 6 includes platinum (Pt), rhodium (Rh),
At least one metal selected from the group consisting of ruthenium (Ru), osmium (Os), iridium (Ir), nickel (Ni), and gold (Au) can be included.
The transparent electrode 6 in which these elements are added to Pd can maintain the translucency of the electrode without impairing the ohmic property with the multiple semiconductor layers 10. The electrode structure after the addition may be a laminated structure in which thin films are laminated, may be in a state where the laminated structure is thermally annealed and alloyed, or may be in an alloy state from the beginning. Above all, a transparent electrode in which Au is added to Pd is very preferable because it has good adhesion to a bonding pad electrode containing Au. Transparent electrode 6
Shows a preferable translucency when the film thickness is 50 nm or less, more preferably 20 nm or less.

【0027】多重半導体層10が積層されるn型窒化物
半導体層2は、n型クラッド層兼n型コンタクト層であ
る。この層に積層される多重半導体層10は、単一量子
井戸、もしくは多重量子井戸構造を有する窒化物半導体
層の活性層10Aと、p型窒化物半導体層のp型クラッ
ド層10Bと、p型GaNのp型コンタクト層10Cと
からなり、このp型コンタクト層10のほぼ全面(70
%以上の面積)に透明電極6を積層している。
The n-type nitride semiconductor layer 2 on which the multiple semiconductor layers 10 are stacked is an n-type clad layer and an n-type contact layer. The multiple semiconductor layer 10 laminated on this layer includes an active layer 10A of a nitride semiconductor layer having a single quantum well or a multiple quantum well structure, a p-type cladding layer 10B of a p-type nitride semiconductor layer, and a p-type A GaN p-type contact layer 10C is formed.
% Or more) of the transparent electrode 6.

【0028】基板1は、サファイア(Al23、A面、
R面、C面を含む)基板である。ただ、サファイア基板
の他、スピネル(MgAl24)、SiC(6H、4
H、3Cを含む)、ZnS、Zn0、GaAs、GaN
等、窒化物半導体を成長できる全ての材料を使用するこ
ともできるが、通常はサファイアが用いられることが多
い。
The substrate 1 is made of sapphire (Al 2 O 3 , A surface,
(Including the R plane and the C plane). However, in addition to the sapphire substrate, spinel (MgAl 2 O 4 ), SiC (6H, 4
H, 3C), ZnS, Zn0, GaAs, GaN
For example, any material that can grow a nitride semiconductor can be used, but sapphire is often used.

【0029】バッファ層9は、基板1の全面に積層され
る。バッファ層9は、基板1と窒化物半導体層との間に
積層されて、窒化物半導体層の結晶性を改善する。バッ
ファ層9は、例えばGaN、AlN、GaAlN、Zn
O等である。バッファ層9は、絶縁性基板1と窒化物半
導体層との格子不整合を緩和するために、通常、5nm
〜0.5 μmの膜厚で成長される。絶縁性基板に、窒
化物半導体層と格子定数の近いもの、あるいは、格子定
数の一致した基板を用いる場合には、バッファ層は必ず
しも必要としない。絶縁性基板の表面に格子欠陥の少な
い窒化物半導体層が成長できるからである。
The buffer layer 9 is laminated on the entire surface of the substrate 1. The buffer layer 9 is stacked between the substrate 1 and the nitride semiconductor layer to improve the crystallinity of the nitride semiconductor layer. The buffer layer 9 is made of, for example, GaN, AlN, GaAlN, Zn.
O and the like. The buffer layer 9 has a thickness of typically 5 nm in order to reduce lattice mismatch between the insulating substrate 1 and the nitride semiconductor layer.
It is grown to a thickness of about 0.5 μm. When a substrate having a lattice constant close to that of the nitride semiconductor layer or a substrate having the same lattice constant is used as the insulating substrate, the buffer layer is not necessarily required. This is because a nitride semiconductor layer with few lattice defects can be grown on the surface of the insulating substrate.

【0030】n型クラッド層兼n型コンタクト層も、基
板1の全面に成長される。この層は、InaAlbGa
1-a-bN(0≦a、0≦b、a+b≦1)で表される窒
化物半導体層である。この層は、好ましくは、GaN、
a値を0.5以下とするInaGa1-aN、またはb値を
0.5以下とするAlbGal-bNである。n型クラッド
層の膜厚は特に限定するものではないが、n型コンタク
ト層として兼用するためには、0.5μm〜5μm程度
の膜厚で成長させることが望ましい。窒化物半導体層
は、ノンドープの状態で結晶中にできる窒素空孔のため
にn型となる性質がある。ただ、通常は、Si、Ge、
Se等のドナ一不純物を結晶成長中にドープする。キヤ
リア濃度の高い好ましいn型とするためである。
An n-type clad layer and an n-type contact layer are also grown on the entire surface of the substrate 1. This layer is composed of In a Al b Ga
This is a nitride semiconductor layer represented by 1-abN (0 ≦ a, 0 ≦ b, a + b ≦ 1). This layer is preferably GaN,
In a Ga 1-a N with an a value of 0.5 or less, or Al b Ga lb N with a b value of 0.5 or less. Although the thickness of the n-type cladding layer is not particularly limited, it is preferable that the n-type cladding layer is grown to a thickness of about 0.5 μm to 5 μm in order to serve also as the n-type contact layer. The nitride semiconductor layer has an n-type property due to nitrogen vacancies formed in the crystal in a non-doped state. However, usually, Si, Ge,
A single impurity such as Se is doped during crystal growth. This is for obtaining a preferable n-type having a high carrier concentration.

【0031】活性層10Aは、単一量子井戸(SQW:
Single-Quantum-Well)構造、もしくは、多重量子井戸
(MQW:Multi-Quantum-Well)構造を有する、Inx
Ga1 -xN(0<X≦1)である。SQW構造、もしく
はMQW構造とすると、非常に出力の高い発光素子が得
られる。SQW、MQWとは、InGaNのバンドエネ
ルギーによる、量子準位間の発光が得られる活性層であ
る。例えば、SQWでは、活性層を単一組成のInx
1-xN(0<X≦1)で構成した層である。この層
は、膜厚を10nm以下、さらに好ましくは7nm以下
として量子準位間の強い発光が得られる。MQWは、組
成比の異なるInxGa1-XN(この場合X=0、X=1
を含む)の薄膜を、複数積層した多層膜である。活性層
10AをSQW、MQWとする発光ダイオードは、量子
準位間発光で、約365nm〜660nmの発光を実現
する。
The active layer 10A has a single quantum well (SQW:
In x having a single-quantum-well (MQW) structure or a multi-quantum-well (MQW) structure
Ga 1 a -x N (0 <X ≦ 1 ). With the SQW structure or the MQW structure, a light-emitting element with extremely high output can be obtained. SQW and MQW are active layers that can emit light between quantum levels due to the band energy of InGaN. For example, in SQW, the active layer is formed of a single composition In x G
a 1-x N (0 <X ≦ 1) This layer has a thickness of 10 nm or less, more preferably 7 nm or less, to obtain strong light emission between quantum levels. The MQW is In x Ga 1 -xN (X = 0, X = 1 in this case) having different composition ratios.
Is a multilayer film in which a plurality of thin films are included. The light emitting diode in which the active layer 10A is SQW and MQW realizes light emission of about 365 nm to 660 nm by quantum level light emission.

【0032】活性層10Aに接するp型クラッド層10
Bは、p型AlYGa1-YN(0<Y≦1)である。この
層は、好ましくは、Y値を0.05以上とする。高出力
の素子とするためである。さらに、AlGaNは高キャ
リア濃度のp型が得やすい。また、成長時に分解しにく
く、InGaN活性層の分解を抑える作用がある。さら
に、この層は、InGaN活性層に対し、バンドオフセ
ットおよび屈折率差を他の窒化物半導体に比べて大きく
できる。
P-type cladding layer 10 in contact with active layer 10A
B is p-type Al Y Ga 1-Y N (0 <Y ≦ 1). This layer preferably has a Y value of 0.05 or more. This is because a high-output element is used. Further, AlGaN is easy to obtain a p-type with a high carrier concentration. Further, it is hardly decomposed during growth, and has an effect of suppressing the decomposition of the InGaN active layer. Further, this layer can make the band offset and the refractive index difference larger than those of other nitride semiconductors with respect to the InGaN active layer.

【0033】p型クラッド層10Bの膜厚は、1nm以
上、2μm以下、さらに好ましくは5nm以上、0.5
μm以下である。1nmよりも薄いと、p型クラッド層
が存在しない状態に近くなり、発光出力が低下する。2
μmより厚いと、結晶成長中にp型クラッド層自体にク
ラックが入りやすくなる。窒化物半導体層をp型とする
には、結晶成長中に、Mg、Zn、C、Be、Ca、B
a等のアクセプター不純物をドープする。さらに、高キ
ャリア濃度のp層を得るために、アクセプター不純物を
ドーブした後、窒素、アルゴン等の不活性ガス雰囲気中
で、400℃以上でアニーリングする。また、アニーリ
ングに代わって電子線照射してキャリヤ濃度を高くする
こともできる。
The thickness of the p-type cladding layer 10B is 1 nm or more and 2 μm or less, more preferably 5 nm or more and 0.5
μm or less. If the thickness is less than 1 nm, the state becomes close to a state where the p-type cladding layer does not exist, and the light emission output is reduced. 2
If the thickness is larger than μm, cracks easily occur in the p-type cladding layer itself during crystal growth. To make the nitride semiconductor layer p-type, Mg, Zn, C, Be, Ca, B
Doping with an acceptor impurity such as a. Further, in order to obtain a p-layer having a high carrier concentration, after doping an acceptor impurity, annealing is performed at 400 ° C. or more in an atmosphere of an inert gas such as nitrogen or argon. In addition, the carrier concentration can be increased by irradiating an electron beam instead of annealing.

【0034】p型コンタクト層10Cは、p型GaN、
好ましくはMgドーブp型GaNである。p型コンタク
ト層10Cは、透明電極6と接する層であるので、透明
電極6にオーミック接触することが大切である。p型G
aNは、多くの金属とオーミックが取りやすく、コンタ
クト層として最も好ましい。
The p-type contact layer 10C is made of p-type GaN,
Preferably, it is Mg dove p-type GaN. Since the p-type contact layer 10C is a layer that is in contact with the transparent electrode 6, it is important to make ohmic contact with the transparent electrode 6. p-type G
aN easily forms ohmic contact with many metals, and is most preferable as a contact layer.

【0035】以上の構造の窒化物半導体層は、有機金属
気相成長法(MOVPE)、ハライド気相成長法(HD
VPE)、分子線気相成長法(MBE)等の気相成長法
によって絶縁性基板1に成長できる。その中でもMOV
PE法によると、迅速に結晶性の良いものが得られる。
MOVPE法では、GaソースとしてはTMG(トリメ
チルガリウム)、TEG(トリエチルガリウム)、Al
ソースとしてはTMA(トリメチルアルミニウム)、T
EA(トリエチルアルミニウム)、Inソースとして
は、TMI(トリメチルインジウム)、TEI(トリエ
チルインジウム)等のトリアルキル金属化合物が多く用
いられ、窒素源としてはアンモニア、ヒドラジン等のガ
スが用いられる。また不純物ソースとしてはSiであれ
ばシランガス、Geであればゲルマンガス、Mgであれ
ばCp2Mg(シクロペンタジエニルマグネシウム)、
ZnであればDEZ(ジエチルジンク)等のガスが用い
られる。MOVPE法ではこれらのガスを、例えば60
0℃以上に加熱された基板の表面に供給して、ガスを分
解することにより、InxAlYGa1-x-YN(0≦X、
0≦Y、X+Y≦1)をエピタキシャル成長させること
ができる。
The nitride semiconductor layer having the above structure can be formed by metal organic chemical vapor deposition (MOVPE) or halide vapor deposition (HDV).
(VPE), molecular beam vapor deposition (MBE), or another vapor phase growth method. MOV among them
According to the PE method, a material having good crystallinity can be obtained quickly.
In the MOVPE method, as a Ga source, TMG (trimethylgallium), TEG (triethylgallium), Al
TMA (trimethylaluminum), T
As EA (triethylaluminum) and In sources, trialkyl metal compounds such as TMI (trimethylindium) and TEI (triethylindium) are often used, and as a nitrogen source, a gas such as ammonia or hydrazine is used. As the impurity source, silane gas for Si, germane gas for Ge, Cp 2 Mg (cyclopentadienyl magnesium) for Mg,
For Zn, a gas such as DEZ (diethyl zinc) is used. In the MOVPE method, these gases are, for example, 60
The gas is supplied to the surface of the substrate heated to 0 ° C. or higher to decompose the gas, whereby In x Al Y Ga 1- x Y N (0 ≦ X,
0 ≦ Y, X + Y ≦ 1) can be epitaxially grown.

【0036】[0036]

【実施例】よく洗浄したサファイア基板を反応容器内に
セットし、反応容器内を水素で十分置換した後、水素を
流しながら、基板の温度を1050℃まで上昇させサフ
ァイア基板のクリーニングを行う。
EXAMPLE A well-washed sapphire substrate is set in a reaction vessel, and after sufficiently replacing the inside of the reaction vessel with hydrogen, the temperature of the substrate is raised to 1050 ° C. while flowing hydrogen to clean the sapphire substrate.

【0037】続いて、温度を510℃まで下げ、キャリ
アガスに水素、原料ガスにアンモニアとTMG(トリメ
チルガリウム)とを用い、サファイア基板上にGaNよ
りなるバッファ層9を20nmの膜厚で成長させる。
Subsequently, the temperature is lowered to 510 ° C., and a buffer layer 9 made of GaN is grown to a thickness of 20 nm on a sapphire substrate using hydrogen as a carrier gas, ammonia and TMG (trimethylgallium) as a source gas. .

【0038】バッファ層9成長後、TMGのみ止めて、
温度を1030℃まで上昇させる。1030℃になった
ら、同じく原料ガスにTMGとアンモニアガス、ドーパ
ントガスにシランガスを用い、n型クラッド層として、
Siを1×1020/cm3ドープしたn型GaN層を4
μm成長させる。
After growing the buffer layer 9, only TMG is stopped,
Raise the temperature to 1030 ° C. When the temperature reaches 1030 ° C., TMG and ammonia gas are used as source gases, and silane gas is used as a dopant gas.
An n-type GaN layer doped with 1 × 10 20 / cm 3 of Si
grow by μm.

【0039】n型GaN層成長後、原料ガス、ドーパン
トガスを止め、温度を800℃にして、原料ガスにTM
GとTMI(トリメチルインジウム)とアンモニアを用
い、単一量子井戸構造の活性層10AとしてIn0.43
0.57N層を3nmの膜厚に成長させる。
After the growth of the n-type GaN layer, the source gas and the dopant gas are stopped, the temperature is set to 800 ° C., and TM is added to the source gas.
Using G, TMI (trimethylindium) and ammonia, the active layer 10A having a single quantum well structure has an In 0.43 G
a. A 0.57 N layer is grown to a thickness of 3 nm.

【0040】次に、原料ガス、ドーパントガスを止め、
再び温度を1020℃まで上昇させ、原料ガスにTM
G、TMA(トリメチルアルミニウム)、アンモニア、
ドーパントガスにGp2Mg(シクロペンタジエニルマ
グネシウム)を用い、p型クラッド層10BとしてMg
を1×1019/cm3ドーブした、p型Al0.3Ga0.7
N層を50nm成長させる。
Next, the source gas and the dopant gas are stopped,
The temperature was raised again to 1020 ° C.
G, TMA (trimethylaluminum), ammonia,
Gp 2 Mg (cyclopentadienyl magnesium) was used as a dopant gas, and Mg was used as the p-type cladding layer 10B.
Was doped with 1 × 10 19 / cm 3 to obtain p-type Al 0.3 Ga 0.7
An N layer is grown to a thickness of 50 nm.

【0041】TMAガスを止め、続いてp型コンタクト
層10Cとして、Mgを1×1019/cm3ドーブした
p型GaN層を1μm成長させる。
The TMA gas is stopped, and a p-type GaN layer doped with Mg at 1 × 10 19 / cm 3 is grown as a p-type contact layer 10C to a thickness of 1 μm.

【0042】p型GaN層成長後、基板を反応容器から
取り出し、アニーリング装置にて窒素雰囲気中、700
℃で20分間アニーリングを行い、p型クラッド層10
B、p型コンタクト層10Cをさらに低抵抗化する。
After the growth of the p-type GaN layer, the substrate is taken out of the reaction vessel, and the substrate is placed in a nitrogen atmosphere by an annealing apparatus.
At 20 ° C. for 20 minutes to form a p-type cladding layer 10.
The resistance of the B and p-type contact layers 10C is further reduced.

【0043】以上のようにして得られたウエハーのp型
コンタクト層10C、p型クラッド層10B、および活
性層10Aからなる多重半導体層10の一部をエッチン
グにより取り除き、n型窒化物半導体層2を露出させ、
多重半導体層10に、PdとAuよりなる透明電極6を
20nmとAuよりなるp電極5を2μmの膜厚で設
け、n型窒化物半導体層2にTiとAlよりなるn電極
4を2μmの膜厚で設け、350μm角のチップにカッ
トした後、カップ形状を有するリードフレームに設置
し、エポキシ樹脂でモールドして、発光ダイオードとす
る。
A part of the multiple semiconductor layer 10 including the p-type contact layer 10C, the p-type cladding layer 10B and the active layer 10A of the wafer obtained as described above is removed by etching, and the n-type nitride semiconductor layer 2 is removed. And expose
A transparent electrode 6 made of Pd and Au is provided on the multiple semiconductor layer 10 at a thickness of 2 μm, and a p-electrode 5 made of 20 nm and Au is provided at a thickness of 2 μm. An n-electrode 4 made of Ti and Al is formed on the n-type nitride semiconductor layer 2 at a thickness of 2 μm. After a chip having a thickness of 350 μm is provided, the chip is cut into a chip having a thickness of 350 μm.

【0044】そのスペクトルを測定したところ、発光ピ
ーク525nm、半値幅45nmの純緑色発光を示し、
図4と図5に示す電極構造の発光ダイオードは、If
(順方向電流)20mAにおいて、順方向電圧Vfは
3.1V、図6と図7に示す電極構造の発光ダイオード
は、3.2Vに低下した。ちなみに、図1に示す従来の
電極構造の発光ダイオードは、電極構造を変更する以外
は、実施例1と同様にして製作して、順方向電圧Vfが
If(順方向電流)20mAにおいて、3.5Vであっ
た。
When the spectrum was measured, it showed a pure green light emission having an emission peak of 525 nm and a half width of 45 nm.
The light emitting diode having the electrode structure shown in FIGS.
(Forward current) At 20 mA, the forward voltage Vf dropped to 3.1 V, and the light emitting diode having the electrode structure shown in FIGS. 6 and 7 dropped to 3.2 V. Incidentally, the light-emitting diode having the conventional electrode structure shown in FIG. 1 was manufactured in the same manner as in Example 1 except that the electrode structure was changed, and when the forward voltage Vf was 20 mA for If (forward current) 20 mA. It was 5V.

【0045】[0045]

【発明の効果】本発明の、周縁に電極を有する発光ダイ
オードは、発光出力の低下を最小にして順方向電圧Vf
を低下できる特長がある。それは、本発明の発光ダイオ
ードが、対角線上にp電極とn電極からなる一対の電極
を配設すると共に、一方の電極に周縁電極を接続し、他
方の電極には透明電極を接続し、さらに、周縁電極を発
光ダイオードの外周縁に沿って設け、透明電極を、周縁
電極の内側に設けているからである。
According to the present invention, the light emitting diode having an electrode on the periphery can minimize the decrease in the light emission output and minimize the forward voltage Vf.
There is a feature that can be reduced. That is, the light emitting diode of the present invention arranges a pair of electrodes consisting of a p electrode and an n electrode on a diagonal line, connects a peripheral electrode to one electrode, connects a transparent electrode to the other electrode, and furthermore, This is because the peripheral electrode is provided along the outer peripheral edge of the light emitting diode, and the transparent electrode is provided inside the peripheral electrode.

【0046】さらに、請求項2に記載する発光ダイオー
ドは、周縁電極を、透明電極に電気接続される電極が設
けられた隅部で切欠して、透明電極に接続される電極が
設けられた隅部を除く外周部に設けているので、順方向
電圧Vfを低くして、請求項1に記載する発光ダイオー
ドよりもさらに、発光出力を大きくできる特長がある。
Further, in the light-emitting diode according to the present invention, the peripheral electrode is notched at a corner where the electrode electrically connected to the transparent electrode is provided, and the corner where the electrode connected to the transparent electrode is provided. Since the light emitting diode is provided on the outer peripheral portion excluding the portion, the forward voltage Vf can be reduced, and the light emitting output can be further increased as compared with the light emitting diode according to the first aspect.

【0047】この特長を図4に基づいて説明する。図4
に示す発光ダイオードは、周縁のほぼ全体に周縁電極7
を設けているので、順方向電圧Vfを最も低くできる。
n電極4をn型窒化物半導体層2に広い面積で接触させ
て、n電極4とn型窒化物半導体層2との電気抵抗を小
さくできるからである。ただ、この構造の発光ダイオー
ドは、順方向電圧Vfを低下させるために設けた周縁電
極7によって、発光領域が狭くなって、全体としての発
光出力が多少は低下する傾向にある。
This feature will be described with reference to FIG. FIG.
The light emitting diode shown in FIG.
Is provided, the forward voltage Vf can be minimized.
This is because the electric resistance between the n-electrode 4 and the n-type nitride semiconductor layer 2 can be reduced by bringing the n-electrode 4 into contact with the n-type nitride semiconductor layer 2 over a wide area. However, in the light emitting diode having this structure, the light emitting region tends to be narrowed by the peripheral electrode 7 provided for lowering the forward voltage Vf, and the light emitting output as a whole tends to be slightly reduced.

【0048】請求項2に記載する発光ダイオードは、順
方向電圧Vfと発光出力とからなる総合的な発光特性を
改善できる特長がある。それは、発光領域を拡大するた
めに、周縁電極7の右下隅部をカットして、実線位置に
設けられたp電極5を、鎖線位置に移動させているから
である。p電極5を実線位置から鎖線位置に移動させる
ことにより、本発明の発光ダイオードは、発光領域が拡
大されて発光出力は向上する。ただ、この電極構造の発
光ダイオードは、周縁電極の全長が短くなるので、順方
向電圧Vfが高くなるように推測される。ところが、こ
の構造の発光ダイオードは、周縁電極の全長を短くする
にもかかわらず、順方向電圧Vfはほとんど変化しな
い。それは、p電極の周縁に設けた周縁電極が、他の部
分に比較して、順方向電圧Vfを低下させる作用する割
合が少ないからである。透明電極とp電極とを積層して
いるp型コンタクト層は、p電極で被覆される部分の電
気抵抗が、p電極に被覆されない部分に比較して相当に
大きくなる。p電極に被覆される部分でp型コンタクト
層の電気抵抗が大きいと、p電極とその周縁に設けた周
縁電極との間で電流はほとんど流れない。p電極と周縁
電極との間で有効に電流が流れないと、順方向電圧Vf
は低下しない。このため、p電極の近傍に周縁電極を設
けて、順方向電圧Vfを低下できる割合は少ない。p型
コンタクト層のp電極で被覆される部分の電気抵抗が大
きくなるのは、アニーリングするときに、p型層、とく
に、最上層のp型コンタクト層から水素が除去されるの
が、膜厚の厚いp電極で阻止されるからである。p型コ
ンタクト層を成長させるときに、この層に含まれる水素
は、p型コンタクト層にドープされるドーパントと結合
して、p型コンタクト層の電気抵抗を大きくしている。
水素は、透明電極とp電極を積層した状態で、アニーリ
ングするときにp型コンタクト層から除去される。た
だ、厚いp電極で被覆される部分は、p電極を水素が透
過し難いので、水素が有効に除去されない。このため、
p電極で被覆される部分は電気抵抗が大きくなってしま
う。
The light emitting diode according to the second aspect is characterized in that it is possible to improve the overall light emitting characteristics comprising the forward voltage Vf and the light emitting output. This is because the lower right corner of the peripheral electrode 7 is cut to enlarge the light emitting region, and the p electrode 5 provided at the solid line position is moved to the chain line position. By moving the p-electrode 5 from the position of the solid line to the position of the chain line, the light emitting diode of the present invention has an enlarged light emitting area and improved light emission output. However, in the light emitting diode having this electrode structure, it is assumed that the forward voltage Vf is increased because the entire length of the peripheral electrode is reduced. However, in the light emitting diode having this structure, the forward voltage Vf hardly changes even though the entire length of the peripheral electrode is shortened. This is because the ratio of the peripheral electrode provided on the peripheral edge of the p electrode to lower the forward voltage Vf is smaller than that of other parts. In the p-type contact layer in which the transparent electrode and the p-electrode are laminated, the electric resistance of the portion covered with the p-electrode is considerably higher than that of the portion not covered with the p-electrode. If the electric resistance of the p-type contact layer is large in the portion covered by the p-electrode, almost no current flows between the p-electrode and the peripheral electrode provided on the periphery thereof. If current does not effectively flow between the p electrode and the peripheral electrode, the forward voltage Vf
Does not drop. For this reason, the rate at which the forward voltage Vf can be reduced by providing the peripheral electrode near the p electrode is small. The reason why the electrical resistance of the portion of the p-type contact layer covered with the p-electrode is increased is that the hydrogen is removed from the p-type layer, particularly, the topmost p-type contact layer during annealing because of the film thickness. Is blocked by the thick p-electrode. When growing a p-type contact layer, the hydrogen contained in this layer combines with the dopant doped in the p-type contact layer to increase the electrical resistance of the p-type contact layer.
Hydrogen is removed from the p-type contact layer during annealing with the transparent electrode and the p-electrode laminated. However, in the portion covered with the thick p-electrode, hydrogen is not effectively removed because hydrogen hardly permeates the p-electrode. For this reason,
The portion covered by the p-electrode has a large electric resistance.

【0049】請求項2の発光ダイオードは、順方向電圧
Vfを低下させるために有効に作用させるのが難しい周
縁電極の一部をカットし、この部分に電極を配設してい
る。このため、周縁電極を短くするにもかかわらず順方
向電圧Vfを低くでき、しかも、発光面積を拡大して発
光出力を大きくできる極めて優れた特長を実現する。
According to the light emitting diode of the present invention, a part of the peripheral electrode, which is difficult to effectively work to lower the forward voltage Vf, is cut, and the electrode is provided in this part. Therefore, the forward voltage Vf can be reduced in spite of shortening the peripheral electrode, and further, an extremely excellent feature that the light emitting area can be enlarged and the light emitting output can be increased is realized.

【0050】さらに、本発明の請求項4に記載される発
光ダイオードは、p電極とn電極異なる平面形状として
いる。この構造の発光ダイオードは、電極にワイヤーボ
ンドする装置でp電極とn電極とを間違えずに正確に識
別できる特長がある。ワイヤーボンドする装置は、画像
認識してp電極とn電極とを識別するので、両電極が同
じ形状をしていると、p電極とn電極とを正確に識別す
るのが難しいが、p電極とn電極の平面形状が異なる
と、正確に識別して、ワイヤーボンドできる特長があ
る。
Further, the light emitting diode according to the fourth aspect of the present invention has a planar shape different from that of the p electrode and the n electrode. The light emitting diode of this structure has a feature that a p-electrode and an n-electrode can be accurately identified without mistake by using a device for wire bonding to an electrode. Since the wire bonding apparatus recognizes an image and identifies a p-electrode and an n-electrode, it is difficult to accurately identify the p-electrode and the n-electrode if both electrodes have the same shape. If the planar shape of the n-electrode is different from that of the n-electrode, there is a feature that accurate identification and wire bonding can be performed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】従来の発光ダイオードの平面図FIG. 1 is a plan view of a conventional light emitting diode.

【図2】図1に示す発光ダイオードの断面図FIG. 2 is a cross-sectional view of the light emitting diode shown in FIG.

【図3】従来の他の発光ダイオードの平面図FIG. 3 is a plan view of another conventional light emitting diode.

【図4】本発明の実施例の発光ダイオードの平面図FIG. 4 is a plan view of a light emitting diode according to an embodiment of the present invention.

【図5】図4に示す発光ダイオードの断面図FIG. 5 is a sectional view of the light emitting diode shown in FIG. 4;

【図6】本発明の実施例の発光ダイオードの平面図FIG. 6 is a plan view of a light emitting diode according to an embodiment of the present invention.

【図7】図6に示す発光ダイオードの断面図FIG. 7 is a sectional view of the light emitting diode shown in FIG. 6;

【符号の説明】[Explanation of symbols]

1…基板 2…n型窒化物半導体層 3…p型窒化物半導体層 4…n電極 5…p電極 6…透明電極 7…周縁電極 8…電極 9…バッファ層 10…多重半導体層 10A…活性層 10
B…p型クラッド層 10C…p型コンタクト層 11…保護膜
DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... N-type nitride semiconductor layer 3 ... P-type nitride semiconductor layer 4 ... N electrode 5 ... P electrode 6 ... Transparent electrode 7 ... Peripheral electrode 8 ... Electrode 9 ... Buffer layer 10 ... Multi-semiconductor layer 10A ... Active Layer 10
B: p-type cladding layer 10C: p-type contact layer 11: protective film

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 四角い平面形状の基板(1)の上に、発光
層を含む窒化物半導体層が積層されており、その窒化物
半導体層の同一面側に、p電極(5)とn電極(4)からなる
一対の電極が形成されてなる発光ダイオードにおいて、 前記発光ダイオードは、電極側から見て四角い平面形状
をしていると共に、p電極(5)とn電極(4)が、四角い発
光ダイオードの隅部に位置して対角線上に配設されてお
り、p電極(5)とn電極(4)からなる一対の電極は、一方
の電極に周縁電極(7)が接続され、他方の電極には透明
電極(6)が接続され、周縁電極(7)は発光ダイオードの外
周縁に沿って設けられ、透明電極(6)は、周縁電極(7)の
内側に設けられてなることを特徴とする周縁に電極を有
する発光ダイオード。
1. A nitride semiconductor layer including a light-emitting layer is laminated on a square planar substrate (1), and a p-electrode (5) and an n-electrode are formed on the same surface of the nitride semiconductor layer. In the light emitting diode in which a pair of electrodes made of (4) is formed, the light emitting diode has a square planar shape when viewed from the electrode side, and the p electrode (5) and the n electrode (4) are square. A pair of electrodes, which are located at the corners of the light-emitting diode and are arranged diagonally and include a p-electrode (5) and an n-electrode (4), have a peripheral electrode (7) connected to one electrode and the other electrode connected to the other electrode. A transparent electrode (6) is connected to the electrode, the peripheral electrode (7) is provided along the outer peripheral edge of the light emitting diode, and the transparent electrode (6) is provided inside the peripheral electrode (7). A light emitting diode having an electrode on the periphery.
【請求項2】 四角い平面形状の基板(1)の上に、発光
層を含む窒化物半導体層が積層されており、その窒化物
半導体層の同一面側に、p電極(5)とn電極(4)からなる
一対の電極が形成されてなる発光ダイオードにおいて、 前記発光ダイオードは、電極側から見て四角い平面形状
をしていると共に、p電極(5)とn電極(4)が、四角い発
光ダイオードの隅部に位置して対角線上に配設されてお
り、p電極(5)とn電極(4)からなる一対の電極は、一方
の電極に周縁電極(7)が接続され、他方の電極には透明
電極(6)が接続され、周縁電極(7)は発光ダイオードの外
周縁に沿って設けられ、透明電極(6)は、周縁電極(7)の
内側に設けられており、 さらに、周縁電極(7)は、透明電極(6)に電気接続される
電極が設けられた隅部で切欠されて、透明電極(6)に接
続される電極が設けられた隅部を除く外周部に設けられ
てなることを特徴とする周縁に電極を有する発光ダイオ
ード。
2. A nitride semiconductor layer including a light emitting layer is laminated on a square planar substrate (1), and a p-electrode (5) and an n-electrode are formed on the same surface of the nitride semiconductor layer. In the light emitting diode in which a pair of electrodes made of (4) is formed, the light emitting diode has a square planar shape when viewed from the electrode side, and the p electrode (5) and the n electrode (4) are square. A pair of electrodes, which are located at the corners of the light-emitting diode and are arranged diagonally and include a p-electrode (5) and an n-electrode (4), have a peripheral electrode (7) connected to one electrode and the other electrode connected to the other electrode. A transparent electrode (6) is connected to the electrode, the peripheral electrode (7) is provided along the outer peripheral edge of the light emitting diode, the transparent electrode (6) is provided inside the peripheral electrode (7), Further, the peripheral electrode (7) is cut off at a corner where an electrode electrically connected to the transparent electrode (6) is provided, and the electrode connected to the transparent electrode (6) is cut off. Light emitting diode having an electrode on the periphery, characterized in that thus provided on the outer peripheral portion excluding the corner portions provided.
【請求項3】 周縁電極(7)がn電極(4)に接続され、透
明電極(6)がp電極(5)に接続されてなる請求項1または
2に記載される周縁に電極を有する発光ダイオード。
3. The peripheral electrode according to claim 1, wherein the peripheral electrode (7) is connected to the n-electrode (4) and the transparent electrode (6) is connected to the p-electrode (5). Light emitting diode.
【請求項4】 n電極(4)とp電極(5)との形状が、互い
に異なる平面形状を有する請求項1または3に記載され
る周縁に電極を有する発光ダイオード。
4. The light emitting diode having an electrode on the periphery according to claim 1, wherein the shape of the n-electrode (4) and the shape of the p-electrode (5) are different from each other.
JP33165996A 1996-11-26 1996-11-26 Light-emitting diode with peripheral electrodes Expired - Fee Related JP3244010B2 (en)

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